24#ifdef __VSF_HEADER_ONLY_SHOW_ARCH_INFO__
28# define VSF_ARCH_PRI_NUM 8
29# define VSF_ARCH_PRI_BIT 3
32#define VSF_DEV_SWI_NUM 1
41#define VSF_ARCH_SYSTIMER_FREQ SystemCoreClock
45#ifndef __HAL_DEVICE_GEEHY_APM32F407_H__
46#define __HAL_DEVICE_GEEHY_APM32F407_H__
49#define VSF_DEV_SWI_LIST 79
50#define SWI0_IRQHandler CRYPT_IRQHandler
52#define RNG_IRQHandler HASH_RNG_IRQHandler
57#include "../common/__common.h"
63#ifndef VSF_HW_USB_OTG1_USB_CFG_SPEED
65# define VSF_HW_USB_OTG1_USB_CFG_SPEED USB_SPEED_FULL
70#define VSF_HW_USB_OTG_COUNT 2
72#define USB_DWCOTG_MAX_EP_NUM 6
74#define USB_OTG_FS_BASE ((uint32_t)0x50000000)
75#define USB_OTG_HS_BASE ((uint32_t)0x40040000)
77#define VSF_HW_USB_OTG0_IRQHandler OTG_FS_IRQHandler
78#define VSF_HW_USB_OTG0_CONFIG \
79 .dc_ep_num = 4 << 1, \
80 .hc_ep_num = USB_DWCOTG_MAX_EP_NUM, \
81 .reg = (void *)USB_OTG_FS_BASE, \
84 .buffer_word_size = 320, \
85 .speed = USB_SPEED_FULL, \
91#define VSF_HW_USB_OTG1_IRQHandler OTG_HS1_IRQHandler
92#define VSF_HW_USB_OTG1_CONFIG \
93 .dc_ep_num = (USB_DWCOTG_MAX_EP_NUM - 1) << 1, \
94 .hc_ep_num = USB_DWCOTG_MAX_EP_NUM, \
95 .reg = (void *)USB_OTG_HS_BASE, \
96 .phy_reg = (void *)(USB_OTG_HS_BASE + 0x200), \
97 .irq = OTG_HS1_IRQn, \
99 .buffer_word_size = 1024, \
100 .speed = VSF_HW_USB_OTG1_USB_CFG_SPEED, \
uint32_t SystemCoreClock
Definition system_CMSDK_ARMv8MBL.c:56