18#ifndef __ST_HAL_SPI_H__
19#define __ST_HAL_SPI_H__
25#if defined(HAL_SPI_MODULE_ENABLED) && VSF_HAL_USE_SPI == ENABLED
33#define HAL_SPI_ERROR_NONE (0x00000000U)
34#define HAL_SPI_ERROR_MODF (0x00000001U)
35#define HAL_SPI_ERROR_CRC (0x00000002U)
36#define HAL_SPI_ERROR_OVR (0x00000004U)
37#define HAL_SPI_ERROR_FRE (0x00000008U)
38#define HAL_SPI_ERROR_DMA (0x00000010U)
39#define HAL_SPI_ERROR_FLAG (0x00000020U)
40#define HAL_SPI_ERROR_ABORT (0x00000040U)
41#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
42# define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U)
45#define SPI_MODE_SLAVE VSF_SPI_SLAVE
46#define SPI_MODE_MASTER VSF_SPI_MASTER
47#define SPI_DATASIZE_8BIT VSF_SPI_DATASIZE_8
48#define SPI_DATASIZE_16BIT VSF_SPI_DATASIZE_16
49#define SPI_POLARITY_LOW VSF_SPI_CPOL_LOW
50#define SPI_POLARITY_HIGH VSF_SPI_CPOL_HIGH
51#define SPI_PHASE_1EDGE VSF_SPI_CPHA_LOW
52#define SPI_PHASE_2EDGE VSF_SPI_CPHA_HIGH
53#define SPI_FIRSTBIT_MSB VSF_SPI_MSB_FIRST
54#define SPI_FIRSTBIT_LSB VSF_SPI_LSB_FIRST
55#define SPI_NSS_SOFT VSF_SPI_CS_SOFTWARE_MODE
56#define SPI_NSS_HARD_OUTPUT VSF_SPI_CS_HARDWARE_MODE
57#ifdef VSF_SPI_CS_HARDWARE_INPUT_MODE
58# define SPI_NSS_HARD_INPUT VSF_SPI_CS_HARDWARE_INPUT_MODE
60# define SPI_NSS_HARD_INPUT 0
62#ifdef VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX
63# define SPI_DIRECTION_2LINES VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX
65# define SPI_DIRECTION_2LINES 0
68#ifdef VSF_SPI_DATALINE_2_LINE_RX_ONLY
69# define SPI_DIRECTION_2LINES_RXONLY VSF_SPI_DATALINE_2_LINE_RX_ONLY
71# define SPI_DIRECTION_2LINES_RXONLY 0
74#ifdef VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX
75# define SPI_DIRECTION_1LINE VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX
77# define SPI_DIRECTION_1LINE 0
79# define SPI_BAUDRATEPRESCALER_2 2
80# define SPI_BAUDRATEPRESCALER_4 4
81# define SPI_BAUDRATEPRESCALER_8 8
82# define SPI_BAUDRATEPRESCALER_16 16
83# define SPI_BAUDRATEPRESCALER_32 32
84# define SPI_BAUDRATEPRESCALER_64 64
85# define SPI_BAUDRATEPRESCALER_128 128
86# define SPI_BAUDRATEPRESCALER_256 256
87#ifdef VSF_SPI_TI_MODE_DISABLE
88# define SPI_TIMODE_DISABLE VSF_SPI_TI_MODE_DISABLE
90# define SPI_TIMODE_DISABLE (0x00000000U)
92#ifdef VSF_SPI_TI_MMOE_ENABLE
93# define SPI_TIMODE_ENABLE VSF_SPI_TI_MMOE_ENABLE
95# define SPI_TIMODE_ENABLE (0x00000000U)
97#ifdef VSF_SPI_CRCCALCULATION_DISABLE
98# define SPI_CRCCALCULATION_DISABLE VSF_SPI_CRCCALCULATION_DISABLE
100# define SPI_CRCCALCULATION_DISABLE (0x00000000U)
104#define IS_SPI_ALL_INSTANCE(INSTANCE) 1
105#define IS_SPI_MODE(__MODE__) \
106 (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
108#define IS_SPI_DIRECTION(__MODE__) \
109 (((__MODE__) == SPI_DIRECTION_2LINES) || \
110 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
111 ((__MODE__) == SPI_DIRECTION_1LINE))
112#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
113#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) \
114 (((__MODE__) == SPI_DIRECTION_2LINES) || \
115 ((__MODE__) == SPI_DIRECTION_1LINE))
116#define IS_SPI_DATASIZE(__DATASIZE__) \
117 (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
118 ((__DATASIZE__) == SPI_DATASIZE_8BIT))
119#define IS_SPI_CPOL(__CPOL__) \
120 (((__CPOL__) == SPI_POLARITY_LOW) || ((__CPOL__) == SPI_POLARITY_HIGH))
121#define IS_SPI_CPHA(__CPHA__) \
122 (((__CPHA__) == SPI_PHASE_1EDGE) || ((__CPHA__) == SPI_PHASE_2EDGE))
123#define IS_SPI_NSS(__NSS__) \
124 (((__NSS__) == SPI_NSS_SOFT) || ((__NSS__) == SPI_NSS_HARD_INPUT) || \
125 ((__NSS__) == SPI_NSS_HARD_OUTPUT))
126#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) \
127 (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
128 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
129 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
130 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
131 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
132 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
133 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
134 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
135#define IS_SPI_FIRST_BIT(__BIT__) \
136 (((__BIT__) == SPI_FIRSTBIT_MSB) || ((__BIT__) == SPI_FIRSTBIT_LSB))
137#define IS_SPI_TIMODE(__MODE__) \
138 (((__MODE__) == SPI_TIMODE_DISABLE) || ((__MODE__) == SPI_TIMODE_ENABLE))
139#define IS_SPI_CRC_CALCULATION(__CALCULATION__) \
140 (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
141 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
142#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) \
143 (((__POLYNOMIAL__) >= 0x1U) && ((__POLYNOMIAL__) <= 0xFFFFU) && \
144 (((__POLYNOMIAL__) & 0x1U) != 0U))
166 HAL_SPI_STATE_RESET = 0x00U,
167 HAL_SPI_STATE_READY = 0x01U,
168 HAL_SPI_STATE_BUSY = 0x02U,
169 HAL_SPI_STATE_BUSY_TX = 0x03U,
170 HAL_SPI_STATE_BUSY_RX = 0x04U,
171 HAL_SPI_STATE_BUSY_TX_RX = 0x05U,
172 HAL_SPI_STATE_ERROR = 0x06U,
173 HAL_SPI_STATE_ABORT = 0x07U,
174} HAL_SPI_StateTypeDef;
176typedef struct __SPI_HandleTypeDef {
177 SPI_TypeDef *Instance;
178 SPI_InitTypeDef
Init;
185 void (*RxISR)(
struct __SPI_HandleTypeDef *hspi);
186 void (*TxISR)(
struct __SPI_HandleTypeDef *hspi);
187 DMA_HandleTypeDef *hdmatx;
188 DMA_HandleTypeDef *hdmarx;
190 volatile HAL_SPI_StateTypeDef State;
192#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
193 void (*TxCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
194 void (*RxCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
195 void (*TxRxCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
196 void (*TxHalfCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
197 void (*RxHalfCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
198 void (*TxRxHalfCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
199 void (*ErrorCallback)(
struct __SPI_HandleTypeDef *hspi);
200 void (*AbortCpltCallback)(
struct __SPI_HandleTypeDef *hspi);
201 void (*MspInitCallback)(
struct __SPI_HandleTypeDef *hspi);
202 void (*MspDeInitCallback)(
struct __SPI_HandleTypeDef *hspi);
207#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
209 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U,
210 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U,
211 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U,
212 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U,
213 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U,
214 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U,
215 HAL_SPI_ERROR_CB_ID = 0x06U,
216 HAL_SPI_ABORT_CB_ID = 0x07U,
217 HAL_SPI_MSPINIT_CB_ID = 0x08U,
218 HAL_SPI_MSPDEINIT_CB_ID = 0x09U
220} HAL_SPI_CallbackIDTypeDef;
221typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi);
232#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
234 HAL_SPI_CallbackIDTypeDef CallbackID,
235 pSPI_CallbackTypeDef pCallback);
237 SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
vsf_err_t(* Init)(vsf_adc_cfg_t *pCfg)
Definition adc_interface.h:38
unsigned short uint16_t
Definition stdint.h:7
unsigned uint32_t
Definition stdint.h:9
unsigned char uint8_t
Definition stdint.h:5
HAL_StatusTypeDef
Definition sthal_def.h:61
HAL_LockTypeDef
Definition sthal_def.h:68
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Definition sthal_spi.c:533
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:76
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:64
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:865
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:52
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
Definition sthal_spi.c:814
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:100
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:70
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:106
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:977
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
Definition sthal_spi.c:690
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:927
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
Definition sthal_spi.c:777
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
Definition sthal_spi.c:737
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:893
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
Definition sthal_spi.c:577
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:956
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:993
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:942
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:82
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
Definition sthal_spi.c:656
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:337
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:94
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:58
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:414
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:88
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
Definition sthal_spi.c:971
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
Definition sthal_spi.c:622
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
Definition sthal_spi.c:555
SPI instance structure, used for SPI Multi Class support, not needed in non Multi Class mode.
Definition vsf_template_spi.h:990