#include <f1c100s_reg.h>

Data Fields
reg32_t	PLL_CPU_CTRL

reg32_t	PLL_AUDIO_CTRL

reg32_t	PLL_VIDEO_CTRL

reg32_t	PLL_VE_CTRL

reg32_t	PLL_DDR_CTRL

reg32_t	PLL_PERIPH_CTRL

reg32_t	CPU_CLK_SRC

reg32_t	AHB_APB_HCLKC_CFG

reg32_t	BUS_CLK_GATING0

reg32_t	BUS_CLK_GATING1

reg32_t	BUS_CLK_GATING2

reg32_t	SDMMC0_CLK

reg32_t	SDMMC1_CLK

reg32_t	DAUDIO_CLK

reg32_t	OWA_CLK

reg32_t	CIR_CLK

reg32_t	USBPHY_CLK

reg32_t	DRAM_GATING

reg32_t	BE_CLK

reg32_t	FE_CLK

reg32_t	TCON_CLK

reg32_t	DI_CLK

reg32_t	TVE_CLK

reg32_t	TVD_CLK

reg32_t	CSI_CLK

reg32_t	VE_CLK

reg32_t	AUDIO_CODEC_CLK

reg32_t	AVS_CLK

reg32_t	PLL_STABLE_TIME0

reg32_t	PLL_STABLE_TIME1

reg32_t	PLL_CPU_BIAS

reg32_t	PLL_AUDIO_BIAS

reg32_t	PLL_VIDEO_BIAS

reg32_t	PLL_VE_BIAS

reg32_t	PLL_DDR0_BIAS

reg32_t	PLL_PERIPH_BIAS

reg32_t	PLL_CPU_TUN

reg32_t	PLL_DDR_TUN

reg32_t	PLL_AUDIO_PAT_CTRL

reg32_t	PLL_VIDEO_PAT_CTRL

reg32_t	PLL_DDR0_PAT_CTRL

reg32_t	BUS_SOFT_RST0

reg32_t	BUS_SOFT_RST1

reg32_t	BUS_SOFT_RST2

Field Documentation

◆ PLL_CPU_CTRL

reg32_t ccu_reg_t::PLL_CPU_CTRL

◆ PLL_AUDIO_CTRL

reg32_t ccu_reg_t::PLL_AUDIO_CTRL

◆ PLL_VIDEO_CTRL

reg32_t ccu_reg_t::PLL_VIDEO_CTRL

◆ PLL_VE_CTRL

reg32_t ccu_reg_t::PLL_VE_CTRL

◆ PLL_DDR_CTRL

reg32_t ccu_reg_t::PLL_DDR_CTRL

◆ PLL_PERIPH_CTRL

reg32_t ccu_reg_t::PLL_PERIPH_CTRL

◆ CPU_CLK_SRC

reg32_t ccu_reg_t::CPU_CLK_SRC

◆ AHB_APB_HCLKC_CFG

reg32_t ccu_reg_t::AHB_APB_HCLKC_CFG

◆ BUS_CLK_GATING0

reg32_t ccu_reg_t::BUS_CLK_GATING0

◆ BUS_CLK_GATING1

reg32_t ccu_reg_t::BUS_CLK_GATING1

◆ BUS_CLK_GATING2

reg32_t ccu_reg_t::BUS_CLK_GATING2

◆ SDMMC0_CLK

reg32_t ccu_reg_t::SDMMC0_CLK

◆ SDMMC1_CLK

reg32_t ccu_reg_t::SDMMC1_CLK

◆ DAUDIO_CLK

reg32_t ccu_reg_t::DAUDIO_CLK

◆ OWA_CLK

reg32_t ccu_reg_t::OWA_CLK

◆ CIR_CLK

reg32_t ccu_reg_t::CIR_CLK

◆ USBPHY_CLK

reg32_t ccu_reg_t::USBPHY_CLK

◆ DRAM_GATING

reg32_t ccu_reg_t::DRAM_GATING

◆ BE_CLK

reg32_t ccu_reg_t::BE_CLK

◆ FE_CLK

reg32_t ccu_reg_t::FE_CLK

◆ TCON_CLK

reg32_t ccu_reg_t::TCON_CLK

◆ DI_CLK

reg32_t ccu_reg_t::DI_CLK

◆ TVE_CLK

reg32_t ccu_reg_t::TVE_CLK

◆ TVD_CLK

reg32_t ccu_reg_t::TVD_CLK

◆ CSI_CLK

reg32_t ccu_reg_t::CSI_CLK

◆ VE_CLK

reg32_t ccu_reg_t::VE_CLK

◆ AUDIO_CODEC_CLK

reg32_t ccu_reg_t::AUDIO_CODEC_CLK

◆ AVS_CLK

reg32_t ccu_reg_t::AVS_CLK

◆ PLL_STABLE_TIME0

reg32_t ccu_reg_t::PLL_STABLE_TIME0

◆ PLL_STABLE_TIME1

reg32_t ccu_reg_t::PLL_STABLE_TIME1

◆ PLL_CPU_BIAS

reg32_t ccu_reg_t::PLL_CPU_BIAS

◆ PLL_AUDIO_BIAS

reg32_t ccu_reg_t::PLL_AUDIO_BIAS

◆ PLL_VIDEO_BIAS

reg32_t ccu_reg_t::PLL_VIDEO_BIAS

◆ PLL_VE_BIAS

reg32_t ccu_reg_t::PLL_VE_BIAS

◆ PLL_DDR0_BIAS

reg32_t ccu_reg_t::PLL_DDR0_BIAS

◆ PLL_PERIPH_BIAS

reg32_t ccu_reg_t::PLL_PERIPH_BIAS

◆ PLL_CPU_TUN

reg32_t ccu_reg_t::PLL_CPU_TUN

◆ PLL_DDR_TUN

reg32_t ccu_reg_t::PLL_DDR_TUN

◆ PLL_AUDIO_PAT_CTRL

reg32_t ccu_reg_t::PLL_AUDIO_PAT_CTRL

◆ PLL_VIDEO_PAT_CTRL

reg32_t ccu_reg_t::PLL_VIDEO_PAT_CTRL

◆ PLL_DDR0_PAT_CTRL

reg32_t ccu_reg_t::PLL_DDR0_PAT_CTRL

◆ BUS_SOFT_RST0

reg32_t ccu_reg_t::BUS_SOFT_RST0

◆ BUS_SOFT_RST1

reg32_t ccu_reg_t::BUS_SOFT_RST1

◆ BUS_SOFT_RST2

reg32_t ccu_reg_t::BUS_SOFT_RST2

Data Fields