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vsf_disp_mipi_lcd_dcs.h
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17
18#ifndef __VSF_DISP_MIPI_LCD_DISPLAY_COMMAND_SET_H__
19#define __VSF_DISP_MIPI_LCD_DISPLAY_COMMAND_SET_H__
20
21/*============================ INCLUDES ======================================*/
22
23#if VSF_USE_UI == ENABLED && VSF_DISP_USE_MIPI_LCD == ENABLED
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29/*============================ MACROFIED FUNCTIONS ===========================*/
30
31#define VSF_DISP_MIPI_LCD_WRITE(__CMD, __PARAM_LEN, ...) \
32 (__CMD), (__PARAM_LEN), ##__VA_ARGS__
33
34#define VSF_DISP_MIPI_LCD_DELAY_MS(__MS) \
35 (0), (__MS)
36
37/*============================ MACROS ========================================*/
38
39// MIPI Display Command Set
40// Current Specification Version is MIPI DCS v1.5 (March 2021)
41// The main reference for this code here is v1.2: mipi-DCS-specification-v1.2a.pdf
42
43// No Operation
44#define MIPI_DCS_CMD_HEX_CODE_NOP 0x00
45#define MIPI_DCS_CMD_NOP \
46 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_NOP, 0)
47
48// Software Reset
49#define MIPI_DCS_CMD_HEX_CODE_SOFT_RESET 0x01
50#define MIPI_DCS_CMD_SOFT_RESET \
51 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SOFT_RESET, 0)
52
53#define MIPI_DCS_CMD_HEX_CODE_GET_COMPRESSION_MODE 0x03
54#define MIPI_DCS_CMD_HEX_CODE_GET_DISPLAY_ID 0x04
55#define MIPI_DCS_CMD_HEX_CODE_GET_ERROR_COUNT_ON_DSI 0x05
56#define MIPI_DCS_CMD_HEX_CODE_GET_RED_CHANNEL 0x06
57#define MIPI_DCS_CMD_HEX_CODE_GET_GREEN_CHANNEL 0x07
58#define MIPI_DCS_CMD_HEX_CODE_GET_BLUE_CHANNEL 0x08
59#define MIPI_DCS_CMD_HEX_CODE_GET_DISPLAY_STATUS 0x09
60#define MIPI_DCS_CMD_HEX_CODE_GET_POWER_MODE 0x0A
61#define MIPI_DCS_CMD_HEX_CODE_GET_ADDRESS_MODE 0x0B
62#define MIPI_DCS_CMD_HEX_CODE_GET_PIXEL_FORMAT 0x0C
63#define MIPI_DCS_CMD_HEX_CODE_GET_DISPLAY_MODE 0x0D
64#define MIPI_DCS_CMD_HEX_CODE_GET_SIGNAL_MODE 0x0E
65#define MIPI_DCS_CMD_HEX_CODE_GET_DIAGNOSTIC_RESULT 0x0F
66
67// Power for the display panel is off
68#define MIPI_DCS_CMD_HEX_CODE_ENTER_SLEEP_MODE 0x10
69#define MIPI_DCS_CMD_ENTER_SLEEP_MODE \
70 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_ENTER_SLEEP_MODE, 0)
71
72// Power for the display panel is on
73#define MIPI_DCS_CMD_HEX_CODE_EXIT_SLEEP_MODE 0x11
74#define MIPI_DCS_CMD_EXIT_SLEEP_MODE \
75 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_EXIT_SLEEP_MODE, 0)
76
77// Part of the display area is used for image display
78#define MIPI_DCS_CMD_HEX_CODE_ENTER_PARTIAL_MODE 0x12
79#define MIPI_DCS_CMD_ENTER_PARTIAL_MODE \
80 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_ENTER_PARTIAL_MODE, 0)
81
82// The whole display area is used for image display
83#define MIPI_DCS_CMD_HEX_CODE_ENTER_NORMAL_MODE 0x13
84#define MIPI_DCS_CMD_ENTER_NORMAL_MODE \
85 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_ENTER_NORMAL_MODE, 0)
86
87// TODO: support read
88//#define MIPI_DCS_CMD_HEX_CODE_GET_IMAGE_CHECKSUM_RGB 0x14
89//#define MIPI_DCS_CMD_HEX_CODE_GET_IMAGE_CHECKSUM_CT 0x15
90
91// Displayed image colors are not inverted
92#define MIPI_DCS_CMD_HEX_CODE_EXIT_INVERT_MODE 0x20
93#define MIPI_DCS_CMD_EXIT_INVERT_MODE \
94 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_EXIT_INVERT_MODE, 0)
95
96// Displayed image colors are inverted
97#define MIPI_DCS_CMD_HEX_CODE_ENTER_INVERT_MODE 0x21
98#define MIPI_DCS_CMD_ENTER_INVERT_MODE \
99 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_ENTER_INVERT_MODE, 0)
100
101// Selects the gamma curve used by the display device.
102#define MIPI_DCS_CMD_HEX_CODE_SET_GAMMA_CURVE 0x26
103#define MIPI_DCS_CMD_GAMMA_CURVE_GC0 0x01
104#define MIPI_DCS_CMD_GAMMA_CURVE_GC1 0x02
105#define MIPI_DCS_CMD_GAMMA_CURVE_GC2 0x04
106#define MIPI_DCS_CMD_GAMMA_CURVE_GC3 0x08
107#define MIPI_DCS_CMD_SET_GAMMA_CURVE(__GC_MASK) \
108 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_GAMMA_CURVE, 0, __GC_MASK)
109
110// Blanks the display device
111#define MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_OFF 0x28
112#define MIPI_DCS_CMD_SET_DISPLAY_OFF \
113 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_OFF, 0)
114
115// Show the image on the display device
116#define MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_ON 0x29
117#define MIPI_DCS_CMD_SET_DISPLAY_ON \
118 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_ON, 0)
119
120// Set the column extent
121#define MIPI_DCS_CMD_HEX_CODE_SET_COLUMN_ADDRESS 0x2A
122// SC: Start Column, EC: End Column, Address: closed interval [SC, EC]
123#define MIPI_DCS_CMD_SET_COLUMN_ADDRESS(__SC, __EC) \
124 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_COLUMN_ADDRESS, 4,\
125 ((uint16_t)__SC >> 8), (__SC & 0xFF), \
126 ((uint16_t)__EC >> 8), (__EC & 0xFF))
127
128// Set the page extent
129#define MIPI_DCS_CMD_HEX_CODE_SET_PAGE_ADDRESS 0x2B
130// SP: Start Page, EP: End Page, Address: closed interval [SP, EP]
131#define MIPI_DCS_CMD_SET_PAGE_ADDRESS(__SP, __EP) \
132 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_PAGE_ADDRESS, 4, \
133 ((uint16_t)__SP >> 8), (__SP & 0xFF), \
134 ((uint16_t)__EP >> 8), (__EP & 0xFF))
135
136// Transfer image data from the Host Processor to the peripheral starting at
137// the location provided by set_column_address and set_page_address
138#define MIPI_DCS_CMD_HEX_CODE_WRITE_MEMORY_START 0x2C
139#define MIPI_DCS_CMD_WRITE_MEMORY_START(__NUM, ...) \
140 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_WRITE_MEMORY_START, __NUM, ##__VA_ARGS__)
141
142// Fills the peripheral look-up table with the provided data
143#define MIPI_DCS_CMD_HEX_CODE_WRITE_LUT 0x2D
144#define MIPI_DCS_CMD_WRITE_LUT(__NUM, ...) \
145 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_WRITE_LUT, __NUM, ##__VA_ARGS__)
146
147// TODO: support read
148//#define MIPI_DCS_CMD_HEX_CODE_READ_MEMORY_START 0x2E
149
150// Defines the number of rows in the partial display area on the display device.
151#define MIPI_DCS_CMD_HEX_CODE_SET_PARTIAL_ROWS 0x30
152// SR: Start Row, ER: End Row, Address: closed interval [SR, ER]
153#define MIPI_DCS_CMD_SET_PARTIAL_ROWS(__SR, __ER) \
154 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_PARTIAL_ROWS, 4, \
155 ((uint16_t)__SR >> 8), (__SR & 0xFF), \
156 ((uint16_t)__ER >> 8), (__ER & 0xFF))
157
158#define MIPI_DCS_CMD_HEX_CODE_SET_PARTIAL_COLUMNS 0x31
159// SC: Start Column, EC: End Column, Address: closed interval [SC, EC]
160#define MIPI_DCS_CMD_SET_PARTIAL_COLUMNS(__SC, __EC) \
161 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_PARTIAL_COLUMNS, 4, \
162 ((uint16_t)__SC >> 8), (__SC & 0xFF), \
163 ((uint16_t)__EC >> 8), (__EC & 0xFF))
164
165// Defines the vertical scrolling and fixed area on display device
166#define MIPI_DCS_CMD_HEX_CODE_SET_SCROLL_AREA 0x33
167// __TFA: TOP_FIXED_AREA, __VSA: VERTICAL_SCROLLING_AREA, __BFA: BOTTOM_FIXED_AREA
168#define MIPI_DCS_CMD_SET_SCROLL_AREA(__TFA, __VERTICAL_SCROLLING_AREA, __BFA) \
169 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_SCROLL_AREA, 6, \
170 ((uint16_t)__TFA >> 8), (__TFA & 0xFF), \
171 ((uint16_t)__VSA >> 8), (__VSA & 0xFF), \
172 ((uint16_t)__BFA >> 8), (__BFA & 0xFF))
173
174// Synchronization information is not sent from the display module to the host processor
175#define MIPI_DCS_CMD_HEX_CODE_SET_TEAR_OFF 0x34
176#define MIPI_DCS_CMD_SET_TEAR_OFF \
177 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_TEAR_OFF, 0)
178
179// Synchronization information is sent from the display module to the host processor at the start of VFP
180#define MIPI_DCS_CMD_HEX_CODE_SET_TEAR_ON 0x35
181#define MIPI_DCS_CMD_SET_TEAR_ON \
182 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_TEAR_ON, 0)
183
184#define MIPI_DCS_CMD_HEX_CODE_SET_ADDRESS_MODE 0x36
185// bits[7:5]: host processor to display module＊s frame memory
186// Page Address Order, 0 = Top to Bottom, 1 = Bottom to Top
187#define MIPI_DCS_PAGE_ADDRESS_TOP_TO_BOTTOM (0 << 7)
188#define MIPI_DCS_PAGE_ADDRESS_BOTTOM_TO_TOP (1 << 7)
189// Column Address Order, 0 = Left to Right, 1 = Right to Left
190#define MIPI_DCS_COLUME_ADDRESS_LEFT_TO_RIGHT (0 << 6)
191#define MIPI_DCS_COLUME_ADDRESS_RIGHT_TO_LEFT (1 << 6)
192// Page/Column Addressing Order,
193// 0 = Normal Mode, column register is first increment
194// 1 = Reverse Mode, page register is first increment
195#define MIPI_DCS_PAGE_COLUMN_NORMAL_ORDER (0 << 5)
196#define MIPI_DCS_PAGE_COLUMN_REVERSE_ORDER (1 << 5)
197// bits[4:0]: display module＊s frame memory to the display device
198// Display Device Line Refresh Order, 0 = Top line to Bottom line, 1 = Bottom line to Top line
199#define MIPI_DCS_DEVICE_REFRESH_TOP_TO_BOTTOM (0 << 4)
200#define MIPI_DCS_DEVICE_REFRESH_BOTTOM_TO_TOP (1 << 4)
201// RGB/BGR Order, 0 = RGB, 1 = BGR
202#define MIPI_DCS_DEVICE_REFRESH_RGB (0 << 3)
203#define MIPI_DCS_DEVICE_REFRESH_BGR (1 << 3)
204// Display Data Latch Data Order, 0 = left side to the right side, 1 = right side to the left side
205#define MIPI_DCS_LCD_REFRESH_LEFT_TO_RIGHT (0 << 2)
206#define MIPI_DCS_LCD_REFRESH_RIGHT_TO_LEFT (1 << 2)
207// Flip Horizontal, 0 = Normal, 1 = Flipped
208#define MIPI_DCS_FLIP_HORIZONTAL_NORMAL (0 << 1)
209#define MIPI_DCS_FLIP_HORIZONTAL_FLIPPED (1 << 1)
210// Flip Vertical, 0 = Normal, 1 = Flipped
211#define MIPI_DCS_FLIP_VERTICAL_NORMAL (0 << 0)
212#define MIPI_DCS_FLIP_VERTICAL_FLIPPED (1 << 0)
213// TODO: define some mode
214#define MIPI_DCS_CMD_SET_ADDRESS_MODE(__MODE_MASK) \
215 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_ADDRESS_MODE, 1, __MODE_MASK)
216
217// Defines the vertical scrolling starting point
218#define MIPI_DCS_CMD_HEX_CODE_SET_SCROLL_START 0x37
219#define MIPI_DCS_CMD_SET_SCROLL_START(__VSP) \
220 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_SCROLL_START, 2, \
221 ((uint16_t)__VSP >> 8), (__VSP & 0xFF))
222
223// Idle Mode Off
224#define MIPI_DCS_CMD_HEX_CODE_EXIT_IDLE_MODE 0x38
225#define MIPI_DCS_CMD_EXIT_IDLE_MODE \
226 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_EXIT_IDLE_MODE, 0)
227
228// Idle Mode On
229#define MIPI_DCS_CMD_HEX_CODE_ENTER_IDLE_MODE 0x39
230#define MIPI_DCS_CMD_ENTER_IDLE_MODE \
231 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_ENTER_IDLE_MODE, 0)
232
233// TODO
234// Defines how many bits per pixel are used in the interface.
235#define MIPI_DCS_CMD_HEX_CODE_SET_PIXEL_FORMAT 0x3A
236#define MIPI_DCS_PIXEL_FORMAT_BITS_3 0x01
237#define MIPI_DCS_PIXEL_FORMAT_BITS_8 0x02
238#define MIPI_DCS_PIXEL_FORMAT_BITS_12 0x03
239#define MIPI_DCS_PIXEL_FORMAT_BITS_16 0x05
240#define MIPI_DCS_PIXEL_FORMAT_BITS_18 0x06
241#define MIPI_DCS_PIXEL_FORMAT_BITS_24 0x07
242// __BITS IN [3, 8, 12, 16, 18, 24]
243#define MIPI_DCS_PIXEL_FORMAT_BITS(__BITS) MIPI_DCS_PIXEL_FORMAT_BITS_ ## __BITS
244// DPI: Display Pixel Interface, or MCU Interface
245// __BITS IN [3, 8, 12, 16, 18, 24]
246#define MIPI_DCS_PIXEL_FORMAT_DBI_BITS(__BITS) MIPI_DCS_PIXEL_FORMAT_BITS(__BITS)
247// DBI: Display Bus Interface, or System-80 interface
248// __BITS IN [3, 8, 12, 16, 18, 24]
249#define MIPI_DCS_PIXEL_FORMAT_DPI_BITS(__BITS) (MIPI_DCS_PIXEL_FORMAT_BITS(__BITS) << 4)
250#define MIPI_DCS_CMD_SET_PIXEL_FORMAT(__PF) \
251 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_PIXEL_FORMAT, 1, __PF)
252
253// Transfer image information from the Host Processor interface to the peripheral from the last written location.
254#define MIPI_DCS_CMD_HEX_CODE_WRITE_MEMORY_CONTINUE 0x3C
255#define MIPI_DCS_CMD_WRITE_MEMORY_CONTINUE(__LEN, ...) \
256 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_WRITE_MEMORY_CONTINUE, __LEN, ##__VA_ARGS__)
257
258// 3D is used on the display panel
259#define MIPI_DCS_CMD_HEX_CODE_SET_3D_CONTROL 0x3D
260// 3DL/R 每 Left / Right Order, 0 = Data sent left eye first, 1 = Data sent right eye first.
261#define MIPI_DCS_3D_CONTROL_LEFT_EYE_FIRST (0 << 5)
262#define MIPI_DCS_3D_CONTROL_RIGHT_EYE_FIRST (1 << 5)
263// 3DVSYNC 每 Second VSYNC Enabled between Left and Right images
264// 0 = No sync pulses between left and right data.
265// 1 = Sync pulse (HSYNC, VSYNC, blanking) between left and right data.
266#define MIPI_DCS_3D_CONTROL_3DVSYNC_NO (0 << 4)
267#define MIPI_DCS_3D_CONTROL_3DVSYNC_SYNC (1 << 4)
268// 3DFMT[1:0] 每 Stereoscopic Image Format
269// 00 = Line (alternating lines of left and right data)
270// 01 = Frame (alternating frames of left and right data)
271// 10 = Pixel (alternating pixels of left and right data)
272#define MIPI_DCS_3D_CONTROL_3DFMT_LINE (0 << 2)
273#define MIPI_DCS_3D_CONTROL_3DFMT_FRAME (1 << 2)
274#define MIPI_DCS_3D_CONTROL_3DFMT_PIXEL (2 << 2)
275// 3DMODE[1:0] 每 3D Mode On / Off, Display Orientation
276// 00 = 3D Mode Off (2D Mode On).
277// 01 = 3D Mode On, Portrait Orientation
278// 10 = 3D Mode On, Landscape Orientation
279#define MIPI_DCS_3D_CONTROL_3DMODE_OFF (0 << 0)
280#define MIPI_DCS_3D_CONTROL_3DMODE_ON_PO (1 << 0)
281#define MIPI_DCS_3D_CONTROL_3DMODE_ON_LO (2 << 0)
282#define MIPI_DCS_CMD_SET_3D_CONTROL(__V) \
283 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_3D_CONTROL, 2, __V, 0)
284
285// TODO: support read
286//#define MIPI_DCS_CMD_HEX_CODE_READ_MEMORY_CONTINUE 0x3E
287//#define MIPI_DCS_CMD_HEX_CODE_GET_3D_CONTROL 0x3F
288
289// Set VSYNC timing
290#define MIPI_DCS_CMD_HEX_CODE_SET_VSYNC_TIMING 0x40
291// RESET 每 Restart display update, 0 = No operation, 1 = Restart display update
292#define MIPI_DCS_VSYNC_TIMING_NO_RESET (0 << 7)
293#define MIPI_DCS_VSYNC_TIMING_RESET (1 << 7)
294// DIR 每 Line Direction, 0 = Later (Down), 1 = Earlier (Up)
295#define MIPI_DCS_VSYNC_TIMING_LD_LATER (0 << 7)
296#define MIPI_DCS_VSYNC_TIMING_LD_EARLIER (1 << 7)
297// LINES[4:0] 每 Number of Lines in Adjustment
298#define MIPI_DCS_VSYNC_TIMING_LD_LINES(__L) (__L << 1)
299// FRAME 每 Adjustment Frame, 0 = Next Frame, 1 = Frame After Next Frame
300#define MIPI_DCS_VSYNC_TIMING_NEXT_FRAME (0 << 0)
301#define MIPI_DCS_VSYNC_TIMING_FRAME_AFTER_NEXT_FRAME (1 << 0)
302#define MIPI_DCS_CMD_SET_VSYNC_TIMING(__V) \
303 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_VSYNC_TIMING, 1)
304
305// TODO
306// Synchronization information is sent from the display module to
307// the host processor when the display device refresh reaches the provided scanline.
308#define MIPI_DCS_CMD_HEX_CODE_SET_TEAR_SCANLINE 0x44
309#define MIPI_DCS_CMD_SET_TEAR_SCANLINE(__N) \
310 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_TEAR_SCANLINE, 2, \
311 ((uint16_t)__N >> 8), (__N & 0xFF)
312
313// TODO: support read
314//#define MIPI_DCS_CMD_HEX_CODE_GET_SCANLINE 0x45
315
316// TODO: need more doc
317#define MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_BRIGHTNESS 0x51
318#define MIPI_DCS_CMD_SET_DISPLAY_BRIGHTNESS(__B) \
319 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_DISPLAY_BRIGHTNESS, 1, __B)
320
321// TODO: support read
322//#define MIPI_DCS_CMD_HEX_CODE_GET_DISPLAY_BRIGHTNESS 0x52
323
324// TODO: need more doc
325#define MIPI_DCS_CMD_HEX_CODE_WRITE_CONTROL_DISPLAY 0x53
326#define MIPI_DCS_CMD_WRITE_CONTROL_DISPLAY(__DISP) \
327 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_WRITE_CONTROL_DISPLAY, 1, __DISP)
328
329// TODO: support read
330//#define MIPI_DCS_CMD_HEX_CODE_GET_CONTROL_DISPLAY 0x54
331
332// TODO: need more doc
333#define MIPI_DCS_CMD_HEX_CODE_WRITE_POWER_SAVE 0x55
334#define MIPI_DCS_CMD_WRITE_POWER_SAVE(__V) \
335 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_WRITE_POWER_SAVE, 1, __V)
336
337// TODO: support read
338//#define MIPI_DCS_CMD_HEX_CODE_GET_POWER_SAVE 0x56
339
340// TODO: need more doc
341#define MIPI_DCS_CMD_HEX_CODE_SET_CABC_MIN_BRIGHTNESS 0x5E
342#define MIPI_DCS_CMD_SET_CABC_MIN_BRIGHTNESS(__B) \
343 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_CABC_MIN_BRIGHTNESS, 1, __B)
344
345
346
347
348
349// user friendly names of commands
350// address
351#define MIPI_MODE_X_FLIP MIPI_DCS_COLUME_ADDRESS_RIGHT_TO_LEFT
352#define MIPI_MODE_Y_FLIP MIPI_DCS_PAGE_ADDRESS_BOTTOM_TO_TOP
353#define MIPI_MODE_RGB MIPI_DCS_DEVICE_REFRESH_RGB
354#define MIPI_MODE_BGR MIPI_DCS_DEVICE_REFRESH_BGR
355// pixel format
356// pixel bitlen in [3, 8, 12, 16, 18, 24]
357#define MIPI_PIXEL_FORMAT_BITLEN(__BITLEN) MIPI_DCS_PIXEL_FORMAT_DBI_BITS(__BITLEN)
358// soft reset
359#define MIPI_SOFT_RESET MIPI_DCS_CMD_SOFT_RESET
360// sleep sleep
361#define MIPI_ENTER_IDLE MIPI_DCS_CMD_HEX_CODE_ENTER_IDLE_MODE
362// exit sleep
363#define MIPI_EXIT_IDLE MIPI_DCS_CMD_HEX_CODE_EXIT_IDLE_MODE
364// sleep sleep
365#define MIPI_ENTER_SLEEP MIPI_DCS_CMD_ENTER_SLEEP_MODE
366// exit sleep
367#define MIPI_EXIT_SLEEP MIPI_DCS_CMD_EXIT_SLEEP_MODE
368// the part of display
369#define MIPI_ENTER_PARTIAL_MODE MIPI_DCS_CMD_ENTER_PARTIAL_MODE
370// the whole of display
371#define MIPI_EXIT_PARTIAL_MODE MIPI_DCS_CMD_ENTER_NORMAL_MODE
372// inverted colors
373#define MIPI_ENTER_INVERT_MODE MIPI_DCS_CMD_HEX_CODE_ENTER_INVERT_MODE
374// normal colors
375#define MIPI_EXIT_INVERT_MODE MIPI_DCS_CMD_HEX_CODE_EXIT_INVERT_MODE
376// tearing effect output pin on
377#define MIPI_TEAR_PIN_ON MIPI_DCS_CMD_SET_TEAR_ON
378// tearing effect output off
379#define MIPI_TEAR_PIN_OFF MIPI_DCS_CMD_SET_TEAR_OFF
380
381
382
383
384
385#define VSF_DISP_MIPI_LCD_INITSEQ(__LCD_SEQ, ...) \
386 __LCD_SEQ, \
387 ##__VA_ARGS__, \
388 MIPI_DCS_CMD_SET_DISPLAY_ON
389
390
391
392
393
394// LCD configurations
395
396#define VSF_DISP_MIPI_LCD_CO5300_BASE \
397 VSF_DISP_MIPI_LCD_WRITE(0xFE, 1, 0x20), \
398 VSF_DISP_MIPI_LCD_WRITE(0xF4, 1, 0x5A), \
399 VSF_DISP_MIPI_LCD_WRITE(0xF5, 1, 0x59), \
400 VSF_DISP_MIPI_LCD_WRITE(0xFE, 1, 0x20), \
401 VSF_DISP_MIPI_LCD_WRITE(0xF4, 1, 0xA5), \
402 VSF_DISP_MIPI_LCD_WRITE(0xF5, 1, 0xA5), \
403 VSF_DISP_MIPI_LCD_WRITE(0xFE, 1, 0x00), \
404 VSF_DISP_MIPI_LCD_WRITE(0xC4, 1, 0x80), \
405 VSF_DISP_MIPI_LCD_WRITE(0x3A, 1, 0x55), \
406 VSF_DISP_MIPI_LCD_WRITE(0x35, 1, 0x00), \
407 VSF_DISP_MIPI_LCD_WRITE(0x53, 1, 0x20), \
408 VSF_DISP_MIPI_LCD_WRITE(0x63, 1, 0xFF), \
409 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_EXIT_SLEEP_MODE, 0)
410
411#define VSF_DISP_MIPI_LCD_S6D05A1_BASE \
412 VSF_DISP_MIPI_LCD_WRITE(0xF0, 2, 0x5A, 0x5A), /*PASSWD1*/ \
413 VSF_DISP_MIPI_LCD_WRITE(0xF1, 2, 0x5A, 0x5A), /*PASSWD2*/ \
414 VSF_DISP_MIPI_LCD_WRITE(0xF2, 19, 0x3B, 0x40, 0x03, 0x04, 0x02, 0x08, 0x08, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40, 0x08, 0x08, 0x08, 0x08), /*DISCTL*/ \
415 VSF_DISP_MIPI_LCD_WRITE(0xF4, 14, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d, 0x03, 0x00, 0x70, 0x03), /*PWRCTL*/ \
416 VSF_DISP_MIPI_LCD_WRITE(0xF5, 12, 0x00, 0x54, 0x73, 0x00, 0x00, 0x04, 0x00, 0x00, 0x04, 0x00, 0x53, 0x71), /*VCMCTL*/ \
417 VSF_DISP_MIPI_LCD_WRITE(0xF6, 8, 0x04, 0x00, 0x08, 0x03, 0x01, 0x00, 0x01, 0x00), /*SRCCTL*/ \
418 VSF_DISP_MIPI_LCD_WRITE(0xF7, 5, 0x48, 0x80, 0x10, 0x02, 0x00), /*IFCTL*/ \
419 VSF_DISP_MIPI_LCD_WRITE(0xF8, 2, 0x11, 0x00), /*PANELCTL*/ \
420 VSF_DISP_MIPI_LCD_WRITE(0xF9, 1, 0x27), /*GAMMASEL*/ \
421 VSF_DISP_MIPI_LCD_WRITE(0xFA, 20, 0x0B, 0x0B, 0x0F, 0x26, 0x2A, 0x30, 0x33, 0x12, 0x1F, 0x25, 0x31, 0x30, 0x24, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x3F) /*PGAMMACTL*/
422
423#define VSF_DISP_MIPI_LCD_ILI9488_BASE \
424 VSF_DISP_MIPI_LCD_WRITE(0xE0, 15, 0x00, 0x07, 0x0f, 0x0D, 0x1B, 0x0A, 0x3c, 0x78, 0x4A, 0x07, 0x0E, 0x09, 0x1B, 0x1e, 0x0f), /* Positive Gamma Control */ \
425 VSF_DISP_MIPI_LCD_WRITE(0xE1, 15, 0x00, 0x22, 0x24, 0x06, 0x12, 0x07, 0x36, 0x47, 0x47, 0x06, 0x0a, 0x07, 0x30, 0x37, 0x0f), /* Negative Gamma Control */ \
426 VSF_DISP_MIPI_LCD_WRITE(0xC0, 2, 0x10, 0x10), /* Power Control 1 */ \
427 VSF_DISP_MIPI_LCD_WRITE(0xC1, 1, 0x41), /* Power Control 2 */ \
428 VSF_DISP_MIPI_LCD_WRITE(0xC5, 3, 0x00, 0x22, 0x80), /* VCOM Control */ \
429 VSF_DISP_MIPI_LCD_WRITE(0xB0, 1, 0x00), /* Interface Mode Control */ \
430 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x60, 0x11), /* frame rate control */ \
431 VSF_DISP_MIPI_LCD_WRITE(0xB4, 1, 0x02), /* Display Inversion Control */ \
432 VSF_DISP_MIPI_LCD_WRITE(0xB6, 2, 0x02, 0x02), /* Display Function Control */ \
433 VSF_DISP_MIPI_LCD_WRITE(0xB7, 1, 0x06), /* Entry Mode Set */ \
434 VSF_DISP_MIPI_LCD_WRITE(0xE9, 1, 0x00), /* Set Image Function: 24bit data bus */ \
435 VSF_DISP_MIPI_LCD_WRITE(0xF7, 4, 0xA9, 0x51, 0x2C, 0x82) /* Adjust Control 3 */
436
437#define VSF_DISP_MIPI_LCD_ILI9341_BASE \
438 VSF_DISP_MIPI_LCD_WRITE(0xCF, 3, 0x00, 0xC1, 0x30), \
439 VSF_DISP_MIPI_LCD_WRITE(0xED, 4, 0x64, 0x03, 0x12, 0x81), \
440 VSF_DISP_MIPI_LCD_WRITE(0xE8, 3, 0x85, 0x10, 0x7A), \
441 VSF_DISP_MIPI_LCD_WRITE(0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02), \
442 VSF_DISP_MIPI_LCD_WRITE(0xF7, 1, 0x20), \
443 VSF_DISP_MIPI_LCD_WRITE(0xEA, 2, 0x00, 0x00), \
444 VSF_DISP_MIPI_LCD_WRITE(0xC0, 1, 0x1B), /* Power Control 1 */ \
445 VSF_DISP_MIPI_LCD_WRITE(0xC1, 1, 0x01), /* Power Control 2 */ \
446 VSF_DISP_MIPI_LCD_WRITE(0xC5, 2, 0x30, 0x30), /* VCOM Control */ \
447 VSF_DISP_MIPI_LCD_WRITE(0xC7, 1, 0xB7), /* VCOM Control 2 */ \
448 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x01, 0x1B), /* frame rate control */ \
449 VSF_DISP_MIPI_LCD_WRITE(0xB6, 2, 0x02, 0x82), /* Display Function Control */ \
450 VSF_DISP_MIPI_LCD_WRITE(0xB5, 4, 0x5F, 0x5F, 0x3F, 0x3F), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
451 VSF_DISP_MIPI_LCD_WRITE(0xF2, 1, 0x00), \
452 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_GAMMA_CURVE, 1, 0x01), /* Gamma Set */ \
453 VSF_DISP_MIPI_LCD_WRITE(0xE0, 15, 0x0F, 0x2A, 0x28, 0x08, 0x0E, 0x08, 0x54, 0xA9, 0x43, 0x0A, 0x0F, 0x00, 0x00, 0x00, 0x00), /* Positive Gamma Control */ \
454 VSF_DISP_MIPI_LCD_WRITE(0xE1, 15, 0x00, 0x15, 0x17, 0x07, 0x11, 0x06, 0x2B, 0x56, 0x3C, 0x05, 0x10, 0x0F, 0x3F, 0x3F, 0x0F) /* Negative Gamma Control */
455
456#define VSF_DISP_MIPI_LCD_ST7789V_BASE \
457 VSF_DISP_MIPI_LCD_WRITE(0xB1, 3, 0x40, 0x7F, 0x14), /* RGB Interface Control */ \
458 VSF_DISP_MIPI_LCD_WRITE(0xB2, 5, 0x0C, 0x0C, 0x00, 0x33, 0x33), /* Porch Setting */ \
459 VSF_DISP_MIPI_LCD_WRITE(0xB7, 1, 0x35), /* Gate Control */ \
460 VSF_DISP_MIPI_LCD_WRITE(0xBB, 1, 0x20), /* VCOM Setting */ \
461 VSF_DISP_MIPI_LCD_WRITE(0xC0, 1, 0x2C), /* LCM Control */ \
462 VSF_DISP_MIPI_LCD_WRITE(0xC2, 1, 0x01), /* VDV and VRH Command Enable */ \
463 VSF_DISP_MIPI_LCD_WRITE(0xC3, 1, 0x0B), /* VRH Set */ \
464 VSF_DISP_MIPI_LCD_WRITE(0xC4, 1, 0x20), /* VDV Set */ \
465 VSF_DISP_MIPI_LCD_WRITE(0xC6, 1, 0x1F), /* Frame Rate Control in Normal Mode, 1F: 39 */ \
466 VSF_DISP_MIPI_LCD_WRITE(0xD0, 2, 0xA4, 0xA1), /* Power Control 1 */ \
467 VSF_DISP_MIPI_LCD_WRITE(0xE0, 14, 0xD0, 0x03, 0x09, 0x0E, 0x11, 0x3D, 0x47, 0x55, 0x53, 0x1A, 0x16, 0x14, 0x1F, 0x22), /* Positive Voltage Gamma Control */ \
468 VSF_DISP_MIPI_LCD_WRITE(0xE1, 14, 0xD0, 0x02, 0x08, 0x0D, 0x12, 0x2C, 0x43, 0x55, 0x53, 0x1E, 0x1B, 0x19, 0x20, 0x22) /* Negative Voltage Gamma Control */
469
470#define VSF_DISP_MIPI_LCD_ST7796S_BASE \
471 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0xC3), /* Command Set Control, C3h enable command 2 part I */ \
472 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x96), /* Command Set Control, 96h enable command 2 part II */ \
473 VSF_DISP_MIPI_LCD_WRITE(0xE8, 8, 0x40, 0x82, 0x07, 0x18, 0x27, 0x0A, 0xB6, 0x33), /* Display Output Ctrl Adjust */ \
474 VSF_DISP_MIPI_LCD_WRITE(0xC5, 1, 0x27), /* VCOM Control */ \
475 VSF_DISP_MIPI_LCD_WRITE(0xC2, 1, 0xA7), /* Power Control 3 */ \
476 VSF_DISP_MIPI_LCD_WRITE(0xE0, 14, 0xF0, 0x01, 0x06, 0x0F, 0x12, 0x1D, 0x36, 0x54, 0x44, 0x0C, 0x18, 0x16, 0x13, 0x15), /* Positive Gamma Control */ \
477 VSF_DISP_MIPI_LCD_WRITE(0xE1, 14, 0xF0, 0x01, 0x05, 0x0A, 0x0B, 0x07, 0x32, 0x44, 0x44, 0x0C, 0x18, 0x17, 0x13, 0x16), /* Negative Gamma Control */ \
478 VSF_DISP_MIPI_LCD_WRITE(0xB5, 4, 0xFF, 0xFF, 0x00, 0x04), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
479 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x00, 0x10), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
480 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x3C), /* Command Set Control, 3Ch disable command 2 part I */ \
481 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x69) /* Command Set Control, 69h disable command 2 part II */
482
483/*============================ TYPES =========================================*/
484/*============================ GLOBAL VARIABLES ==============================*/
485/*============================ PROTOTYPES ====================================*/
486
487#ifdef __cplusplus
488}
489#endif
490
491#endif // VSF_USE_UI
492#endif // __VSF_DISP_MIPI_SPI_LCD_H__
Generated from commit: vsfteam/vsf@2b286be