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vsf_disp_mipi_spi_lcd.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17#ifndef __VSF_DISP_MIPI_SPI_LCD_H__
18#define __VSF_DISP_MIPI_SPI_LCD_H__
19
20/*============================ INCLUDES ======================================*/
21
22#include "component/ui/vsf_ui_cfg.h"
23
24#if VSF_USE_UI == ENABLED && VSF_DISP_USE_MIPI_SPI_LCD == ENABLED
25
26#include "kernel/vsf_kernel.h"
27#include "hal/vsf_hal.h"
28
29#if defined(__VSF_DISP_MIPI_SPI_LCD_CLASS_IMPLEMENT)
30# define __VSF_CLASS_IMPLEMENT__
31#endif
32
33#include "./vsf_disp_mipi_lcd_dcs.h"
34
35#include "utilities/ooc_class.h"
36
37#ifdef __cplusplus
38extern "C" {
39#endif
40
41// TODO: add scrolling demo
42
43/*============================ MACROS ========================================*/
44
45#if VSF_HAL_USE_SPI != ENABLED
46# error "need VSF_HAL_USE_SPI"
47#endif
48
49#ifndef VSF_DISP_MIPI_SPI_LCD_SUPPORT_HARDWARE_RESET
50# define VSF_DISP_MIPI_SPI_LCD_SUPPORT_HARDWARE_RESET ENABLED
51#endif
52
53#ifndef VSF_DISP_MIPI_SPI_LCD_USING_VSF_GPIO
54# define VSF_DISP_MIPI_SPI_LCD_USING_VSF_GPIO ENABLED
55#endif
56
57#define VSF_DISP_MIPI_SPI_LCD_SPI_8BITS_MODE 0
58#define VSF_DISP_MIPI_SPI_LCD_SPI_9BITS_MODE 1
59
60#ifndef VSF_DISP_MIPI_SPI_LCD_SPI_MODE
61# define VSF_DISP_MIPI_SPI_LCD_SPI_MODE VSF_DISP_MIPI_SPI_LCD_SPI_8BITS_MODE
62#endif
63
64#if (VSF_DISP_MIPI_SPI_LCD_SPI_MODE != VSF_DISP_MIPI_SPI_LCD_SPI_8BITS_MODE)\
65 && (VSF_DISP_MIPI_SPI_LCD_SPI_MODE != VSF_DISP_MIPI_SPI_LCD_SPI_9BITS_MODE)
66# error "vsf_disp_mipi_spi_lcd: error spi mode"
67#endif
68
69#if VSF_DISP_MIPI_SPI_LCD_SPI_MODE == VSF_DISP_MIPI_SPI_LCD_SPI_9BITS_MODE
70# error "TODO: support 9bit spi mode"
71#endif
72
73// address
74#define MIPI_MODE_X_FLIP MIPI_DCS_COLUME_ADDRESS_RIGHT_TO_LEFT
75#define MIPI_MODE_Y_FLIP MIPI_DCS_PAGE_ADDRESS_BOTTOM_TO_TOP
76#define MIPI_MODE_RGB MIPI_DCS_DEVICE_REFRESH_RGB
77#define MIPI_MODE_BGR MIPI_DCS_DEVICE_REFRESH_BGR
78// pixel format
79// pixel bitlen in [3, 8, 12, 16, 18, 24]
80#define MIPI_PIXEL_FORMAT_BITLEN(__BITLEN) MIPI_DCS_PIXEL_FORMAT_DBI_BITS(__BITLEN)
81// soft reset
82#define MIPI_SOFT_RESET MIPI_DCS_CMD_SOFT_RESET
83// sleep sleep
84#define MIPI_ENTER_IDLE MIPI_DCS_CMD_HEX_CODE_ENTER_IDLE_MODE
85// exit sleep
86#define MIPI_EXIT_IDLE MIPI_DCS_CMD_HEX_CODE_EXIT_IDLE_MODE
87// sleep sleep
88#define MIPI_ENTER_SLEEP MIPI_DCS_CMD_ENTER_SLEEP_MODE
89// exit sleep
90#define MIPI_EXIT_SLEEP MIPI_DCS_CMD_EXIT_SLEEP_MODE
91// the part of display
92#define MIPI_ENTER_PARTIAL_MODE MIPI_DCS_CMD_ENTER_PARTIAL_MODE
93// the whole of display
94#define MIPI_EXIT_PARTIAL_MODE MIPI_DCS_CMD_ENTER_NORMAL_MODE
95// inverted colors
96#define MIPI_ENTER_INVERT_MODE MIPI_DCS_CMD_HEX_CODE_ENTER_INVERT_MODE
97// normal colors
98#define MIPI_EXIT_INVERT_MODE MIPI_DCS_CMD_HEX_CODE_EXIT_INVERT_MODE
99// tearing effect output pin on
100#define MIPI_TEAR_PIN_ON MIPI_DCS_CMD_SET_TEAR_ON
101// tearing effect output off
102#define MIPI_TEAR_PIN_OFF MIPI_DCS_CMD_SET_TEAR_OFF
103
165#define VSF_DISP_MIPI_SPI_LCD_INITSEQ(__LCD_SEQ, __PIXEL_FORMAT, __MODE, ...) \
166 __LCD_SEQ, \
167 MIPI_DCS_CMD_SET_ADDRESS_MODE(__MODE), \
168 MIPI_DCS_CMD_SET_PIXEL_FORMAT(__PIXEL_FORMAT), \
169 MIPI_DCS_CMD_SET_DISPLAY_ON, \
170 ##__VA_ARGS__
171
172#define VSF_DISP_MIPI_SPI_LCD_S6D05A1_BASE \
173 VSF_DISP_MIPI_LCD_WRITE(0xF0, 2, 0x5A, 0x5A), /*PASSWD1*/ \
174 VSF_DISP_MIPI_LCD_WRITE(0xF1, 2, 0x5A, 0x5A), /*PASSWD2*/ \
175 VSF_DISP_MIPI_LCD_WRITE(0xF2, 19, 0x3B, 0x40, 0x03, 0x04, 0x02, 0x08, 0x08, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40, 0x08, 0x08, 0x08, 0x08), /*DISCTL*/ \
176 VSF_DISP_MIPI_LCD_WRITE(0xF4, 14, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d, 0x03, 0x00, 0x70, 0x03), /*PWRCTL*/ \
177 VSF_DISP_MIPI_LCD_WRITE(0xF5, 12, 0x00, 0x54, 0x73, 0x00, 0x00, 0x04, 0x00, 0x00, 0x04, 0x00, 0x53, 0x71), /*VCMCTL*/ \
178 VSF_DISP_MIPI_LCD_WRITE(0xF6, 8, 0x04, 0x00, 0x08, 0x03, 0x01, 0x00, 0x01, 0x00), /*SRCCTL*/ \
179 VSF_DISP_MIPI_LCD_WRITE(0xF7, 5, 0x48, 0x80, 0x10, 0x02, 0x00), /*IFCTL*/ \
180 VSF_DISP_MIPI_LCD_WRITE(0xF8, 2, 0x11, 0x00), /*PANELCTL*/ \
181 VSF_DISP_MIPI_LCD_WRITE(0xF9, 1, 0x27), /*GAMMASEL*/ \
182 VSF_DISP_MIPI_LCD_WRITE(0xFA, 20, 0x0B, 0x0B, 0x0F, 0x26, 0x2A, 0x30, 0x33, 0x12, 0x1F, 0x25, 0x31, 0x30, 0x24, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x3F) /*PGAMMACTL*/
183
184#define VSF_DISP_MIPI_SPI_LCD_ILI9488_BASE \
185 VSF_DISP_MIPI_LCD_WRITE(0xE0, 15, 0x00, 0x07, 0x0f, 0x0D, 0x1B, 0x0A, 0x3c, 0x78, 0x4A, 0x07, 0x0E, 0x09, 0x1B, 0x1e, 0x0f), /* Positive Gamma Control */ \
186 VSF_DISP_MIPI_LCD_WRITE(0xE1, 15, 0x00, 0x22, 0x24, 0x06, 0x12, 0x07, 0x36, 0x47, 0x47, 0x06, 0x0a, 0x07, 0x30, 0x37, 0x0f), /* Negative Gamma Control */ \
187 VSF_DISP_MIPI_LCD_WRITE(0xC0, 2, 0x10, 0x10), /* Power Control 1 */ \
188 VSF_DISP_MIPI_LCD_WRITE(0xC1, 1, 0x41), /* Power Control 2 */ \
189 VSF_DISP_MIPI_LCD_WRITE(0xC5, 3, 0x00, 0x22, 0x80), /* VCOM Control */ \
190 VSF_DISP_MIPI_LCD_WRITE(0xB0, 1, 0x00), /* Interface Mode Control */ \
191 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x60, 0x11), /* frame rate control */ \
192 VSF_DISP_MIPI_LCD_WRITE(0xB4, 1, 0x02), /* Display Inversion Control */ \
193 VSF_DISP_MIPI_LCD_WRITE(0xB6, 2, 0x02, 0x02), /* Display Function Control */ \
194 VSF_DISP_MIPI_LCD_WRITE(0xB7, 1, 0x06), /* Entry Mode Set */ \
195 VSF_DISP_MIPI_LCD_WRITE(0xE9, 1, 0x00), /* Set Image Function: 24bit data bus */ \
196 VSF_DISP_MIPI_LCD_WRITE(0xF7, 4, 0xA9, 0x51, 0x2C, 0x82) /* Adjust Control 3 */
197
198#define VSF_DISP_MIPI_SPI_LCD_ILI9341_BASE \
199 VSF_DISP_MIPI_LCD_WRITE(0xCF, 3, 0x00, 0xC1, 0x30), \
200 VSF_DISP_MIPI_LCD_WRITE(0xED, 4, 0x64, 0x03, 0x12, 0x81), \
201 VSF_DISP_MIPI_LCD_WRITE(0xE8, 3, 0x85, 0x10, 0x7A), \
202 VSF_DISP_MIPI_LCD_WRITE(0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02), \
203 VSF_DISP_MIPI_LCD_WRITE(0xF7, 1, 0x20), \
204 VSF_DISP_MIPI_LCD_WRITE(0xEA, 2, 0x00, 0x00), \
205 VSF_DISP_MIPI_LCD_WRITE(0xC0, 1, 0x1B), /* Power Control 1 */ \
206 VSF_DISP_MIPI_LCD_WRITE(0xC1, 1, 0x01), /* Power Control 2 */ \
207 VSF_DISP_MIPI_LCD_WRITE(0xC5, 2, 0x30, 0x30), /* VCOM Control */ \
208 VSF_DISP_MIPI_LCD_WRITE(0xC7, 1, 0xB7), /* VCOM Control 2 */ \
209 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x01, 0x1B), /* frame rate control */ \
210 VSF_DISP_MIPI_LCD_WRITE(0xB6, 2, 0x02, 0x82), /* Display Function Control */ \
211 VSF_DISP_MIPI_LCD_WRITE(0xB5, 4, 0x5F, 0x5F, 0x3F, 0x3F), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
212 VSF_DISP_MIPI_LCD_WRITE(0xF2, 1, 0x00), \
213 VSF_DISP_MIPI_LCD_WRITE(MIPI_DCS_CMD_HEX_CODE_SET_GAMMA_CURVE, 1, 0x01), /* Gamma Set */ \
214 VSF_DISP_MIPI_LCD_WRITE(0xE0, 15, 0x0F, 0x2A, 0x28, 0x08, 0x0E, 0x08, 0x54, 0xA9, 0x43, 0x0A, 0x0F, 0x00, 0x00, 0x00, 0x00), /* Positive Gamma Control */ \
215 VSF_DISP_MIPI_LCD_WRITE(0xE1, 15, 0x00, 0x15, 0x17, 0x07, 0x11, 0x06, 0x2B, 0x56, 0x3C, 0x05, 0x10, 0x0F, 0x3F, 0x3F, 0x0F) /* Negative Gamma Control */
216
217#define VSF_DISP_MIPI_SPI_LCD_ST7789V_BASE \
218 VSF_DISP_MIPI_LCD_WRITE(0xB1, 3, 0x40, 0x7F, 0x14), /* RGB Interface Control */ \
219 VSF_DISP_MIPI_LCD_WRITE(0xB2, 5, 0x0C, 0x0C, 0x00, 0x33, 0x33), /* Porch Setting */ \
220 VSF_DISP_MIPI_LCD_WRITE(0xB7, 1, 0x35), /* Gate Control */ \
221 VSF_DISP_MIPI_LCD_WRITE(0xBB, 1, 0x20), /* VCOM Setting */ \
222 VSF_DISP_MIPI_LCD_WRITE(0xC0, 1, 0x2C), /* LCM Control */ \
223 VSF_DISP_MIPI_LCD_WRITE(0xC2, 1, 0x01), /* VDV and VRH Command Enable */ \
224 VSF_DISP_MIPI_LCD_WRITE(0xC3, 1, 0x0B), /* VRH Set */ \
225 VSF_DISP_MIPI_LCD_WRITE(0xC4, 1, 0x20), /* VDV Set */ \
226 VSF_DISP_MIPI_LCD_WRITE(0xC6, 1, 0x1F), /* Frame Rate Control in Normal Mode, 1F: 39 */ \
227 VSF_DISP_MIPI_LCD_WRITE(0xD0, 2, 0xA4, 0xA1), /* Power Control 1 */ \
228 VSF_DISP_MIPI_LCD_WRITE(0xE0, 14, 0xD0, 0x03, 0x09, 0x0E, 0x11, 0x3D, 0x47, 0x55, 0x53, 0x1A, 0x16, 0x14, 0x1F, 0x22), /* Positive Voltage Gamma Control */ \
229 VSF_DISP_MIPI_LCD_WRITE(0xE1, 14, 0xD0, 0x02, 0x08, 0x0D, 0x12, 0x2C, 0x43, 0x55, 0x53, 0x1E, 0x1B, 0x19, 0x20, 0x22) /* Negative Voltage Gamma Control */
230
231#define VSF_DISP_ST7789V_SPI_INITSEQ(__MODE, __PIXEL_FORMAT, ...) \
232 VSF_DISP_MIPI_SPI_LCD_ST7789V_BASE, \
233 MIPI_DCS_CMD_SET_ADDRESS_MODE(__MODE), \
234 MIPI_DCS_CMD_SET_PIXEL_FORMAT(__PIXEL_FORMAT), \
235 MIPI_DCS_CMD_SET_DISPLAY_ON, \
236 ##__VA_ARGS__
237
238#define VSF_DISP_MIPI_SPI_LCD_ST7796S_BASE \
239 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0xC3), /* Command Set Control, C3h enable command 2 part I */ \
240 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x96), /* Command Set Control, 96h enable command 2 part II */ \
241 VSF_DISP_MIPI_LCD_WRITE(0xE8, 8, 0x40, 0x82, 0x07, 0x18, 0x27, 0x0A, 0xB6, 0x33), /* Display Output Ctrl Adjust */ \
242 VSF_DISP_MIPI_LCD_WRITE(0xC5, 1, 0x27), /* VCOM Control */ \
243 VSF_DISP_MIPI_LCD_WRITE(0xC2, 1, 0xA7), /* Power Control 3 */ \
244 VSF_DISP_MIPI_LCD_WRITE(0xE0, 14, 0xF0, 0x01, 0x06, 0x0F, 0x12, 0x1D, 0x36, 0x54, 0x44, 0x0C, 0x18, 0x16, 0x13, 0x15), /* Positive Gamma Control */ \
245 VSF_DISP_MIPI_LCD_WRITE(0xE1, 14, 0xF0, 0x01, 0x05, 0x0A, 0x0B, 0x07, 0x32, 0x44, 0x44, 0x0C, 0x18, 0x17, 0x13, 0x16), /* Negative Gamma Control */ \
246 VSF_DISP_MIPI_LCD_WRITE(0xB5, 4, 0xFF, 0xFF, 0x00, 0x04), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
247 VSF_DISP_MIPI_LCD_WRITE(0xB1, 2, 0x00, 0x10), /* Blanking Porch Control, VFP/VBP/0x00/HBP */ \
248 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x3C), /* Command Set Control, 3Ch disable command 2 part I */ \
249 VSF_DISP_MIPI_LCD_WRITE(0xF0, 1, 0x69) /* Command Set Control, 69h disable command 2 part II */
250
251#define VSF_DISP_MIPI_SPI_LCD_REFRESH_SEQ_LEN \
252 (1 + 1 + 4) + (1 + 1 + 4) + (1 + 1 + 4 + 4)
253
254/*============================ TYPES =========================================*/
255
256vsf_class(vk_disp_mipi_spi_lcd_t) {
257 public_member(
258 implement(vk_disp_t)
259 vsf_spi_t *spi;
260 uint32_t clock_hz;
261 const uint8_t *init_seq;
262 const uint16_t init_seq_len;
263#if VSF_DISP_MIPI_SPI_LCD_USING_VSF_GPIO == ENABLED
264 struct {
265 vsf_gpio_t * gpio;
266 uint32_t pin_mask;
267 } reset, dcx;
268#endif
269 )
270
271 private_member(
272 vsf_teda_t teda;
273 vsf_eda_evthandler_t evthandler;
274
275 vk_disp_area_t area;
276 uint8_t *cur_buffer;
277
278 uint8_t refresh_seq[VSF_DISP_MIPI_SPI_LCD_REFRESH_SEQ_LEN];
279#if VSF_DISP_MIPI_SPI_LCD_SUPPORT_HARDWARE_RESET == ENABLED
280 uint8_t reset_state : 1;
281#endif
282
283 struct {
284 const uint8_t *buf;
285 uint16_t max_cnt;
286 uint16_t cur_cnt;
287 } seq;
288
289 struct {
290 uint8_t cmd;
291 uint32_t param_size;
292 void *param_buffer;
293 } cmd;
294 )
295};
296
297/*============================ GLOBAL VARIABLES ==============================*/
298
299extern const vk_disp_drv_t vk_disp_drv_mipi_spi_lcd;
300
301/*============================ PROTOTYPES ====================================*/
302
303extern void vsf_disp_mipi_spi_lcd_wait_te_line_ready(vk_disp_mipi_spi_lcd_t *disp_mipi_spi_lcd);
304
305#if VSF_DISP_MIPI_SPI_LCD_SPI_MODE == VSF_DISP_MIPI_SPI_LCD_SPI_8BITS_MODE
306extern void vsf_disp_mipi_spi_lcd_dcx_io_write(vk_disp_mipi_spi_lcd_t *disp_mipi_spi_lcd, bool state);
307#endif
308
309#ifdef __cplusplus
310}
311#endif
312
313#endif // VSF_USE_UI
314#endif // __VSF_DISP_MIPI_SPI_LCD_H__
vk_disp_drv_t
Definition vsf_disp.h:149
vk_disp_mipi_spi_lcd_t
Definition vsf_disp_mipi_spi_lcd.h:256
vk_disp_t
Definition vsf_disp.h:173
vsf_teda_t
Definition vsf_eda.h:834
uint16_t
unsigned short uint16_t
Definition lvgl.h:41
uint32_t
unsigned int uint32_t
Definition lvgl.h:43
uint8_t
unsigned char uint8_t
Definition lvgl.h:40
ooc_class.h
vsf_class
#define vsf_class(__name)
Definition ooc_class.h:48
vk_disp_area_t
Definition vsf_disp.h:144
vsf_gpio_t
Definition vsf_template_gpio.h:491
vsf_spi_t
Definition vsf_template_spi.h:541
vsf_disp_mipi_lcd_dcs.h
vsf_disp_mipi_spi_lcd_dcx_io_write
void vsf_disp_mipi_spi_lcd_dcx_io_write(vk_disp_mipi_spi_lcd_t *disp_mipi_spi_lcd, bool state)
Definition vsf_disp_mipi_spi_lcd.c:127
vsf_disp_mipi_spi_lcd_wait_te_line_ready
void vsf_disp_mipi_spi_lcd_wait_te_line_ready(vk_disp_mipi_spi_lcd_t *disp_mipi_spi_lcd)
Definition vsf_disp_mipi_spi_lcd.c:106
VSF_DISP_MIPI_SPI_LCD_REFRESH_SEQ_LEN
#define VSF_DISP_MIPI_SPI_LCD_REFRESH_SEQ_LEN
Definition vsf_disp_mipi_spi_lcd.h:251
vk_disp_drv_mipi_spi_lcd
const vk_disp_drv_t vk_disp_drv_mipi_spi_lcd
Definition vsf_disp_mipi_spi_lcd.c:92
vsf_eda_evthandler_t
void(* vsf_eda_evthandler_t)(vsf_eda_t *eda, vsf_evt_t evt)
Definition vsf_eda.h:656
vsf_hal.h
vsf_kernel.h
state
uint8_t state
Definition vsf_msg_tree.h:247
vsf_ui_cfg.h
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