vsf_wifi_rt28xx.c File Reference

#include "../../vsf_wifi.h"
#include "../../vsf_wifi_priv.h"
#include <stdlib.h>

Data Structures
struct	rt28xx_rf_channel_t

Macros
#define	RT28XX_PBF_SYS_CTRL   0x0400
#define	RT28XX_PBF_SYS_CTRL_READY   (1u << 7)
#define	RT28XX_PBF_SYS_CTRL_RESET13   (1u << 13)
#define	RT28XX_PBF_CFG   0x0408
#define	RT28XX_USB_DMA_CFG   0x02A0
#define	RT28XX_WPDMA_GLO_CFG   0x0208
#define	RT28XX_FW_FIRMWARE_BASE   0x3000 /* base for fw upload */
#define	RT28XX_USB_DEVICE_MODE   1
#define	RT28XX_USB_MODE_RESET   1
#define	RT28XX_USB_MODE_FIRMWARE   8
#define	RT28XX_EFUSE_CTRL   0x0580
#define	RT28XX_EFUSE_DATA0   0x0590
#define	RT28XX_EFUSE_DATA1   0x0594
#define	RT28XX_EFUSE_DATA2   0x0598
#define	RT28XX_EFUSE_DATA3   0x059C
#define	RT28XX_EFUSE_KICK   (1u << 30)
#define	RT28XX_EFUSE_PRESENT   (1u << 31)
#define	RT28XX_EFUSE_AIN_SHIFT   17 /* EFUSE_CTRL_ADDRESS_IN = 0x03fe0000 */
#define	RT28XX_EFUSE_MODE_SHIFT   6 /* EFUSE_CTRL_MODE = 0x000000c0 */
#define	RT28XX_EFUSE_FREQ_WORD   0x1d /* EEPROM_FREQ (RT5592) */
#define	RT28XX_EFUSE_FREQ_BLOCK   24 /* 8-word block (0x18) holding word 0x1d */
#define	RT28XX_RFCSR17_CODE   0x7f /* ref RFCSR17_CODE */
#define	RT28XX_FREQ_OFFSET_BOUND   0x5f /* ref FREQ_OFFSET_BOUND */
#define	RT28XX_EFUSE_IQ_BLOCK   152 /* word 0x98, holds bytes 0x130.. */
#define	RT28XX_BBP158_IQ_INDEX   158 /* IQ cal index register */
#define	RT28XX_BBP159_IQ_VALUE   159 /* IQ cal value register */
#define	RT28XX_H2M_MAILBOX_CSR   0x7010
#define	RT28XX_H2M_MAILBOX_CID   0x7014
#define	RT28XX_H2M_MAILBOX_STATUS   0x701C
#define	RT28XX_H2M_INT_SRC   0x7024
#define	RT28XX_H2M_BBP_AGENT   0x7028
#define	RT28XX_HOST_CMD_CSR   0x0404
#define	RT28XX_H2M_MAILBOX_OWNER   0x01000000u
#define	RT28XX_MCU_BOOT_SIGNAL   0x72
#define	RT28XX_ASIC_VER_ID   0x1000
#define	RT28XX_REV_RT5592C   0x0221
#define	RT28XX_MAC_SYS_CTRL   0x1004
#define	RT28XX_MAC_ADDR_DW0   0x1008
#define	RT28XX_MAC_ADDR_DW1   0x100C
#define	RT28XX_MAC_BSSID_DW0   0x1010
#define	RT28XX_MAC_BSSID_DW1   0x1014
#define	RT28XX_MAC_MAX_LEN_CFG   0x1018
#define	RT28XX_BBP_CSR_CFG   0x101C
#define	RT28XX_TX_STA_FIFO   0x1718
#define	RT28XX_RF_CSR_CFG   0x0500
#define	RT28XX_LED_CFG   0x1024
#define	RT28XX_AMPDU_MAX_LEN_20M1S   0x1030
#define	RT28XX_AMPDU_MAX_LEN_40M1S   0x1034
#define	RT28XX_TX_PIN_CFG   0x1328
#define	RT28XX_TX_BAND_CFG   0x132C
#define	RT28XX_TX_SW_CFG0   0x1330
#define	RT28XX_TX_SW_CFG1   0x1334
#define	RT28XX_TX_SW_CFG2   0x1338
#define	RT28XX_BKOFF_SLOT_CFG   0x1104
#define	RT28XX_TXOP_CTRL_CFG   0x1340
#define	RT28XX_TXOP_THRES_CFG   0x133C
#define	RT28XX_EDCA_AC0_CFG   0x1300
#define	RT28XX_EDCA_AC1_CFG   0x1304
#define	RT28XX_EDCA_AC2_CFG   0x1308
#define	RT28XX_EDCA_AC3_CFG   0x130C
#define	RT28XX_WMM_AIFSN_CFG   0x0214
#define	RT28XX_WMM_CWMIN_CFG   0x0218
#define	RT28XX_WMM_CWMAX_CFG   0x021C
#define	RT28XX_WMM_TXOP0_CFG   0x0220
#define	RT28XX_WMM_TXOP1_CFG   0x0224
#define	RT28XX_TX_RTS_CFG   0x1344
#define	RT28XX_TX_TIMEOUT_CFG   0x1348
#define	RT28XX_TX_RTY_CFG   0x134c
#define	RT28XX_TX_LINK_CFG   0x1350
#define	RT28XX_HT_FBK_CFG0   0x1354
#define	RT28XX_HT_FBK_CFG1   0x1358
#define	RT28XX_LG_FBK_CFG0   0x135C
#define	RT28XX_LG_FBK_CFG1   0x1360
#define	RT28XX_BCN_OFFSET0   0x042C
#define	RT28XX_BCN_OFFSET1   0x0430
#define	RT28XX_EXP_ACK_TIME   0x1380
#define	RT28XX_TXOP_HLDR_ET   0x1608
#define	RT28XX_TX_PWR_CFG_0   0x1314
#define	RT28XX_TX_PWR_CFG_1   0x1318
#define	RT28XX_TX_PWR_CFG_2   0x131C
#define	RT28XX_TX_PWR_CFG_3   0x1320
#define	RT28XX_TX_PWR_CFG_4   0x1324
#define	RT28XX_CCK_PROT_CFG   0x1364
#define	RT28XX_OFDM_PROT_CFG   0x1368
#define	RT28XX_MM20_PROT_CFG   0x136c
#define	RT28XX_MM40_PROT_CFG   0x1370
#define	RT28XX_GF20_PROT_CFG   0x1374
#define	RT28XX_GF40_PROT_CFG   0x1378
#define	RT28XX_RX_FILTER_CFG   0x1400
#define	RT28XX_AUTO_RSP_CFG   0x1404
#define	RT28XX_LEGACY_BASIC_RATE   0x1408
#define	RT28XX_HT_BASIC_RATE   0x140c
#define	RT28XX_XIFS_TIME_CFG   0x1100
#define	RT28XX_PWR_PIN_CFG   0x1204
#define	RT28XX_CH_TIME_CFG   0x110C
#define	RT28XX_BCN_TIME_CFG   0x1114
#define	RT28XX_TBTT_SYNC_CFG   0x1118
#define	RT28XX_INT_TIMER_CFG   0x1128
#define	RT28XX_INT_TIMER_EN   0x112C
#define	RT28XX_US_CYC_CNT   0x02A4
#define	RT28XX_RX_STA_CNT0   0x1700
#define	RT28XX_RX_STA_CNT1   0x1704
#define	RT28XX_CH_IDLE_STA   0x1130
#define	RT28XX_CH_BUSY_STA   0x1134
#define	RT28XX_MAC_WCID_BASE   0x1800
#define	RT28XX_MAC_WCID_ATTR_BASE   0x6800
#define	RT28XX_MAC_WCID_ENTRY(idx)
#define	RT28XX_MAC_WCID_ATTR_ENTRY(idx)
#define	RT28XX_STA_WCID   1
#define	RT28XX_PAIRWISE_KEY_TABLE_BASE   0x4000
#define	RT28XX_PAIRWISE_KEY_ENTRY(idx)
#define	RT28XX_SHARED_KEY_TABLE_BASE   0x6C00
#define	RT28XX_SHARED_KEY_ENTRY(idx)
#define	RT28XX_MAC_IVEIV_TABLE_BASE   0x6000
#define	RT28XX_MAC_IVEIV_ENTRY(idx)
#define	RT28XX_SHARED_KEY_MODE_BASE   0x7000
#define	RT28XX_SHARED_KEY_MODE_ENTRY(idx)
#define	RT28XX_WCID_ATTR_KEYTAB   0x00000001
#define	RT28XX_WCID_ATTR_CIPHER_SHIFT   1
#define	RT28XX_WCID_ATTR_CIPHER_MASK   0x0000000E
#define	RT28XX_WCID_ATTR_WIUDF_SHIFT   7
#define	RT28XX_WCID_ATTR_WIUDF_MASK   0x00000380
#define	RT28XX_CIPHER_NONE   0
#define	RT28XX_CIPHER_AES   4
#define	RT28XX_TXINFO_W0_WIV   (1u << 24)
#define	RT28XX_MAC_SRST   (1 << 0)
#define	RT28XX_BBP_HRST   (1 << 1)
#define	RT28XX_MAC_TX_EN   (1 << 2)
#define	RT28XX_MAC_RX_EN   (1 << 3)
#define	RT28XX_BBP_READ_CONTROL   (1 << 16)
#define	RT28XX_BBP_BUSY   (1 << 17)
#define	RT28XX_BBP_RW_MODE   (1 << 19)
#define	RT28XX_RF_WRITE   (1 << 16)
#define	RT28XX_RF_BUSY   (1 << 17)
#define	RT28XX_FILTER_DROP_CRC_ERROR   (1 << 0)
#define	RT28XX_FILTER_DROP_PHY_ERROR   (1 << 1)
#define	RT28XX_FILTER_DROP_NOT_TO_ME   (1 << 2)
#define	RT28XX_FILTER_DROP_NOT_MYBSS   (1 << 3)
#define	RT28XX_FILTER_DROP_VER_ERROR   (1 << 4)
#define	RT28XX_FILTER_DROP_MULTICAST   (1 << 5)
#define	RT28XX_FILTER_DROP_BROADCAST   (1 << 6)
#define	RT28XX_FILTER_DROP_DUPLICATE   (1 << 7)
#define	RT28XX_FILTER_DROP_CFEND_ACK   (1 << 8)
#define	RT28XX_FILTER_DROP_CFEND   (1 << 9)
#define	RT28XX_FILTER_DROP_ACK   (1 << 10)
#define	RT28XX_FILTER_DROP_CTS   (1 << 11)
#define	RT28XX_FILTER_DROP_RTS   (1 << 12)
#define	RT28XX_FILTER_DROP_PSPOLL   (1 << 13)
#define	RT28XX_FILTER_DROP_BA   (1 << 14)
#define	RT28XX_FILTER_DROP_BAR   (1 << 15)
#define	RT28XX_FILTER_DROP_CNTL   (1 << 16)
#define	RT28XX_LDO_CFG0   0x05D4
#define	RT28XX_LDO_CFG0_VLEVEL_MASK   0x1C000000u
#define	RT28XX_MAC_DEBUG_INDEX   0x05E8
#define	RT28XX_MAC_DEBUG_INDEX_XTAL   (1u << 31) /* 1 = 40 MHz xtal */
#define	RFCSR1_RF_BLOCK_EN   0x01
#define	RFCSR1_PLL_PD   0x02
#define	RFCSR1_RX0_PD   0x04
#define	RFCSR1_TX0_PD   0x08
#define	RFCSR1_RX1_PD   0x10
#define	RFCSR1_TX1_PD   0x20
#define	RFCSR3_VCOCAL_EN   0x80
#define	RFCSR9_K   0x0F
#define	RFCSR9_N   0x10
#define	RFCSR9_MOD   0x80
#define	RFCSR11_R   0x03
#define	RFCSR11_MOD   0xC0
#define	RFCSR30_RX_VCM   0x18
#define	RFCSR30_RF_CALIBRATION   0x80
#define	RFCSR38_RX_LO1_EN   0x20
#define	RFCSR39_RX_LO2_EN   0x80
#define	RFCSR49_TX   0x3F
#define	RFCSR50_TX   0x3F
#define	RT28XX_POWER_BOUND   0x27
#define	RT28XX_POWER_BOUND_5G   0x2B /* POWER_BOUND_5G (rt2800lib.c) */
#define	BBP4_MAC_IF_CTRL   0x40
#define	BBP4_BANDWIDTH   0x18
#define	BBP27_RX_CHAIN_SEL   0x60
#define	BBP27_RX_CHAIN1   0x20 /* RX_CHAIN_SEL field = chain 1 */
#define	BBP105_MLD   0x04
#define	BBP138_RX_ADC1   0x02
#define	BBP138_TX_DAC1   0x20
#define	BBP152_RX_DEFAULT_ANT   0x80
#define	BBP254_BIT7   0x80
#define	RT28XX_RX_CHAIN_NUM   2
#define	RT28XX_TX_CHAIN_NUM   2
#define	RT28XX_TX_PIN_CFG_2G   0x00050F0A
#define	RT28XX_TX_BAND_CFG_2G   0x00000004
#define	RT28XX_TX_PIN_CFG_5G   0x00050F05
#define	RT28XX_TX_BAND_CFG_5G   0x00000002
#define	RT28XX_LDO_CFG0_VLEVEL_5G   (5u << 26)
#define	RT_OP_REG(r_, v_)
#define	RT_OP_BBP(r_, v_)
#define	RT_OP_RF(r_, v_)
#define	RT28XX_RXINFO_DESC_SIZE   4
#define	RT28XX_RXWI_DESC_SIZE_5572   24
#define	RT28XX_RXD_DESC_SIZE   4
#define	RT28XX_RXD_W0_CRC_ERROR   0x00000100u
#define	RT28XX_DOT11_HDR_MIN   24
#define	RT28XX_BEACON_FIXED   12 /* timestamp+interval+capa */
#define	RT28XX_STYPE_ASSOC_RESP   0x1
#define	RT28XX_STYPE_PROBE_RESP   0x5
#define	RT28XX_STYPE_BEACON   0x8
#define	RT28XX_STYPE_DISASSOC   0xA
#define	RT28XX_STYPE_AUTH   0xB
#define	RT28XX_STYPE_DEAUTH   0xC
#define	RT28XX_BBP_READ_KICK    (RT28XX_BBP_READ_CONTROL | RT28XX_BBP_BUSY | RT28XX_BBP_RW_MODE)
#define	RT28XX_TXINFO_DESC_SIZE   4
#define	RT28XX_TXWI_DESC_SIZE_5592   20
#define	RT28XX_TXINFO_W0_QSEL_BE   (2u << 25)
#define	RT28XX_TXWI_W0_PHYMODE_OFDM   (1u << 30)
#define	RT28XX_TXWI_W1_ACK   (1u << 0)
#define	RT28XX_TXWI_W1_NSEQ   (1u << 1)
#define	RT28XX_TXWI_W1_PACKETID_ENTRY1   (1u << 30)
#define	RT28XX_TX_BUF_SIZE   1600

Variables
const vsf_wifi_chip_drv_t	vsf_wifi_rt28xx_drv

Macro Definition Documentation

RT28XX_PBF_SYS_CTRL

#define RT28XX_PBF_SYS_CTRL   0x0400

RT28XX_PBF_SYS_CTRL_READY

#define RT28XX_PBF_SYS_CTRL_READY   (1u << 7)

RT28XX_PBF_SYS_CTRL_RESET13

#define RT28XX_PBF_SYS_CTRL_RESET13   (1u << 13)

RT28XX_PBF_CFG

#define RT28XX_PBF_CFG   0x0408

RT28XX_USB_DMA_CFG

#define RT28XX_USB_DMA_CFG   0x02A0

RT28XX_WPDMA_GLO_CFG

#define RT28XX_WPDMA_GLO_CFG   0x0208

RT28XX_FW_FIRMWARE_BASE

#define RT28XX_FW_FIRMWARE_BASE   0x3000 /* base for fw upload */

RT28XX_USB_DEVICE_MODE

#define RT28XX_USB_DEVICE_MODE   1

RT28XX_USB_MODE_RESET

#define RT28XX_USB_MODE_RESET   1

RT28XX_USB_MODE_FIRMWARE

#define RT28XX_USB_MODE_FIRMWARE   8

RT28XX_EFUSE_CTRL

#define RT28XX_EFUSE_CTRL   0x0580

RT28XX_EFUSE_DATA0

#define RT28XX_EFUSE_DATA0   0x0590

RT28XX_EFUSE_DATA1

#define RT28XX_EFUSE_DATA1   0x0594

RT28XX_EFUSE_DATA2

#define RT28XX_EFUSE_DATA2   0x0598

RT28XX_EFUSE_DATA3

#define RT28XX_EFUSE_DATA3   0x059C

RT28XX_EFUSE_KICK

#define RT28XX_EFUSE_KICK   (1u << 30)

RT28XX_EFUSE_PRESENT

#define RT28XX_EFUSE_PRESENT   (1u << 31)

RT28XX_EFUSE_AIN_SHIFT

#define RT28XX_EFUSE_AIN_SHIFT   17 /* EFUSE_CTRL_ADDRESS_IN = 0x03fe0000 */

RT28XX_EFUSE_MODE_SHIFT

#define RT28XX_EFUSE_MODE_SHIFT   6 /* EFUSE_CTRL_MODE = 0x000000c0 */

RT28XX_EFUSE_FREQ_WORD

#define RT28XX_EFUSE_FREQ_WORD   0x1d /* EEPROM_FREQ (RT5592) */

RT28XX_EFUSE_FREQ_BLOCK

#define RT28XX_EFUSE_FREQ_BLOCK   24 /* 8-word block (0x18) holding word 0x1d */

RT28XX_RFCSR17_CODE

#define RT28XX_RFCSR17_CODE   0x7f /* ref RFCSR17_CODE */

RT28XX_FREQ_OFFSET_BOUND

#define RT28XX_FREQ_OFFSET_BOUND   0x5f /* ref FREQ_OFFSET_BOUND */

RT28XX_EFUSE_IQ_BLOCK

#define RT28XX_EFUSE_IQ_BLOCK   152 /* word 0x98, holds bytes 0x130.. */

RT28XX_BBP158_IQ_INDEX

#define RT28XX_BBP158_IQ_INDEX   158 /* IQ cal index register */

RT28XX_BBP159_IQ_VALUE

#define RT28XX_BBP159_IQ_VALUE   159 /* IQ cal value register */

RT28XX_H2M_MAILBOX_CSR

#define RT28XX_H2M_MAILBOX_CSR   0x7010

RT28XX_H2M_MAILBOX_CID

#define RT28XX_H2M_MAILBOX_CID   0x7014

RT28XX_H2M_MAILBOX_STATUS

#define RT28XX_H2M_MAILBOX_STATUS   0x701C

RT28XX_H2M_INT_SRC

#define RT28XX_H2M_INT_SRC   0x7024

RT28XX_H2M_BBP_AGENT

#define RT28XX_H2M_BBP_AGENT   0x7028

RT28XX_HOST_CMD_CSR

#define RT28XX_HOST_CMD_CSR   0x0404

RT28XX_H2M_MAILBOX_OWNER

#define RT28XX_H2M_MAILBOX_OWNER   0x01000000u

RT28XX_MCU_BOOT_SIGNAL

#define RT28XX_MCU_BOOT_SIGNAL   0x72

RT28XX_ASIC_VER_ID

#define RT28XX_ASIC_VER_ID   0x1000

RT28XX_REV_RT5592C

#define RT28XX_REV_RT5592C   0x0221

RT28XX_MAC_SYS_CTRL

#define RT28XX_MAC_SYS_CTRL   0x1004

RT28XX_MAC_ADDR_DW0

#define RT28XX_MAC_ADDR_DW0   0x1008

RT28XX_MAC_ADDR_DW1

#define RT28XX_MAC_ADDR_DW1   0x100C

RT28XX_MAC_BSSID_DW0

#define RT28XX_MAC_BSSID_DW0   0x1010

RT28XX_MAC_BSSID_DW1

#define RT28XX_MAC_BSSID_DW1   0x1014

RT28XX_MAC_MAX_LEN_CFG

#define RT28XX_MAC_MAX_LEN_CFG   0x1018

RT28XX_BBP_CSR_CFG

#define RT28XX_BBP_CSR_CFG   0x101C

RT28XX_TX_STA_FIFO

#define RT28XX_TX_STA_FIFO   0x1718

RT28XX_RF_CSR_CFG

#define RT28XX_RF_CSR_CFG   0x0500

RT28XX_LED_CFG

#define RT28XX_LED_CFG   0x1024

RT28XX_AMPDU_MAX_LEN_20M1S

#define RT28XX_AMPDU_MAX_LEN_20M1S   0x1030

RT28XX_AMPDU_MAX_LEN_40M1S

#define RT28XX_AMPDU_MAX_LEN_40M1S   0x1034

RT28XX_TX_PIN_CFG

#define RT28XX_TX_PIN_CFG   0x1328

RT28XX_TX_BAND_CFG

#define RT28XX_TX_BAND_CFG   0x132C

RT28XX_TX_SW_CFG0

#define RT28XX_TX_SW_CFG0   0x1330

RT28XX_TX_SW_CFG1

#define RT28XX_TX_SW_CFG1   0x1334

RT28XX_TX_SW_CFG2

#define RT28XX_TX_SW_CFG2   0x1338

RT28XX_BKOFF_SLOT_CFG

#define RT28XX_BKOFF_SLOT_CFG   0x1104

RT28XX_TXOP_CTRL_CFG

#define RT28XX_TXOP_CTRL_CFG   0x1340

RT28XX_TXOP_THRES_CFG

#define RT28XX_TXOP_THRES_CFG   0x133C

RT28XX_EDCA_AC0_CFG

#define RT28XX_EDCA_AC0_CFG   0x1300

RT28XX_EDCA_AC1_CFG

#define RT28XX_EDCA_AC1_CFG   0x1304

RT28XX_EDCA_AC2_CFG

#define RT28XX_EDCA_AC2_CFG   0x1308

RT28XX_EDCA_AC3_CFG

#define RT28XX_EDCA_AC3_CFG   0x130C

RT28XX_WMM_AIFSN_CFG

#define RT28XX_WMM_AIFSN_CFG   0x0214

RT28XX_WMM_CWMIN_CFG

#define RT28XX_WMM_CWMIN_CFG   0x0218

RT28XX_WMM_CWMAX_CFG

#define RT28XX_WMM_CWMAX_CFG   0x021C

RT28XX_WMM_TXOP0_CFG

#define RT28XX_WMM_TXOP0_CFG   0x0220

RT28XX_WMM_TXOP1_CFG

#define RT28XX_WMM_TXOP1_CFG   0x0224

RT28XX_TX_RTS_CFG

#define RT28XX_TX_RTS_CFG   0x1344

RT28XX_TX_TIMEOUT_CFG

#define RT28XX_TX_TIMEOUT_CFG   0x1348

RT28XX_TX_RTY_CFG

#define RT28XX_TX_RTY_CFG   0x134c

RT28XX_TX_LINK_CFG

#define RT28XX_TX_LINK_CFG   0x1350

RT28XX_HT_FBK_CFG0

#define RT28XX_HT_FBK_CFG0   0x1354

RT28XX_HT_FBK_CFG1

#define RT28XX_HT_FBK_CFG1   0x1358

RT28XX_LG_FBK_CFG0

#define RT28XX_LG_FBK_CFG0   0x135C

RT28XX_LG_FBK_CFG1

#define RT28XX_LG_FBK_CFG1   0x1360

RT28XX_BCN_OFFSET0

#define RT28XX_BCN_OFFSET0   0x042C

RT28XX_BCN_OFFSET1

#define RT28XX_BCN_OFFSET1   0x0430

RT28XX_EXP_ACK_TIME

#define RT28XX_EXP_ACK_TIME   0x1380

RT28XX_TXOP_HLDR_ET

#define RT28XX_TXOP_HLDR_ET   0x1608

RT28XX_TX_PWR_CFG_0

#define RT28XX_TX_PWR_CFG_0   0x1314

RT28XX_TX_PWR_CFG_1

#define RT28XX_TX_PWR_CFG_1   0x1318

RT28XX_TX_PWR_CFG_2

#define RT28XX_TX_PWR_CFG_2   0x131C

RT28XX_TX_PWR_CFG_3

#define RT28XX_TX_PWR_CFG_3   0x1320

RT28XX_TX_PWR_CFG_4

#define RT28XX_TX_PWR_CFG_4   0x1324

RT28XX_CCK_PROT_CFG

#define RT28XX_CCK_PROT_CFG   0x1364

RT28XX_OFDM_PROT_CFG

#define RT28XX_OFDM_PROT_CFG   0x1368

RT28XX_MM20_PROT_CFG

#define RT28XX_MM20_PROT_CFG   0x136c

RT28XX_MM40_PROT_CFG

#define RT28XX_MM40_PROT_CFG   0x1370

RT28XX_GF20_PROT_CFG

#define RT28XX_GF20_PROT_CFG   0x1374

RT28XX_GF40_PROT_CFG

#define RT28XX_GF40_PROT_CFG   0x1378

RT28XX_RX_FILTER_CFG

#define RT28XX_RX_FILTER_CFG   0x1400

RT28XX_AUTO_RSP_CFG

#define RT28XX_AUTO_RSP_CFG   0x1404

RT28XX_LEGACY_BASIC_RATE

#define RT28XX_LEGACY_BASIC_RATE   0x1408

RT28XX_HT_BASIC_RATE

#define RT28XX_HT_BASIC_RATE   0x140c

RT28XX_XIFS_TIME_CFG

#define RT28XX_XIFS_TIME_CFG   0x1100

RT28XX_PWR_PIN_CFG

#define RT28XX_PWR_PIN_CFG   0x1204

RT28XX_CH_TIME_CFG

#define RT28XX_CH_TIME_CFG   0x110C

RT28XX_BCN_TIME_CFG

#define RT28XX_BCN_TIME_CFG   0x1114

RT28XX_TBTT_SYNC_CFG

#define RT28XX_TBTT_SYNC_CFG   0x1118

RT28XX_INT_TIMER_CFG

#define RT28XX_INT_TIMER_CFG   0x1128

RT28XX_INT_TIMER_EN

#define RT28XX_INT_TIMER_EN   0x112C

RT28XX_US_CYC_CNT

#define RT28XX_US_CYC_CNT   0x02A4

RT28XX_RX_STA_CNT0

#define RT28XX_RX_STA_CNT0   0x1700

RT28XX_RX_STA_CNT1

#define RT28XX_RX_STA_CNT1   0x1704

RT28XX_CH_IDLE_STA

#define RT28XX_CH_IDLE_STA   0x1130

RT28XX_CH_BUSY_STA

#define RT28XX_CH_BUSY_STA   0x1134

RT28XX_MAC_WCID_BASE

#define RT28XX_MAC_WCID_BASE   0x1800

RT28XX_MAC_WCID_ATTR_BASE

#define RT28XX_MAC_WCID_ATTR_BASE   0x6800

RT28XX_MAC_WCID_ENTRY

#define RT28XX_MAC_WCID_ENTRY

(

idx

)

Value:

(RT28XX_MAC_WCID_BASE + ((idx) * 8))

RT28XX_MAC_WCID_ATTR_ENTRY

#define RT28XX_MAC_WCID_ATTR_ENTRY

(

idx

)

Value:

(RT28XX_MAC_WCID_ATTR_BASE + ((idx) * 4))

RT28XX_STA_WCID

#define RT28XX_STA_WCID   1

RT28XX_PAIRWISE_KEY_TABLE_BASE

#define RT28XX_PAIRWISE_KEY_TABLE_BASE   0x4000

RT28XX_PAIRWISE_KEY_ENTRY

#define RT28XX_PAIRWISE_KEY_ENTRY

(

idx

)

Value:

(RT28XX_PAIRWISE_KEY_TABLE_BASE + ((idx) * 32))

RT28XX_SHARED_KEY_TABLE_BASE

#define RT28XX_SHARED_KEY_TABLE_BASE   0x6C00

RT28XX_SHARED_KEY_ENTRY

#define RT28XX_SHARED_KEY_ENTRY

(

idx

)

Value:

(RT28XX_SHARED_KEY_TABLE_BASE + ((idx) * 32))

RT28XX_MAC_IVEIV_TABLE_BASE

#define RT28XX_MAC_IVEIV_TABLE_BASE   0x6000

RT28XX_MAC_IVEIV_ENTRY

#define RT28XX_MAC_IVEIV_ENTRY

(

idx

)

Value:

(RT28XX_MAC_IVEIV_TABLE_BASE + ((idx) * 8))

RT28XX_SHARED_KEY_MODE_BASE

#define RT28XX_SHARED_KEY_MODE_BASE   0x7000

RT28XX_SHARED_KEY_MODE_ENTRY

#define RT28XX_SHARED_KEY_MODE_ENTRY

(

idx

)

Value:

(RT28XX_SHARED_KEY_MODE_BASE + ((idx) * 4))

RT28XX_WCID_ATTR_KEYTAB

#define RT28XX_WCID_ATTR_KEYTAB   0x00000001

RT28XX_WCID_ATTR_CIPHER_SHIFT

#define RT28XX_WCID_ATTR_CIPHER_SHIFT   1

RT28XX_WCID_ATTR_CIPHER_MASK

#define RT28XX_WCID_ATTR_CIPHER_MASK   0x0000000E

RT28XX_WCID_ATTR_WIUDF_SHIFT

#define RT28XX_WCID_ATTR_WIUDF_SHIFT   7

RT28XX_WCID_ATTR_WIUDF_MASK

#define RT28XX_WCID_ATTR_WIUDF_MASK   0x00000380

RT28XX_CIPHER_NONE

#define RT28XX_CIPHER_NONE   0

RT28XX_CIPHER_AES

#define RT28XX_CIPHER_AES   4

RT28XX_TXINFO_W0_WIV

#define RT28XX_TXINFO_W0_WIV   (1u << 24)

RT28XX_MAC_SRST

#define RT28XX_MAC_SRST   (1 << 0)

RT28XX_BBP_HRST

#define RT28XX_BBP_HRST   (1 << 1)

RT28XX_MAC_TX_EN

#define RT28XX_MAC_TX_EN   (1 << 2)

RT28XX_MAC_RX_EN

#define RT28XX_MAC_RX_EN   (1 << 3)

RT28XX_BBP_READ_CONTROL

#define RT28XX_BBP_READ_CONTROL   (1 << 16)

RT28XX_BBP_BUSY

#define RT28XX_BBP_BUSY   (1 << 17)

RT28XX_BBP_RW_MODE

#define RT28XX_BBP_RW_MODE   (1 << 19)

RT28XX_RF_WRITE

#define RT28XX_RF_WRITE   (1 << 16)

RT28XX_RF_BUSY

#define RT28XX_RF_BUSY   (1 << 17)

RT28XX_FILTER_DROP_CRC_ERROR

#define RT28XX_FILTER_DROP_CRC_ERROR   (1 << 0)

RT28XX_FILTER_DROP_PHY_ERROR

#define RT28XX_FILTER_DROP_PHY_ERROR   (1 << 1)

RT28XX_FILTER_DROP_NOT_TO_ME

#define RT28XX_FILTER_DROP_NOT_TO_ME   (1 << 2)

RT28XX_FILTER_DROP_NOT_MYBSS

#define RT28XX_FILTER_DROP_NOT_MYBSS   (1 << 3)

RT28XX_FILTER_DROP_VER_ERROR

#define RT28XX_FILTER_DROP_VER_ERROR   (1 << 4)

RT28XX_FILTER_DROP_MULTICAST

#define RT28XX_FILTER_DROP_MULTICAST   (1 << 5)

RT28XX_FILTER_DROP_BROADCAST

#define RT28XX_FILTER_DROP_BROADCAST   (1 << 6)

RT28XX_FILTER_DROP_DUPLICATE

#define RT28XX_FILTER_DROP_DUPLICATE   (1 << 7)

RT28XX_FILTER_DROP_CFEND_ACK

#define RT28XX_FILTER_DROP_CFEND_ACK   (1 << 8)

RT28XX_FILTER_DROP_CFEND

#define RT28XX_FILTER_DROP_CFEND   (1 << 9)

RT28XX_FILTER_DROP_ACK

#define RT28XX_FILTER_DROP_ACK   (1 << 10)

RT28XX_FILTER_DROP_CTS

#define RT28XX_FILTER_DROP_CTS   (1 << 11)

RT28XX_FILTER_DROP_RTS

#define RT28XX_FILTER_DROP_RTS   (1 << 12)

RT28XX_FILTER_DROP_PSPOLL

#define RT28XX_FILTER_DROP_PSPOLL   (1 << 13)

RT28XX_FILTER_DROP_BA

#define RT28XX_FILTER_DROP_BA   (1 << 14)

RT28XX_FILTER_DROP_BAR

#define RT28XX_FILTER_DROP_BAR   (1 << 15)

RT28XX_FILTER_DROP_CNTL

#define RT28XX_FILTER_DROP_CNTL   (1 << 16)

RT28XX_LDO_CFG0

#define RT28XX_LDO_CFG0   0x05D4

RT28XX_LDO_CFG0_VLEVEL_MASK

#define RT28XX_LDO_CFG0_VLEVEL_MASK   0x1C000000u

RT28XX_MAC_DEBUG_INDEX

#define RT28XX_MAC_DEBUG_INDEX   0x05E8

RT28XX_MAC_DEBUG_INDEX_XTAL

#define RT28XX_MAC_DEBUG_INDEX_XTAL   (1u << 31) /* 1 = 40 MHz xtal */

RFCSR1_RF_BLOCK_EN

#define RFCSR1_RF_BLOCK_EN   0x01

RFCSR1_PLL_PD

#define RFCSR1_PLL_PD   0x02

RFCSR1_RX0_PD

#define RFCSR1_RX0_PD   0x04

RFCSR1_TX0_PD

#define RFCSR1_TX0_PD   0x08

RFCSR1_RX1_PD

#define RFCSR1_RX1_PD   0x10

RFCSR1_TX1_PD

#define RFCSR1_TX1_PD   0x20

RFCSR3_VCOCAL_EN

#define RFCSR3_VCOCAL_EN   0x80

RFCSR9_K

#define RFCSR9_K   0x0F

RFCSR9_N

#define RFCSR9_N   0x10

RFCSR9_MOD

#define RFCSR9_MOD   0x80

RFCSR11_R

#define RFCSR11_R   0x03

RFCSR11_MOD

#define RFCSR11_MOD   0xC0

RFCSR30_RX_VCM

#define RFCSR30_RX_VCM   0x18

RFCSR30_RF_CALIBRATION

#define RFCSR30_RF_CALIBRATION   0x80

RFCSR38_RX_LO1_EN

#define RFCSR38_RX_LO1_EN   0x20

RFCSR39_RX_LO2_EN

#define RFCSR39_RX_LO2_EN   0x80

RFCSR49_TX

#define RFCSR49_TX   0x3F

RFCSR50_TX

#define RFCSR50_TX   0x3F

RT28XX_POWER_BOUND

#define RT28XX_POWER_BOUND   0x27

RT28XX_POWER_BOUND_5G

#define RT28XX_POWER_BOUND_5G   0x2B /* POWER_BOUND_5G (rt2800lib.c) */

BBP4_MAC_IF_CTRL

#define BBP4_MAC_IF_CTRL   0x40

BBP4_BANDWIDTH

#define BBP4_BANDWIDTH   0x18

BBP27_RX_CHAIN_SEL

#define BBP27_RX_CHAIN_SEL   0x60

BBP27_RX_CHAIN1

#define BBP27_RX_CHAIN1   0x20 /* RX_CHAIN_SEL field = chain 1 */

BBP105_MLD

#define BBP105_MLD   0x04

BBP138_RX_ADC1

#define BBP138_RX_ADC1   0x02

BBP138_TX_DAC1

#define BBP138_TX_DAC1   0x20

BBP152_RX_DEFAULT_ANT

#define BBP152_RX_DEFAULT_ANT   0x80

BBP254_BIT7

#define BBP254_BIT7   0x80

RT28XX_RX_CHAIN_NUM

#define RT28XX_RX_CHAIN_NUM   2

RT28XX_TX_CHAIN_NUM

#define RT28XX_TX_CHAIN_NUM   2

RT28XX_TX_PIN_CFG_2G

#define RT28XX_TX_PIN_CFG_2G   0x00050F0A

RT28XX_TX_BAND_CFG_2G

#define RT28XX_TX_BAND_CFG_2G   0x00000004

RT28XX_TX_PIN_CFG_5G

#define RT28XX_TX_PIN_CFG_5G   0x00050F05

RT28XX_TX_BAND_CFG_5G

#define RT28XX_TX_BAND_CFG_5G   0x00000002

RT28XX_LDO_CFG0_VLEVEL_5G

#define RT28XX_LDO_CFG0_VLEVEL_5G   (5u << 26)

RT_OP_REG

#define RT_OP_REG	(		r_,
			v_ )

Value:

{ (uint32_t)(r_), (uint32_t)(v_) }

RT_OP_BBP

#define RT_OP_BBP	(		r_,
			v_ )

Value:

        RT_OP_REG(RT28XX_BBP_CSR_CFG,                      \
        RT28XX_BBP_BUSY | RT28XX_BBP_RW_MODE | (((uint32_t)(r_) & 0xFF) << 8)  \
                         |  ((uint32_t)(v_) & 0xFF))

RT_OP_RF

#define RT_OP_RF	(		r_,
			v_ )

Value:

        RT_OP_REG(RT28XX_RF_CSR_CFG,                       \
        RT28XX_RF_WRITE  | RT28XX_RF_BUSY | (((uint32_t)(r_) & 0x3F) << 8)     \
                         |  ((uint32_t)(v_) & 0xFF))

RT28XX_RXINFO_DESC_SIZE

#define RT28XX_RXINFO_DESC_SIZE   4

RT28XX_RXWI_DESC_SIZE_5572

#define RT28XX_RXWI_DESC_SIZE_5572   24

RT28XX_RXD_DESC_SIZE

#define RT28XX_RXD_DESC_SIZE   4

RT28XX_RXD_W0_CRC_ERROR

#define RT28XX_RXD_W0_CRC_ERROR   0x00000100u

RT28XX_DOT11_HDR_MIN

#define RT28XX_DOT11_HDR_MIN   24

RT28XX_BEACON_FIXED

#define RT28XX_BEACON_FIXED   12 /* timestamp+interval+capa */

RT28XX_STYPE_ASSOC_RESP

#define RT28XX_STYPE_ASSOC_RESP   0x1

RT28XX_STYPE_PROBE_RESP

#define RT28XX_STYPE_PROBE_RESP   0x5

RT28XX_STYPE_BEACON

#define RT28XX_STYPE_BEACON   0x8

RT28XX_STYPE_DISASSOC

#define RT28XX_STYPE_DISASSOC   0xA

RT28XX_STYPE_AUTH

#define RT28XX_STYPE_AUTH   0xB

RT28XX_STYPE_DEAUTH

#define RT28XX_STYPE_DEAUTH   0xC

RT28XX_BBP_READ_KICK

#define RT28XX_BBP_READ_KICK    (RT28XX_BBP_READ_CONTROL | RT28XX_BBP_BUSY | RT28XX_BBP_RW_MODE)

RT28XX_TXINFO_DESC_SIZE

#define RT28XX_TXINFO_DESC_SIZE   4

RT28XX_TXWI_DESC_SIZE_5592

#define RT28XX_TXWI_DESC_SIZE_5592   20

RT28XX_TXINFO_W0_QSEL_BE

#define RT28XX_TXINFO_W0_QSEL_BE   (2u << 25)

RT28XX_TXWI_W0_PHYMODE_OFDM

#define RT28XX_TXWI_W0_PHYMODE_OFDM   (1u << 30)

RT28XX_TXWI_W1_ACK

#define RT28XX_TXWI_W1_ACK   (1u << 0)

RT28XX_TXWI_W1_NSEQ

#define RT28XX_TXWI_W1_NSEQ   (1u << 1)

RT28XX_TXWI_W1_PACKETID_ENTRY1

#define RT28XX_TXWI_W1_PACKETID_ENTRY1   (1u << 30)

RT28XX_TX_BUF_SIZE

#define RT28XX_TX_BUF_SIZE   1600

Variable Documentation

detect_val

uint32_t detect_val

data3

uint32_t data3

data2

uint32_t data2

data1

uint32_t data1

data0

uint32_t data0

freq_raw

uint32_t freq_raw

iq_raw3

uint32_t iq_raw3

iq_raw2

uint32_t iq_raw2

iq_raw0

uint32_t iq_raw0

vsf_wifi_rt28xx_drv

const vsf_wifi_chip_drv_t vsf_wifi_rt28xx_drv

Initial value:

= {
    .name          = "rt28xx",
    .firmware_load = __rt28xx_firmware_load,
    .init          = __rt28xx_init,
    .fini          = __rt28xx_fini,
    .set_channel   = __rt28xx_set_channel,
    .set_rx_filter = __rt28xx_set_rx_filter,
    .set_mac_addr  = __rt28xx_set_mac_addr,
    .set_bssid     = __rt28xx_set_bssid,
    .set_auth_mode = __rt28xx_set_auth_mode,
    .connect       = __rt28xx_connect,
    .disconnect    = __rt28xx_disconnect,
    .get_link_info = __rt28xx_get_link_info,
    .parse_rx      = __rt28xx_parse_rx,
    .build_tx      = __rt28xx_build_tx,
    .tx            = __rt28xx_tx,
 
    .crypto_ops    = &__rt28xx_crypto_ops,
 
    .radio_ops     = &__rt28xx_radio_ops,
}