uart.h File Reference

#include "hal/vsf_hal_cfg.h"
#include "../__device.h"
#include "./i_reg_uart.h"

Go to the source code of this file.

Typedefs
typedef enum vsf_usart_mode_t	vsf_usart_mode_t
typedef enum vsf_usart_irq_mask_t	vsf_usart_irq_mask_t

Enumerations
enum	vsf_usart_mode_t {   VSF_USART_8_BIT_LENGTH = (0x3ul << 0) ,   VSF_USART_7_BIT_LENGTH = (0x2ul << 0) ,   VSF_USART_6_BIT_LENGTH = (0x1ul << 0) ,   VSF_USART_5_BIT_LENGTH = (0x0ul << 0) ,   VSF_USART_1_STOPBIT = (0x0ul << 2) ,   VSF_USART_2_STOPBIT = (0x1ul << 2) ,   VSF_USART_NO_PARITY = (0x0ul << 3) ,   VSF_USART_ODD_PARITY = (0x1ul << 3) ,   VSF_USART_EVEN_PARITY = (0x2ul << 3) ,   VSF_USART_9_BIT_LENGTH = (0x1ul << 8) ,   VSF_USART_10_BIT_LENGTH = (0x2ul << 8) ,   VSF_USART_FORCE_0_PARITY = (0x1ul << 10) ,   VSF_USART_FORCE_1_PARITY = (0x2ul << 10) ,   VSF_USART_1_5_STOPBIT = (0x1ul << 12) ,   VSF_USART_0_5_STOPBIT = (0x2ul << 12) ,   VSF_USART_NO_HWCONTROL = (0x0ul << 14) ,   VSF_USART_RTS_HWCONTROL = (0x1ul << 14) ,   VSF_USART_CTS_HWCONTROL = (0x2ul << 14) ,   VSF_USART_RTS_CTS_HWCONTROL = (0x3ul << 14) ,   VSF_USART_TX_ENABLE = (0x0ul << 15) ,   VSF_USART_TX_DISABLE = (0x1ul << 15) ,   VSF_USART_RX_ENABLE = (0x0ul << 16) ,   VSF_USART_RX_DISABLE = (0x1ul << 16) ,   VSF_USART_SYNC_CLOCK_ENABLE = (0x0ul << 17) ,   VSF_USART_SYNC_CLOCK_DISABLE = (0x1ul << 17) ,   VSF_USART_HALF_DUPLEX_DISABLE = (0x0ul << 18) ,   VSF_USART_HALF_DUPLEX_ENABLE = (0x1ul << 18) ,   VSF_USART_TX_FIFO_THRESH_ONE = (0x0ul << 19) ,   VSF_USART_TX_FIFO_THRESH_HALF_FULL = (0x1ul << 19) ,   VSF_USART_TX_FIFO_THRESH_FULL = (0x2ul << 19) ,   VSF_USART_RX_FIFO_THRESH_ONE = (0x0ul << 21) ,   VSF_USART_RX_FIFO_THRESH_HALF_FULL = (0x1ul << 21) ,   VSF_USART_RX_FIFO_THRESH_FULL = (0x2ul << 21) ,   VSF_USART_SYNC_CLOCK_POLARITY_LOW = (0x0ul << 23) ,   VSF_USART_SYNC_CLOCK_POLARITY_HIGH = (0x1ul << 23) ,   VSF_USART_SYNC_CLOCK_PHASE_1_EDGE = (0x0ul << 24) ,   VSF_USART_SYNC_CLOCK_PHASE_2_EDGE = (0x1ul << 24) ,   VSF_USART_IRDA_ENABLE = (0x1ul << 25) ,   VSF_USART_IRDA_DISABLE = (0x0ul << 25) ,   AIC8800_VSF_USART_BIT_LENGTH_MASK ,   AIC8800_VSF_USART_STOPBIT_MASK ,   AIC8800_VSF_USART_PARITY_MASK ,   AIC8800_USART_MODE_ALL_BITS_MASK }
enum	vsf_usart_irq_mask_t {   VSF_USART_IRQ_MASK_RX = UART_RXIRQEN_MSK ,   VSF_USART_IRQ_MASK_TX = UART_TXIRQEN_MSK ,   AIC8800_USART_IRQ_MASK_LS = UART_LSIRQEN_MSK ,   AIC8800_USART_IRQ_MASK_MS = UART_MSIRQEN_MSK ,   AIC8800_USART_IRQ_MASK_PT = UART_PTIRQEN_MSK ,   AIC8800_USART_IRQ_MASK_FIFO ,   VSF_USART_IRQ_MASK_CTS = (0x1ul << 24) ,   VSF_USART_IRQ_MASK_RX_TIMEOUT = (0x1ul << 25) ,   VSF_USART_IRQ_MASK_RX_CPL = (0x1ul << 26) ,   VSF_USART_IRQ_MASK_TX_CPL = (0x1ul << 27) ,   VSF_USART_IRQ_MASK_FRAME_ERR = (0x1ul << 28) ,   VSF_USART_IRQ_MASK_PARITY_ERR = (0x1ul << 29) ,   VSF_USART_IRQ_MASK_BREAK_ERR = (0x1ul << 30) ,   VSF_USART_IRQ_MASK_OVERFLOW_ERR = (0x1ul << 31) ,   AIC8800_USART_IRQ_MASK }

Typedef Documentation

vsf_usart_mode_t

typedef enum vsf_usart_mode_t vsf_usart_mode_t

vsf_usart_irq_mask_t

typedef enum vsf_usart_irq_mask_t vsf_usart_irq_mask_t

Enumeration Type Documentation

vsf_usart_mode_t

enum vsf_usart_mode_t

Enumerator
VSF_USART_8_BIT_LENGTH
VSF_USART_7_BIT_LENGTH
VSF_USART_6_BIT_LENGTH
VSF_USART_5_BIT_LENGTH
VSF_USART_1_STOPBIT
VSF_USART_2_STOPBIT
VSF_USART_NO_PARITY
VSF_USART_ODD_PARITY
VSF_USART_EVEN_PARITY
VSF_USART_9_BIT_LENGTH
VSF_USART_10_BIT_LENGTH
VSF_USART_FORCE_0_PARITY
VSF_USART_FORCE_1_PARITY
VSF_USART_1_5_STOPBIT
VSF_USART_0_5_STOPBIT
VSF_USART_NO_HWCONTROL
VSF_USART_RTS_HWCONTROL
VSF_USART_CTS_HWCONTROL
VSF_USART_RTS_CTS_HWCONTROL
VSF_USART_TX_ENABLE
VSF_USART_TX_DISABLE
VSF_USART_RX_ENABLE
VSF_USART_RX_DISABLE
VSF_USART_SYNC_CLOCK_ENABLE
VSF_USART_SYNC_CLOCK_DISABLE
VSF_USART_HALF_DUPLEX_DISABLE
VSF_USART_HALF_DUPLEX_ENABLE
VSF_USART_TX_FIFO_THRESH_ONE
VSF_USART_TX_FIFO_THRESH_HALF_FULL
VSF_USART_TX_FIFO_THRESH_FULL
VSF_USART_RX_FIFO_THRESH_ONE
VSF_USART_RX_FIFO_THRESH_HALF_FULL
VSF_USART_RX_FIFO_THRESH_FULL
VSF_USART_SYNC_CLOCK_POLARITY_LOW
VSF_USART_SYNC_CLOCK_POLARITY_HIGH
VSF_USART_SYNC_CLOCK_PHASE_1_EDGE
VSF_USART_SYNC_CLOCK_PHASE_2_EDGE
VSF_USART_IRDA_ENABLE
VSF_USART_IRDA_DISABLE
AIC8800_VSF_USART_BIT_LENGTH_MASK
AIC8800_VSF_USART_STOPBIT_MASK
AIC8800_VSF_USART_PARITY_MASK
AIC8800_USART_MODE_ALL_BITS_MASK

vsf_usart_irq_mask_t

enum vsf_usart_irq_mask_t

Enumerator
VSF_USART_IRQ_MASK_RX
VSF_USART_IRQ_MASK_TX
AIC8800_USART_IRQ_MASK_LS
AIC8800_USART_IRQ_MASK_MS
AIC8800_USART_IRQ_MASK_PT
AIC8800_USART_IRQ_MASK_FIFO
VSF_USART_IRQ_MASK_CTS
VSF_USART_IRQ_MASK_RX_TIMEOUT
VSF_USART_IRQ_MASK_RX_CPL
VSF_USART_IRQ_MASK_TX_CPL
VSF_USART_IRQ_MASK_FRAME_ERR
VSF_USART_IRQ_MASK_PARITY_ERR
VSF_USART_IRQ_MASK_BREAK_ERR
VSF_USART_IRQ_MASK_OVERFLOW_ERR
AIC8800_USART_IRQ_MASK