VSF Documented
Macros | Typedefs | Enumerations | Functions | Variables
common.h File Reference
#include "hal/vsf_hal_cfg.h"
#include "hal/arch/vsf_arch.h"

Go to the source code of this file.

Macros

#define VSF_HW_CLKRST_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH)    (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
 
#define VSF_HW_PLL_IN_RANGE_1M_2M   0
 
#define VSF_HW_PLL_IN_RANGE_2M_4M   1
 
#define VSF_HW_PLL_IN_RANGE_4M_8M   2
 
#define VSF_HW_PLL_IN_RANGE_8M_16M   3
 
#define VSF_HW_PLL_OUT_RANGE_192M_836M   0
 
#define VSF_HW_PLL_OUT_RANGE_150M_420M   1
 
#define vsf_hw_peripheral_clk_set   vsf_hw_clkrst_region_set
 
#define vsf_hw_peripheral_clk_get   vsf_hw_clkrst_region_get
 
#define vsf_hw_peripheral_rst_set   vsf_hw_clkrst_region_set_bit
 
#define vsf_hw_peripheral_rst_clear   vsf_hw_clkrst_region_clear_bit
 
#define vsf_hw_peripheral_rst_get   vsf_hw_clkrst_region_get_bit
 
#define vsf_hw_peripheral_enable   vsf_hw_clkrst_region_set_bit
 
#define vsf_hw_peripheral_disable   vsf_hw_clkrst_region_clear_bit
 
#define VSF_HW_CLK_APB1   VSF_HW_CLK_PCLK1
 
#define VSF_HW_CLK_APB2   VSF_HW_CLK_PCLK2
 
#define VSF_HW_CLK_APB3   VSF_HW_CLK_PCLK3
 
#define VSF_HW_CLK_APB4   VSF_HW_CLK_PCLK4
 
#define VSF_HW_CLK_UART3   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_UART4   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_UART6   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_UART7   VSF_HW_CLK_APB1
 

Typedefs

typedef enum vsf_hw_peripheral_rst_t vsf_hw_peripheral_rst_t
 
typedef enum vsf_hw_peripheral_en_t vsf_hw_peripheral_en_t
 
typedef struct vsf_hw_clk_t vsf_hw_clk_t
 

Enumerations

enum  vsf_hw_peripheral_rst_t {
  VSF_HW_RST_USBHS1 = VSF_HW_CLKRST_REGION(0x04, 29, 1) ,
  VSF_HW_RST_ENET0 = VSF_HW_CLKRST_REGION(0x04, 25, 1) ,
  VSF_HW_RST_DMAMUX = VSF_HW_CLKRST_REGION(0x04, 23, 1) ,
  VSF_HW_RST_DMA1 = VSF_HW_CLKRST_REGION(0x04, 22, 1) ,
  VSF_HW_RST_DMA0 = VSF_HW_CLKRST_REGION(0x04, 21, 1) ,
  VSF_HW_RST_USBHS0 = VSF_HW_CLKRST_REGION(0x04, 14, 1) ,
  VSF_HW_RST_ENET1 = VSF_HW_CLKRST_REGION(0x04, 0, 1) ,
  VSF_HW_RST_TMU = VSF_HW_CLKRST_REGION(0x05, 7, 1) ,
  VSF_HW_RST_TRNG = VSF_HW_CLKRST_REGION(0x05, 6, 1) ,
  VSF_HW_RST_HAU = VSF_HW_CLKRST_REGION(0x05, 4, 1) ,
  VSF_HW_RST_CAU = VSF_HW_CLKRST_REGION(0x05, 3, 1) ,
  VSF_HW_RST_SDIO1 = VSF_HW_CLKRST_REGION(0x05, 2, 1) ,
  VSF_HW_RST_FAC = VSF_HW_CLKRST_REGION(0x05, 1, 1) ,
  VSF_HW_RST_DCI = VSF_HW_CLKRST_REGION(0x05, 0, 1) ,
  VSF_HW_RST_RTDEC1 = VSF_HW_CLKRST_REGION(0x06, 9, 1) ,
  VSF_HW_RST_RTDEC0 = VSF_HW_CLKRST_REGION(0x06, 8, 1) ,
  VSF_HW_RST_OSPI1 = VSF_HW_CLKRST_REGION(0x06, 6, 1) ,
  VSF_HW_RST_OSPI0 = VSF_HW_CLKRST_REGION(0x06, 5, 1) ,
  VSF_HW_RST_OSPIM = VSF_HW_CLKRST_REGION(0x06, 4, 1) ,
  VSF_HW_RST_MDMA = VSF_HW_CLKRST_REGION(0x06, 3, 1) ,
  VSF_HW_RST_SDIO0 = VSF_HW_CLKRST_REGION(0x06, 2, 1) ,
  VSF_HW_RST_IPA = VSF_HW_CLKRST_REGION(0x06, 1, 1) ,
  VSF_HW_RST_EXMC = VSF_HW_CLKRST_REGION(0x06, 0, 1) ,
  VSF_HW_RST_HWSEM = VSF_HW_CLKRST_REGION(0x07, 15, 1) ,
  VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x07, 14, 1) ,
  VSF_HW_RST_GPIOK = VSF_HW_CLKRST_REGION(0x07, 9, 1) ,
  VSF_HW_RST_GPIOJ = VSF_HW_CLKRST_REGION(0x07, 8, 1) ,
  VSF_HW_RST_GPIOH = VSF_HW_CLKRST_REGION(0x07, 7, 1) ,
  VSF_HW_RST_GPIOG = VSF_HW_CLKRST_REGION(0x07, 6, 1) ,
  VSF_HW_RST_GPIOF = VSF_HW_CLKRST_REGION(0x07, 5, 1) ,
  VSF_HW_RST_GPIOE = VSF_HW_CLKRST_REGION(0x07, 4, 1) ,
  VSF_HW_RST_GPIOD = VSF_HW_CLKRST_REGION(0x07, 3, 1) ,
  VSF_HW_RST_GPIOC = VSF_HW_CLKRST_REGION(0x07, 2, 1) ,
  VSF_HW_RST_GPIOB = VSF_HW_CLKRST_REGION(0x07, 1, 1) ,
  VSF_HW_RST_GPIOA = VSF_HW_CLKRST_REGION(0x07, 0, 1) ,
  VSF_HW_RST_UART7 = VSF_HW_CLKRST_REGION(0x08, 31, 1) ,
  VSF_HW_RST_UART6 = VSF_HW_CLKRST_REGION(0x08, 30, 1) ,
  VSF_HW_RST_DAC = VSF_HW_CLKRST_REGION(0x08, 29, 1) ,
  VSF_HW_RST_DACHOLD = VSF_HW_CLKRST_REGION(0x08, 28, 1) ,
  VSF_HW_RST_CTC = VSF_HW_CLKRST_REGION(0x08, 27, 1) ,
  VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x08, 24, 1) ,
  VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x08, 23, 1) ,
  VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x08, 22, 1) ,
  VSF_HW_RST_I2C0 = VSF_HW_CLKRST_REGION(0x08, 21, 1) ,
  VSF_HW_RST_UART4 = VSF_HW_CLKRST_REGION(0x08, 20, 1) ,
  VSF_HW_RST_UART3 = VSF_HW_CLKRST_REGION(0x08, 19, 1) ,
  VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x08, 18, 1) ,
  VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x08, 17, 1) ,
  VSF_HW_RST_MDIO = VSF_HW_CLKRST_REGION(0x08, 16, 1) ,
  VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x08, 15, 1) ,
  VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x08, 14, 1) ,
  VSF_HW_RST_RSPDIF = VSF_HW_CLKRST_REGION(0x08, 13, 1) ,
  VSF_HW_RST_TIMER51 = VSF_HW_CLKRST_REGION(0x08, 11, 1) ,
  VSF_HW_RST_TIMER50 = VSF_HW_CLKRST_REGION(0x08, 10, 1) ,
  VSF_HW_RST_TIMER31 = VSF_HW_CLKRST_REGION(0x08, 9, 1) ,
  VSF_HW_RST_TIMER30 = VSF_HW_CLKRST_REGION(0x08, 8, 1) ,
  VSF_HW_RST_TIMER23 = VSF_HW_CLKRST_REGION(0x08, 7, 1) ,
  VSF_HW_RST_TIMER22 = VSF_HW_CLKRST_REGION(0x08, 6, 1) ,
  VSF_HW_RST_TIMER6 = VSF_HW_CLKRST_REGION(0x08, 5, 1) ,
  VSF_HW_RST_TIMER5 = VSF_HW_CLKRST_REGION(0x08, 4, 1) ,
  VSF_HW_RST_TIMER4 = VSF_HW_CLKRST_REGION(0x08, 3, 1) ,
  VSF_HW_RST_TIMER3 = VSF_HW_CLKRST_REGION(0x08, 2, 1) ,
  VSF_HW_RST_TIMER2 = VSF_HW_CLKRST_REGION(0x08, 1, 1) ,
  VSF_HW_RST_TIMER1 = VSF_HW_CLKRST_REGION(0x08, 0, 1) ,
  VSF_HW_RST_TRIGSEL = VSF_HW_CLKRST_REGION(0x09, 31, 1) ,
  VSF_HW_RST_EDOUT = VSF_HW_CLKRST_REGION(0x09, 30, 1) ,
  VSF_HW_RST_TIMER44 = VSF_HW_CLKRST_REGION(0x09, 29, 1) ,
  VSF_HW_RST_TIMER43 = VSF_HW_CLKRST_REGION(0x09, 28, 1) ,
  VSF_HW_RST_TIMER42 = VSF_HW_CLKRST_REGION(0x09, 27, 1) ,
  VSF_HW_RST_TIMER41 = VSF_HW_CLKRST_REGION(0x09, 26, 1) ,
  VSF_HW_RST_TIMER40 = VSF_HW_CLKRST_REGION(0x09, 25, 1) ,
  VSF_HW_RST_SAI2 = VSF_HW_CLKRST_REGION(0x09, 24, 1) ,
  VSF_HW_RST_SAI1 = VSF_HW_CLKRST_REGION(0x09, 23, 1) ,
  VSF_HW_RST_SAI0 = VSF_HW_CLKRST_REGION(0x09, 22, 1) ,
  VSF_HW_RST_SPI5 = VSF_HW_CLKRST_REGION(0x09, 21, 1) ,
  VSF_HW_RST_SPI4 = VSF_HW_CLKRST_REGION(0x09, 20, 1) ,
  VSF_HW_RST_HPDF = VSF_HW_CLKRST_REGION(0x09, 19, 1) ,
  VSF_HW_RST_TIMER16 = VSF_HW_CLKRST_REGION(0x09, 18, 1) ,
  VSF_HW_RST_TIMER15 = VSF_HW_CLKRST_REGION(0x09, 17, 1) ,
  VSF_HW_RST_TIMER14 = VSF_HW_CLKRST_REGION(0x09, 16, 1) ,
  VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x09, 13, 1) ,
  VSF_HW_RST_SPI0 = VSF_HW_CLKRST_REGION(0x09, 12, 1) ,
  VSF_HW_RST_ADC2 = VSF_HW_CLKRST_REGION(0x09, 10, 1) ,
  VSF_HW_RST_ADC1 = VSF_HW_CLKRST_REGION(0x09, 9, 1) ,
  VSF_HW_RST_ADC0 = VSF_HW_CLKRST_REGION(0x09, 8, 1) ,
  VSF_HW_RST_USART5 = VSF_HW_CLKRST_REGION(0x09, 5, 1) ,
  VSF_HW_RST_USART0 = VSF_HW_CLKRST_REGION(0x09, 4, 1) ,
  VSF_HW_RST_TIMER7 = VSF_HW_CLKRST_REGION(0x09, 1, 1) ,
  VSF_HW_RST_TIMER0 = VSF_HW_CLKRST_REGION(0x09, 0, 1) ,
  VSF_HW_RST_WWDGT = VSF_HW_CLKRST_REGION(0x0A, 1, 1) ,
  VSF_HW_RST_TLI = VSF_HW_CLKRST_REGION(0x0A, 0, 1) ,
  VSF_HW_RST_PMU = VSF_HW_CLKRST_REGION(0x0B, 4, 1) ,
  VSF_HW_RST_LPDTS = VSF_HW_CLKRST_REGION(0x0B, 3, 1) ,
  VSF_HW_RST_VREF = VSF_HW_CLKRST_REGION(0x0B, 2, 1) ,
  VSF_HW_RST_CMP = VSF_HW_CLKRST_REGION(0x0B, 1, 1) ,
  VSF_HW_RST_SYSCFG = VSF_HW_CLKRST_REGION(0x0B, 0, 1)
}
 
enum  vsf_hw_peripheral_en_t {
  VSF_HW_EN_USBHS1ULPI = VSF_HW_CLKRST_REGION(0x0C, 30, 1) ,
  VSF_HW_EN_USBHS1 = VSF_HW_CLKRST_REGION(0x0C, 29, 1) ,
  VSF_HW_EN_ENET0PTP = VSF_HW_CLKRST_REGION(0x0C, 28, 1) ,
  VSF_HW_EN_ENET0RX = VSF_HW_CLKRST_REGION(0x0C, 27, 1) ,
  VSF_HW_EN_ENET0TX = VSF_HW_CLKRST_REGION(0x0C, 26, 1) ,
  VSF_HW_EN_ENET0 = VSF_HW_CLKRST_REGION(0x0C, 25, 1) ,
  VSF_HW_EN_DMAMUX = VSF_HW_CLKRST_REGION(0x0C, 23, 1) ,
  VSF_HW_EN_DMA1 = VSF_HW_CLKRST_REGION(0x0C, 22, 1) ,
  VSF_HW_EN_DMA0 = VSF_HW_CLKRST_REGION(0x0C, 21, 1) ,
  VSF_HW_EN_USBHS0ULPI = VSF_HW_CLKRST_REGION(0x0C, 15, 1) ,
  VSF_HW_EN_USBHS0 = VSF_HW_CLKRST_REGION(0x0C, 14, 1) ,
  VSF_HW_EN_ENET1PTP = VSF_HW_CLKRST_REGION(0x0C, 3, 1) ,
  VSF_HW_EN_ENET1RX = VSF_HW_CLKRST_REGION(0x0C, 2, 1) ,
  VSF_HW_EN_ENET1TX = VSF_HW_CLKRST_REGION(0x0C, 1, 1) ,
  VSF_HW_EN_ENET1 = VSF_HW_CLKRST_REGION(0x0C, 0, 1) ,
  VSF_HW_EN_RAMECCMU1 = VSF_HW_CLKRST_REGION(0x0D, 8, 1) ,
  VSF_HW_EN_TMU = VSF_HW_CLKRST_REGION(0x0D, 7, 1) ,
  VSF_HW_EN_TRNG = VSF_HW_CLKRST_REGION(0x0D, 6, 1) ,
  VSF_HW_EN_HAU = VSF_HW_CLKRST_REGION(0x0D, 4, 1) ,
  VSF_HW_EN_CAU = VSF_HW_CLKRST_REGION(0x0D, 3, 1) ,
  VSF_HW_EN_SDIO1 = VSF_HW_CLKRST_REGION(0x0D, 2, 1) ,
  VSF_HW_EN_FAC = VSF_HW_CLKRST_REGION(0x0D, 1, 1) ,
  VSF_HW_EN_DCI = VSF_HW_CLKRST_REGION(0x0D, 0, 1) ,
  VSF_HW_EN_CPU = VSF_HW_CLKRST_REGION(0x0E, 15, 1) ,
  VSF_HW_EN_RAMECCMU0 = VSF_HW_CLKRST_REGION(0x0E, 10, 1) ,
  VSF_HW_EN_RTDEC1 = VSF_HW_CLKRST_REGION(0x0E, 9, 1) ,
  VSF_HW_EN_RTDEC0 = VSF_HW_CLKRST_REGION(0x0E, 8, 1) ,
  VSF_HW_EN_OSPI1 = VSF_HW_CLKRST_REGION(0x0E, 6, 1) ,
  VSF_HW_EN_OSPI0 = VSF_HW_CLKRST_REGION(0x0E, 5, 1) ,
  VSF_HW_EN_OSPIM = VSF_HW_CLKRST_REGION(0x0E, 4, 1) ,
  VSF_HW_EN_MDMA = VSF_HW_CLKRST_REGION(0x0E, 3, 1) ,
  VSF_HW_EN_SDIO0 = VSF_HW_CLKRST_REGION(0x0E, 2, 1) ,
  VSF_HW_EN_IPA = VSF_HW_CLKRST_REGION(0x0E, 1, 1) ,
  VSF_HW_EN_EXMC = VSF_HW_CLKRST_REGION(0x0E, 0, 1) ,
  VSF_HW_EN_HWSEM = VSF_HW_CLKRST_REGION(0x0F, 15, 1) ,
  VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0x0F, 14, 1) ,
  VSF_HW_EN_BKPSRAM = VSF_HW_CLKRST_REGION(0x0F, 13, 1) ,
  VSF_HW_EN_GPIOK = VSF_HW_CLKRST_REGION(0x0F, 9, 1) ,
  VSF_HW_EN_GPIOJ = VSF_HW_CLKRST_REGION(0x0F, 8, 1) ,
  VSF_HW_EN_GPIOH = VSF_HW_CLKRST_REGION(0x0F, 7, 1) ,
  VSF_HW_EN_GPIOG = VSF_HW_CLKRST_REGION(0x0F, 6, 1) ,
  VSF_HW_EN_GPIOF = VSF_HW_CLKRST_REGION(0x0F, 5, 1) ,
  VSF_HW_EN_GPIOE = VSF_HW_CLKRST_REGION(0x0F, 4, 1) ,
  VSF_HW_EN_GPIOD = VSF_HW_CLKRST_REGION(0x0F, 3, 1) ,
  VSF_HW_EN_GPIOC = VSF_HW_CLKRST_REGION(0x0F, 2, 1) ,
  VSF_HW_EN_GPIOB = VSF_HW_CLKRST_REGION(0x0F, 1, 1) ,
  VSF_HW_EN_GPIOA = VSF_HW_CLKRST_REGION(0x0F, 0, 1) ,
  VSF_HW_EN_UART7 = VSF_HW_CLKRST_REGION(0x10, 31, 1) ,
  VSF_HW_EN_UART6 = VSF_HW_CLKRST_REGION(0x10, 30, 1) ,
  VSF_HW_EN_DAC = VSF_HW_CLKRST_REGION(0x10, 29, 1) ,
  VSF_HW_EN_DACHOLD = VSF_HW_CLKRST_REGION(0x10, 28, 1) ,
  VSF_HW_EN_CTC = VSF_HW_CLKRST_REGION(0x10, 27, 1) ,
  VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x10, 24, 1) ,
  VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x10, 23, 1) ,
  VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x10, 22, 1) ,
  VSF_HW_EN_I2C0 = VSF_HW_CLKRST_REGION(0x10, 21, 1) ,
  VSF_HW_EN_UART4 = VSF_HW_CLKRST_REGION(0x10, 20, 1) ,
  VSF_HW_EN_UART3 = VSF_HW_CLKRST_REGION(0x10, 19, 1) ,
  VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x10, 18, 1) ,
  VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x10, 17, 1) ,
  VSF_HW_EN_MDIO = VSF_HW_CLKRST_REGION(0x10, 16, 1) ,
  VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x10, 15, 1) ,
  VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x10, 14, 1) ,
  VSF_HW_EN_RSPDIF = VSF_HW_CLKRST_REGION(0x10, 13, 1) ,
  VSF_HW_EN_TIMER51 = VSF_HW_CLKRST_REGION(0x10, 11, 1) ,
  VSF_HW_EN_TIMER50 = VSF_HW_CLKRST_REGION(0x10, 10, 1) ,
  VSF_HW_EN_TIMER31 = VSF_HW_CLKRST_REGION(0x10, 9, 1) ,
  VSF_HW_EN_TIMER30 = VSF_HW_CLKRST_REGION(0x10, 8, 1) ,
  VSF_HW_EN_TIMER23 = VSF_HW_CLKRST_REGION(0x10, 7, 1) ,
  VSF_HW_EN_TIMER22 = VSF_HW_CLKRST_REGION(0x10, 6, 1) ,
  VSF_HW_EN_TIMER6 = VSF_HW_CLKRST_REGION(0x10, 5, 1) ,
  VSF_HW_EN_TIMER5 = VSF_HW_CLKRST_REGION(0x10, 4, 1) ,
  VSF_HW_EN_TIMER4 = VSF_HW_CLKRST_REGION(0x10, 3, 1) ,
  VSF_HW_EN_TIMER3 = VSF_HW_CLKRST_REGION(0x10, 2, 1) ,
  VSF_HW_EN_TIMER2 = VSF_HW_CLKRST_REGION(0x10, 1, 1) ,
  VSF_HW_EN_TIMER1 = VSF_HW_CLKRST_REGION(0x10, 0, 1) ,
  VSF_HW_EN_TRIGSEL = VSF_HW_CLKRST_REGION(0x11, 31, 1) ,
  VSF_HW_EN_EDOUT = VSF_HW_CLKRST_REGION(0x11, 30, 1) ,
  VSF_HW_EN_TIMER44 = VSF_HW_CLKRST_REGION(0x11, 29, 1) ,
  VSF_HW_EN_TIMER43 = VSF_HW_CLKRST_REGION(0x11, 28, 1) ,
  VSF_HW_EN_TIMER42 = VSF_HW_CLKRST_REGION(0x11, 27, 1) ,
  VSF_HW_EN_TIMER41 = VSF_HW_CLKRST_REGION(0x11, 26, 1) ,
  VSF_HW_EN_TIMER40 = VSF_HW_CLKRST_REGION(0x11, 25, 1) ,
  VSF_HW_EN_SAI2 = VSF_HW_CLKRST_REGION(0x11, 24, 1) ,
  VSF_HW_EN_SAI1 = VSF_HW_CLKRST_REGION(0x11, 23, 1) ,
  VSF_HW_EN_SAI0 = VSF_HW_CLKRST_REGION(0x11, 22, 1) ,
  VSF_HW_EN_SPI5 = VSF_HW_CLKRST_REGION(0x11, 21, 1) ,
  VSF_HW_EN_SPI4 = VSF_HW_CLKRST_REGION(0x11, 20, 1) ,
  VSF_HW_EN_HPDF = VSF_HW_CLKRST_REGION(0x11, 19, 1) ,
  VSF_HW_EN_TIMER16 = VSF_HW_CLKRST_REGION(0x11, 18, 1) ,
  VSF_HW_EN_TIMER15 = VSF_HW_CLKRST_REGION(0x11, 17, 1) ,
  VSF_HW_EN_TIMER14 = VSF_HW_CLKRST_REGION(0x11, 16, 1) ,
  VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x11, 13, 1) ,
  VSF_HW_EN_SPI0 = VSF_HW_CLKRST_REGION(0x11, 12, 1) ,
  VSF_HW_EN_ADC2 = VSF_HW_CLKRST_REGION(0x11, 10, 1) ,
  VSF_HW_EN_ADC1 = VSF_HW_CLKRST_REGION(0x11, 9, 1) ,
  VSF_HW_EN_ADC0 = VSF_HW_CLKRST_REGION(0x11, 8, 1) ,
  VSF_HW_EN_USART5 = VSF_HW_CLKRST_REGION(0x11, 5, 1) ,
  VSF_HW_EN_USART0 = VSF_HW_CLKRST_REGION(0x11, 4, 1) ,
  VSF_HW_EN_TIMER7 = VSF_HW_CLKRST_REGION(0x11, 1, 1) ,
  VSF_HW_EN_TIMER0 = VSF_HW_CLKRST_REGION(0x11, 0, 1) ,
  VSF_HW_EN_WWDGT = VSF_HW_CLKRST_REGION(0x12, 1, 1) ,
  VSF_HW_EN_TLI = VSF_HW_CLKRST_REGION(0x12, 0, 1) ,
  VSF_HW_EN_PMU = VSF_HW_CLKRST_REGION(0x13, 4, 1) ,
  VSF_HW_EN_LPDTS = VSF_HW_CLKRST_REGION(0x13, 3, 1) ,
  VSF_HW_EN_VREF = VSF_HW_CLKRST_REGION(0x13, 2, 1) ,
  VSF_HW_EN_CMP = VSF_HW_CLKRST_REGION(0x13, 1, 1) ,
  VSF_HW_EN_SYSCFG = VSF_HW_CLKRST_REGION(0x13, 0, 1)
}
 

Functions

const vsf_hw_clk_tvsf_hw_clk_get_src (const vsf_hw_clk_t *clk)
 
uint32_t vsf_hw_clk_get_freq_hz (const vsf_hw_clk_t *clk)
 
void vsf_hw_clk_enable (const vsf_hw_clk_t *clk)
 
void vsf_hw_clk_disable (const vsf_hw_clk_t *clk)
 
vsf_err_t vsf_hw_clk_config (const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
 
void vsf_hw_clkrst_region_set (uint32_t region, uint_fast8_t value)
 
uint_fast8_t vsf_hw_clkrst_region_get (uint32_t region)
 
void vsf_hw_clkrst_region_set_bit (uint32_t region)
 
void vsf_hw_clkrst_region_clear_bit (uint32_t region)
 
uint_fast8_t vsf_hw_clkrst_region_get_bit (uint32_t region)
 
vsf_err_t vsf_hw_pll_vco_config (const vsf_hw_clk_t *clk, uint_fast8_t src_prescaler, uint32_t vco_freq_hz)
 configure frequency range of pll input/output clocks
 

Variables

const vsf_hw_clk_t VSF_HW_CLK_HXTAL
 
const vsf_hw_clk_t VSF_HW_CLK_LXTAL
 
const vsf_hw_clk_t VSF_HW_CLK_IRC64MDIV
 
const vsf_hw_clk_t VSF_HW_CLK_LPIRC4M
 
const vsf_hw_clk_t VSF_HW_CLK_IRC32K
 
const vsf_hw_clk_t VSF_HW_CLK_PLL0_VCO
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1_VCO
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2_VCO
 
const vsf_hw_clk_t VSF_HW_CLK_PLL0P
 
const vsf_hw_clk_t VSF_HW_CLK_PLL0Q
 
const vsf_hw_clk_t VSF_HW_CLK_PLL0R
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1P
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1Q
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1R
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2P
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2Q
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2R
 
const vsf_hw_clk_t VSF_HW_CLK_RTC
 
const vsf_hw_clk_t VSF_HW_CLK_SYS
 
const vsf_hw_clk_t VSF_HW_CLK_AHB
 
const vsf_hw_clk_t VSF_HW_CLK_PER
 
const vsf_hw_clk_t VSF_HW_CLK_PCLK1
 
const vsf_hw_clk_t VSF_HW_CLK_PCLK2
 
const vsf_hw_clk_t VSF_HW_CLK_PCLK3
 
const vsf_hw_clk_t VSF_HW_CLK_PCLK4
 
const vsf_hw_clk_t VSF_HW_CLK_USART0
 
const vsf_hw_clk_t VSF_HW_CLK_USART1
 
const vsf_hw_clk_t VSF_HW_CLK_USART2
 
const vsf_hw_clk_t VSF_HW_CLK_USART5
 
const vsf_hw_clk_t VSF_HW_CLK_SDIO0
 
const vsf_hw_clk_t VSF_HW_CLK_SDIO1
 
const vsf_hw_clk_t VSF_HW_CLK_TLI
 

Macro Definition Documentation

◆ VSF_HW_CLKRST_REGION

#define VSF_HW_CLKRST_REGION (   __WORD_OFFSET,
  __BIT_OFFSET,
  __BIT_LENGTH 
)     (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))

◆ VSF_HW_PLL_IN_RANGE_1M_2M

#define VSF_HW_PLL_IN_RANGE_1M_2M   0

◆ VSF_HW_PLL_IN_RANGE_2M_4M

#define VSF_HW_PLL_IN_RANGE_2M_4M   1

◆ VSF_HW_PLL_IN_RANGE_4M_8M

#define VSF_HW_PLL_IN_RANGE_4M_8M   2

◆ VSF_HW_PLL_IN_RANGE_8M_16M

#define VSF_HW_PLL_IN_RANGE_8M_16M   3

◆ VSF_HW_PLL_OUT_RANGE_192M_836M

#define VSF_HW_PLL_OUT_RANGE_192M_836M   0

◆ VSF_HW_PLL_OUT_RANGE_150M_420M

#define VSF_HW_PLL_OUT_RANGE_150M_420M   1

◆ vsf_hw_peripheral_clk_set

#define vsf_hw_peripheral_clk_set   vsf_hw_clkrst_region_set

◆ vsf_hw_peripheral_clk_get

#define vsf_hw_peripheral_clk_get   vsf_hw_clkrst_region_get

◆ vsf_hw_peripheral_rst_set

#define vsf_hw_peripheral_rst_set   vsf_hw_clkrst_region_set_bit

◆ vsf_hw_peripheral_rst_clear

#define vsf_hw_peripheral_rst_clear   vsf_hw_clkrst_region_clear_bit

◆ vsf_hw_peripheral_rst_get

#define vsf_hw_peripheral_rst_get   vsf_hw_clkrst_region_get_bit

◆ vsf_hw_peripheral_enable

#define vsf_hw_peripheral_enable   vsf_hw_clkrst_region_set_bit

◆ vsf_hw_peripheral_disable

#define vsf_hw_peripheral_disable   vsf_hw_clkrst_region_clear_bit

◆ VSF_HW_CLK_APB1

#define VSF_HW_CLK_APB1   VSF_HW_CLK_PCLK1

◆ VSF_HW_CLK_APB2

#define VSF_HW_CLK_APB2   VSF_HW_CLK_PCLK2

◆ VSF_HW_CLK_APB3

#define VSF_HW_CLK_APB3   VSF_HW_CLK_PCLK3

◆ VSF_HW_CLK_APB4

#define VSF_HW_CLK_APB4   VSF_HW_CLK_PCLK4

◆ VSF_HW_CLK_UART3

#define VSF_HW_CLK_UART3   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_UART4

#define VSF_HW_CLK_UART4   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_UART6

#define VSF_HW_CLK_UART6   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_UART7

#define VSF_HW_CLK_UART7   VSF_HW_CLK_APB1

Typedef Documentation

◆ vsf_hw_peripheral_rst_t

◆ vsf_hw_peripheral_en_t

◆ vsf_hw_clk_t

typedef struct vsf_hw_clk_t vsf_hw_clk_t

Enumeration Type Documentation

◆ vsf_hw_peripheral_rst_t

Enumerator
VSF_HW_RST_USBHS1 
VSF_HW_RST_ENET0 
VSF_HW_RST_DMAMUX 
VSF_HW_RST_DMA1 
VSF_HW_RST_DMA0 
VSF_HW_RST_USBHS0 
VSF_HW_RST_ENET1 
VSF_HW_RST_TMU 
VSF_HW_RST_TRNG 
VSF_HW_RST_HAU 
VSF_HW_RST_CAU 
VSF_HW_RST_SDIO1 
VSF_HW_RST_FAC 
VSF_HW_RST_DCI 
VSF_HW_RST_RTDEC1 
VSF_HW_RST_RTDEC0 
VSF_HW_RST_OSPI1 
VSF_HW_RST_OSPI0 
VSF_HW_RST_OSPIM 
VSF_HW_RST_MDMA 
VSF_HW_RST_SDIO0 
VSF_HW_RST_IPA 
VSF_HW_RST_EXMC 
VSF_HW_RST_HWSEM 
VSF_HW_RST_CRC 
VSF_HW_RST_GPIOK 
VSF_HW_RST_GPIOJ 
VSF_HW_RST_GPIOH 
VSF_HW_RST_GPIOG 
VSF_HW_RST_GPIOF 
VSF_HW_RST_GPIOE 
VSF_HW_RST_GPIOD 
VSF_HW_RST_GPIOC 
VSF_HW_RST_GPIOB 
VSF_HW_RST_GPIOA 
VSF_HW_RST_UART7 
VSF_HW_RST_UART6 
VSF_HW_RST_DAC 
VSF_HW_RST_DACHOLD 
VSF_HW_RST_CTC 
VSF_HW_RST_I2C3 
VSF_HW_RST_I2C2 
VSF_HW_RST_I2C1 
VSF_HW_RST_I2C0 
VSF_HW_RST_UART4 
VSF_HW_RST_UART3 
VSF_HW_RST_USART2 
VSF_HW_RST_USART1 
VSF_HW_RST_MDIO 
VSF_HW_RST_SPI2 
VSF_HW_RST_SPI1 
VSF_HW_RST_RSPDIF 
VSF_HW_RST_TIMER51 
VSF_HW_RST_TIMER50 
VSF_HW_RST_TIMER31 
VSF_HW_RST_TIMER30 
VSF_HW_RST_TIMER23 
VSF_HW_RST_TIMER22 
VSF_HW_RST_TIMER6 
VSF_HW_RST_TIMER5 
VSF_HW_RST_TIMER4 
VSF_HW_RST_TIMER3 
VSF_HW_RST_TIMER2 
VSF_HW_RST_TIMER1 
VSF_HW_RST_TRIGSEL 
VSF_HW_RST_EDOUT 
VSF_HW_RST_TIMER44 
VSF_HW_RST_TIMER43 
VSF_HW_RST_TIMER42 
VSF_HW_RST_TIMER41 
VSF_HW_RST_TIMER40 
VSF_HW_RST_SAI2 
VSF_HW_RST_SAI1 
VSF_HW_RST_SAI0 
VSF_HW_RST_SPI5 
VSF_HW_RST_SPI4 
VSF_HW_RST_HPDF 
VSF_HW_RST_TIMER16 
VSF_HW_RST_TIMER15 
VSF_HW_RST_TIMER14 
VSF_HW_RST_SPI3 
VSF_HW_RST_SPI0 
VSF_HW_RST_ADC2 
VSF_HW_RST_ADC1 
VSF_HW_RST_ADC0 
VSF_HW_RST_USART5 
VSF_HW_RST_USART0 
VSF_HW_RST_TIMER7 
VSF_HW_RST_TIMER0 
VSF_HW_RST_WWDGT 
VSF_HW_RST_TLI 
VSF_HW_RST_PMU 
VSF_HW_RST_LPDTS 
VSF_HW_RST_VREF 
VSF_HW_RST_CMP 
VSF_HW_RST_SYSCFG 

◆ vsf_hw_peripheral_en_t

Enumerator
VSF_HW_EN_USBHS1ULPI 
VSF_HW_EN_USBHS1 
VSF_HW_EN_ENET0PTP 
VSF_HW_EN_ENET0RX 
VSF_HW_EN_ENET0TX 
VSF_HW_EN_ENET0 
VSF_HW_EN_DMAMUX 
VSF_HW_EN_DMA1 
VSF_HW_EN_DMA0 
VSF_HW_EN_USBHS0ULPI 
VSF_HW_EN_USBHS0 
VSF_HW_EN_ENET1PTP 
VSF_HW_EN_ENET1RX 
VSF_HW_EN_ENET1TX 
VSF_HW_EN_ENET1 
VSF_HW_EN_RAMECCMU1 
VSF_HW_EN_TMU 
VSF_HW_EN_TRNG 
VSF_HW_EN_HAU 
VSF_HW_EN_CAU 
VSF_HW_EN_SDIO1 
VSF_HW_EN_FAC 
VSF_HW_EN_DCI 
VSF_HW_EN_CPU 
VSF_HW_EN_RAMECCMU0 
VSF_HW_EN_RTDEC1 
VSF_HW_EN_RTDEC0 
VSF_HW_EN_OSPI1 
VSF_HW_EN_OSPI0 
VSF_HW_EN_OSPIM 
VSF_HW_EN_MDMA 
VSF_HW_EN_SDIO0 
VSF_HW_EN_IPA 
VSF_HW_EN_EXMC 
VSF_HW_EN_HWSEM 
VSF_HW_EN_CRC 
VSF_HW_EN_BKPSRAM 
VSF_HW_EN_GPIOK 
VSF_HW_EN_GPIOJ 
VSF_HW_EN_GPIOH 
VSF_HW_EN_GPIOG 
VSF_HW_EN_GPIOF 
VSF_HW_EN_GPIOE 
VSF_HW_EN_GPIOD 
VSF_HW_EN_GPIOC 
VSF_HW_EN_GPIOB 
VSF_HW_EN_GPIOA 
VSF_HW_EN_UART7 
VSF_HW_EN_UART6 
VSF_HW_EN_DAC 
VSF_HW_EN_DACHOLD 
VSF_HW_EN_CTC 
VSF_HW_EN_I2C3 
VSF_HW_EN_I2C2 
VSF_HW_EN_I2C1 
VSF_HW_EN_I2C0 
VSF_HW_EN_UART4 
VSF_HW_EN_UART3 
VSF_HW_EN_USART2 
VSF_HW_EN_USART1 
VSF_HW_EN_MDIO 
VSF_HW_EN_SPI2 
VSF_HW_EN_SPI1 
VSF_HW_EN_RSPDIF 
VSF_HW_EN_TIMER51 
VSF_HW_EN_TIMER50 
VSF_HW_EN_TIMER31 
VSF_HW_EN_TIMER30 
VSF_HW_EN_TIMER23 
VSF_HW_EN_TIMER22 
VSF_HW_EN_TIMER6 
VSF_HW_EN_TIMER5 
VSF_HW_EN_TIMER4 
VSF_HW_EN_TIMER3 
VSF_HW_EN_TIMER2 
VSF_HW_EN_TIMER1 
VSF_HW_EN_TRIGSEL 
VSF_HW_EN_EDOUT 
VSF_HW_EN_TIMER44 
VSF_HW_EN_TIMER43 
VSF_HW_EN_TIMER42 
VSF_HW_EN_TIMER41 
VSF_HW_EN_TIMER40 
VSF_HW_EN_SAI2 
VSF_HW_EN_SAI1 
VSF_HW_EN_SAI0 
VSF_HW_EN_SPI5 
VSF_HW_EN_SPI4 
VSF_HW_EN_HPDF 
VSF_HW_EN_TIMER16 
VSF_HW_EN_TIMER15 
VSF_HW_EN_TIMER14 
VSF_HW_EN_SPI3 
VSF_HW_EN_SPI0 
VSF_HW_EN_ADC2 
VSF_HW_EN_ADC1 
VSF_HW_EN_ADC0 
VSF_HW_EN_USART5 
VSF_HW_EN_USART0 
VSF_HW_EN_TIMER7 
VSF_HW_EN_TIMER0 
VSF_HW_EN_WWDGT 
VSF_HW_EN_TLI 
VSF_HW_EN_PMU 
VSF_HW_EN_LPDTS 
VSF_HW_EN_VREF 
VSF_HW_EN_CMP 
VSF_HW_EN_SYSCFG 

Function Documentation

◆ vsf_hw_clk_get_src()

const vsf_hw_clk_t * vsf_hw_clk_get_src ( const vsf_hw_clk_t clk)
extern

◆ vsf_hw_clk_get_freq_hz()

uint32_t vsf_hw_clk_get_freq_hz ( const vsf_hw_clk_t clk)
extern

◆ vsf_hw_clk_enable()

void vsf_hw_clk_enable ( const vsf_hw_clk_t clk)
extern

◆ vsf_hw_clk_disable()

void vsf_hw_clk_disable ( const vsf_hw_clk_t clk)
extern

◆ vsf_hw_clk_config()

vsf_err_t vsf_hw_clk_config ( const vsf_hw_clk_t clk,
const vsf_hw_clk_t clksrc,
uint16_t  prescaler,
uint32_t  freq_hz 
)
extern

◆ vsf_hw_clkrst_region_set()

void vsf_hw_clkrst_region_set ( uint32_t  region,
uint_fast8_t  value 
)
extern

◆ vsf_hw_clkrst_region_get()

uint_fast8_t vsf_hw_clkrst_region_get ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_set_bit()

void vsf_hw_clkrst_region_set_bit ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_clear_bit()

void vsf_hw_clkrst_region_clear_bit ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_get_bit()

uint_fast8_t vsf_hw_clkrst_region_get_bit ( uint32_t  region)
extern

◆ vsf_hw_pll_vco_config()

vsf_err_t vsf_hw_pll_vco_config ( const vsf_hw_clk_t clk,
uint_fast8_t  src_prescaler,
uint32_t  vco_freq_hz 
)
extern

configure frequency range of pll input/output clocks

Parameters
[in]clka pointer to PLL_VCO clock VSF_HW_CLK_PLL0_VCO VSF_HW_CLK_PLL1_VCO VSF_HW_CLK_PLL2_VCO
[in]src_prescalerprescaler of clock src, [1 .. 63]
[in]vco_freq_hzVCO frequency in Hz

Variable Documentation

◆ VSF_HW_CLK_HXTAL

const vsf_hw_clk_t VSF_HW_CLK_HXTAL
extern

◆ VSF_HW_CLK_LXTAL

const vsf_hw_clk_t VSF_HW_CLK_LXTAL
extern

◆ VSF_HW_CLK_IRC64MDIV

const vsf_hw_clk_t VSF_HW_CLK_IRC64MDIV
extern

◆ VSF_HW_CLK_LPIRC4M

const vsf_hw_clk_t VSF_HW_CLK_LPIRC4M
extern

◆ VSF_HW_CLK_IRC32K

const vsf_hw_clk_t VSF_HW_CLK_IRC32K
extern

◆ VSF_HW_CLK_PLL0_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL0_VCO
extern

◆ VSF_HW_CLK_PLL1_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL1_VCO
extern

◆ VSF_HW_CLK_PLL2_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL2_VCO
extern

◆ VSF_HW_CLK_PLL0P

const vsf_hw_clk_t VSF_HW_CLK_PLL0P
extern

◆ VSF_HW_CLK_PLL0Q

const vsf_hw_clk_t VSF_HW_CLK_PLL0Q
extern

◆ VSF_HW_CLK_PLL0R

const vsf_hw_clk_t VSF_HW_CLK_PLL0R
extern

◆ VSF_HW_CLK_PLL1P

const vsf_hw_clk_t VSF_HW_CLK_PLL1P
extern

◆ VSF_HW_CLK_PLL1Q

const vsf_hw_clk_t VSF_HW_CLK_PLL1Q
extern

◆ VSF_HW_CLK_PLL1R

const vsf_hw_clk_t VSF_HW_CLK_PLL1R
extern

◆ VSF_HW_CLK_PLL2P

const vsf_hw_clk_t VSF_HW_CLK_PLL2P
extern

◆ VSF_HW_CLK_PLL2Q

const vsf_hw_clk_t VSF_HW_CLK_PLL2Q
extern

◆ VSF_HW_CLK_PLL2R

const vsf_hw_clk_t VSF_HW_CLK_PLL2R
extern

◆ VSF_HW_CLK_RTC

const vsf_hw_clk_t VSF_HW_CLK_RTC
extern

◆ VSF_HW_CLK_SYS

const vsf_hw_clk_t VSF_HW_CLK_SYS
extern

◆ VSF_HW_CLK_AHB

const vsf_hw_clk_t VSF_HW_CLK_AHB
extern

◆ VSF_HW_CLK_PER

const vsf_hw_clk_t VSF_HW_CLK_PER
extern

◆ VSF_HW_CLK_PCLK1

const vsf_hw_clk_t VSF_HW_CLK_PCLK1
extern

◆ VSF_HW_CLK_PCLK2

const vsf_hw_clk_t VSF_HW_CLK_PCLK2
extern

◆ VSF_HW_CLK_PCLK3

const vsf_hw_clk_t VSF_HW_CLK_PCLK3
extern

◆ VSF_HW_CLK_PCLK4

const vsf_hw_clk_t VSF_HW_CLK_PCLK4
extern

◆ VSF_HW_CLK_USART0

const vsf_hw_clk_t VSF_HW_CLK_USART0
extern

◆ VSF_HW_CLK_USART1

const vsf_hw_clk_t VSF_HW_CLK_USART1
extern

◆ VSF_HW_CLK_USART2

const vsf_hw_clk_t VSF_HW_CLK_USART2
extern

◆ VSF_HW_CLK_USART5

const vsf_hw_clk_t VSF_HW_CLK_USART5
extern

◆ VSF_HW_CLK_SDIO0

const vsf_hw_clk_t VSF_HW_CLK_SDIO0
extern

◆ VSF_HW_CLK_SDIO1

const vsf_hw_clk_t VSF_HW_CLK_SDIO1
extern

◆ VSF_HW_CLK_TLI

const vsf_hw_clk_t VSF_HW_CLK_TLI
extern