driver.c File Reference

#include "hal/vsf_hal_cfg.h"
#include "../__device.h"
#include "./vendor/Include/gd32h7xx.h"
#include "hal/driver/common/swi/arm/vsf_swi_template.inc"
#include "service/trace/vsf_trace.h"

Data Structures
struct	vsf_hw_clk_t

Typedefs
typedef enum vsf_hw_peripheral_clksel_t	vsf_hw_peripheral_clksel_t

Enumerations
enum	vsf_hw_peripheral_clksel_t {   VSF_HW_CLKSEL_HPDF = VSF_HW_CLKRST_REGION(0x23, 31, 1) ,   VSF_HW_CLKSEL_TIMER = VSF_HW_CLKRST_REGION(0x23, 24, 1) ,   VSF_HW_CLKSEL_USART5 = VSF_HW_CLKRST_REGION(0x23, 22, 2) ,   VSF_HW_CLKSEL_USART2 = VSF_HW_CLKRST_REGION(0x23, 20, 2) ,   VSF_HW_CLKSEL_USART1 = VSF_HW_CLKRST_REGION(0x23, 18, 2) ,   VSF_HW_CLKSEL_PER = VSF_HW_CLKRST_REGION(0x23, 14, 2) ,   VSF_HW_CLKSEL_CAN2 = VSF_HW_CLKRST_REGION(0x23, 12, 2) ,   VSF_HW_CLKSEL_CAN1 = VSF_HW_CLKRST_REGION(0x23, 10, 2) ,   VSF_HW_CLKSEL_CAN0 = VSF_HW_CLKRST_REGION(0x23, 8, 2) ,   VSF_HW_CLKSEL_RSPDIF = VSF_HW_CLKRST_REGION(0x23, 4, 2) ,   VSF_HW_CLKSEL_USART0 = VSF_HW_CLKRST_REGION(0x23, 0, 2) ,   VSF_HW_CLKSEL_SAI2B1 = VSF_HW_CLKRST_REGION(0x24, 28, 3) ,   VSF_HW_CLKSEL_SAI2B0 = VSF_HW_CLKRST_REGION(0x24, 24, 3) ,   VSF_HW_CLKSEL_SAI1 = VSF_HW_CLKRST_REGION(0x24, 20, 3) ,   VSF_HW_CLKSEL_SAI0 = VSF_HW_CLKRST_REGION(0x24, 16, 3) ,   VSF_HW_CLKSEL_CKOUT1 = VSF_HW_CLKRST_REGION(0x24, 12, 3) ,   VSF_HW_CLKSEL_CKOUT0 = VSF_HW_CLKRST_REGION(0x24, 4, 3) ,   VSF_HW_CLKSEL_ADC2 = VSF_HW_CLKRST_REGION(0x25, 28, 2) ,   VSF_HW_CLKSEL_ADC1 = VSF_HW_CLKRST_REGION(0x25, 26, 2) ,   VSF_HW_CLKSEL_DSPWUS = VSF_HW_CLKRST_REGION(0x25, 24, 1) ,   VSF_HW_CLKSEL_SDIO1 = VSF_HW_CLKRST_REGION(0x25, 12, 1) ,   VSF_HW_CLKSEL_I2C3 = VSF_HW_CLKRST_REGION(0x25, 4, 2) ,   VSF_HW_CLKSEL_I2C2 = VSF_HW_CLKRST_REGION(0x25, 2, 2) ,   VSF_HW_CLKSEL_I2C1 = VSF_HW_CLKRST_REGION(0x25, 0, 2) ,   VSF_HW_CLKSEL_EXMC = VSF_HW_CLKRST_REGION(0x34, 8, 2) ,   VSF_HW_CLKSEL_SDIO0 = VSF_HW_CLKRST_REGION(0x34, 0, 1) }
enum	{   VSF_HW_CLK_PRESCALER_NONE = 0 ,   VSF_HW_CLK_PRESCALER_CONST ,   VSF_HW_CLK_PRESCALER_DIV ,   VSF_HW_CLK_PRESCALER_ADD1_DIV ,   VSF_HW_CLK_PRESCALER_SFT ,   VSF_HW_CLK_PRESCALER_ADD1_SFT ,   VSF_HW_CLK_PRESCALER_FUNC }
enum	{   VSF_HW_CLK_TYPE_CONST ,   VSF_HW_CLK_TYPE_CLK ,   VSF_HW_CLK_TYPE_SEL }

Functions
void	vsf_hw_clkrst_region_set (uint32_t region, uint_fast8_t value)
uint_fast8_t	vsf_hw_clkrst_region_get (uint32_t region)
void	vsf_hw_clkrst_region_set_bit (uint32_t region)
void	vsf_hw_clkrst_region_clear_bit (uint32_t region)
uint_fast8_t	vsf_hw_clkrst_region_get_bit (uint32_t region)
const vsf_hw_clk_t *	vsf_hw_clk_get_src (const vsf_hw_clk_t *clk)
uint32_t	vsf_hw_clk_get_freq_hz (const vsf_hw_clk_t *clk)
void	vsf_hw_clk_enable (const vsf_hw_clk_t *clk)
void	vsf_hw_clk_disable (const vsf_hw_clk_t *clk)
bool	vsf_hw_clk_is_enabled (const vsf_hw_clk_t *clk)
bool	vsf_hw_clk_is_ready (const vsf_hw_clk_t *clk)
vsf_err_t	vsf_hw_clk_config (const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
vsf_err_t	vsf_hw_pll_vco_config (const vsf_hw_clk_t *clk, uint_fast8_t src_prescaler, uint32_t vco_freq_hz)
	configure frequency range of pll input/output clocks
void	nvic_vector_table_set (uint32_t nvic_vict_tab, uint32_t offset)
void	HardFault_Handler (void)
void	MemManage_Handler (void)
void	BusFault_Handler (void)
void	vsf_hw_mpu_add_basic_resgions (void)
bool	vsf_driver_init (void)
	common hal drivers

Variables
const vsf_hw_clk_t	VSF_HW_CLK_HXTAL
const vsf_hw_clk_t	VSF_HW_CLK_LXTAL
const vsf_hw_clk_t	VSF_HW_CLK_IRC64MDIV
const vsf_hw_clk_t	VSF_HW_CLK_LPIRC4M
const vsf_hw_clk_t	VSF_HW_CLK_IRC32K
const vsf_hw_clk_t	VSF_HW_CLK_PLL0_VCO
const vsf_hw_clk_t	VSF_HW_CLK_PLL1_VCO
const vsf_hw_clk_t	VSF_HW_CLK_PLL2_VCO
const vsf_hw_clk_t	VSF_HW_CLK_PLL0P
const vsf_hw_clk_t	VSF_HW_CLK_PLL0Q
const vsf_hw_clk_t	VSF_HW_CLK_PLL0R
const vsf_hw_clk_t	VSF_HW_CLK_PLL1P
const vsf_hw_clk_t	VSF_HW_CLK_PLL1Q
const vsf_hw_clk_t	VSF_HW_CLK_PLL1R
const vsf_hw_clk_t	VSF_HW_CLK_PLL2P
const vsf_hw_clk_t	VSF_HW_CLK_PLL2Q
const vsf_hw_clk_t	VSF_HW_CLK_PLL2R
const vsf_hw_clk_t	VSF_HW_CLK_RTCDIV
const vsf_hw_clk_t	VSF_HW_CLK_RTC
const vsf_hw_clk_t	VSF_HW_CLK_SYS
const vsf_hw_clk_t	VSF_HW_CLK_PER
const vsf_hw_clk_t	VSF_HW_CLK_AHB
const vsf_hw_clk_t	VSF_HW_CLK_PCLK1
const vsf_hw_clk_t	VSF_HW_CLK_PCLK2
const vsf_hw_clk_t	VSF_HW_CLK_PCLK3
const vsf_hw_clk_t	VSF_HW_CLK_PCLK4
const vsf_hw_clk_t	VSF_HW_CLK_USART0
const vsf_hw_clk_t	VSF_HW_CLK_USART1
const vsf_hw_clk_t	VSF_HW_CLK_USART2
const vsf_hw_clk_t	VSF_HW_CLK_USART5
const vsf_hw_clk_t	VSF_HW_CLK_SDIO0
const vsf_hw_clk_t	VSF_HW_CLK_SDIO1
const vsf_hw_clk_t	VSF_HW_CLK_TLI
const vsf_hw_clk_t	VSF_HW_CLK_EXMC

Typedef Documentation

vsf_hw_peripheral_clksel_t

typedef enum vsf_hw_peripheral_clksel_t vsf_hw_peripheral_clksel_t

Enumeration Type Documentation

vsf_hw_peripheral_clksel_t

enum vsf_hw_peripheral_clksel_t

Enumerator
VSF_HW_CLKSEL_HPDF
VSF_HW_CLKSEL_TIMER
VSF_HW_CLKSEL_USART5
VSF_HW_CLKSEL_USART2
VSF_HW_CLKSEL_USART1
VSF_HW_CLKSEL_PER
VSF_HW_CLKSEL_CAN2
VSF_HW_CLKSEL_CAN1
VSF_HW_CLKSEL_CAN0
VSF_HW_CLKSEL_RSPDIF
VSF_HW_CLKSEL_USART0
VSF_HW_CLKSEL_SAI2B1
VSF_HW_CLKSEL_SAI2B0
VSF_HW_CLKSEL_SAI1
VSF_HW_CLKSEL_SAI0
VSF_HW_CLKSEL_CKOUT1
VSF_HW_CLKSEL_CKOUT0
VSF_HW_CLKSEL_ADC2
VSF_HW_CLKSEL_ADC1
VSF_HW_CLKSEL_DSPWUS
VSF_HW_CLKSEL_SDIO1
VSF_HW_CLKSEL_I2C3
VSF_HW_CLKSEL_I2C2
VSF_HW_CLKSEL_I2C1
VSF_HW_CLKSEL_EXMC
VSF_HW_CLKSEL_SDIO0

anonymous enum

anonymous enum

Enumerator
VSF_HW_CLK_PRESCALER_NONE
VSF_HW_CLK_PRESCALER_CONST
VSF_HW_CLK_PRESCALER_DIV
VSF_HW_CLK_PRESCALER_ADD1_DIV
VSF_HW_CLK_PRESCALER_SFT
VSF_HW_CLK_PRESCALER_ADD1_SFT
VSF_HW_CLK_PRESCALER_FUNC

anonymous enum

anonymous enum

Enumerator
VSF_HW_CLK_TYPE_CONST
VSF_HW_CLK_TYPE_CLK
VSF_HW_CLK_TYPE_SEL

Function Documentation

vsf_hw_clkrst_region_set()

void vsf_hw_clkrst_region_set	(	uint32_t	region,
		uint_fast8_t	value
	)

vsf_hw_clkrst_region_get()

uint_fast8_t vsf_hw_clkrst_region_get

(

uint32_t

region

)

vsf_hw_clkrst_region_set_bit()

void vsf_hw_clkrst_region_set_bit

(

uint32_t

region

)

vsf_hw_clkrst_region_clear_bit()

void vsf_hw_clkrst_region_clear_bit

(

uint32_t

region

)

vsf_hw_clkrst_region_get_bit()

uint_fast8_t vsf_hw_clkrst_region_get_bit

(

uint32_t

region

)

vsf_hw_clk_get_src()

const vsf_hw_clk_t * vsf_hw_clk_get_src

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_get_freq_hz()

uint32_t vsf_hw_clk_get_freq_hz

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_enable()

void vsf_hw_clk_enable

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_disable()

void vsf_hw_clk_disable

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_is_enabled()

bool vsf_hw_clk_is_enabled

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_is_ready()

bool vsf_hw_clk_is_ready

(

const vsf_hw_clk_t *

clk

)

vsf_hw_clk_config()

vsf_err_t vsf_hw_clk_config	(	const vsf_hw_clk_t *	clk,
		const vsf_hw_clk_t *	clksrc,
		uint16_t	prescaler,
		uint32_t	freq_hz
	)

vsf_hw_pll_vco_config()

vsf_err_t vsf_hw_pll_vco_config	(	const vsf_hw_clk_t *	clk,
		uint_fast8_t	src_prescaler,
		uint32_t	vco_freq_hz
	)

configure frequency range of pll input/output clocks

configure VCO clock pll output

Parameters

[in]	clk	a pointer to PLL_VCO clock VSF_HW_CLK_PLL0_VCO VSF_HW_CLK_PLL1_VCO VSF_HW_CLK_PLL2_VCO
[in]	src_prescaler	prescaler of clock src, [1 .. 63]
[in]	vco_freq_hz	VCO frequency in Hz

nvic_vector_table_set()

void nvic_vector_table_set	(	uint32_t	nvic_vict_tab,
		uint32_t	offset
	)

HardFault_Handler()

void HardFault_Handler

(

void

)

MemManage_Handler()

void MemManage_Handler

(

void

)

BusFault_Handler()

void BusFault_Handler

(

void

)

vsf_hw_mpu_add_basic_resgions()

void vsf_hw_mpu_add_basic_resgions

(

void

)

vsf_driver_init()

bool vsf_driver_init

(

void

)

common hal drivers

Note

initialize device driver

Parameters

none

Return values

true	initialization succeeded.
false	initialization failed

initialise interrupt controller;

Variable Documentation

VSF_HW_CLK_HXTAL

const vsf_hw_clk_t VSF_HW_CLK_HXTAL

Initial value:

= {
    .clken_region               = VSF_HW_CLKRST_REGION(0x00, 16, 1),
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x00, 17, 1),
 
    .clk_freq_hz                = HXTAL_VALUE,
    .clktype                    = VSF_HW_CLK_TYPE_CONST,
}

VSF_HW_CLK_LXTAL

const vsf_hw_clk_t VSF_HW_CLK_LXTAL

Initial value:

= {
    .clken_region               = VSF_HW_CLKRST_REGION(0x1C, 0, 1), 
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x1C, 1, 1), 
 
    .clk_freq_hz                = LXTAL_VALUE,
    .clktype                    = VSF_HW_CLK_TYPE_CONST,
}

VSF_HW_CLK_IRC64MDIV

const vsf_hw_clk_t VSF_HW_CLK_IRC64MDIV

Initial value:

= {
    .clken_region               = VSF_HW_CLKRST_REGION(0x00, 30, 1),
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x00, 31, 1),
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x31, 16, 2),
 
    .clk_freq_hz                = IRC64M_VALUE,
    .clktype                    = VSF_HW_CLK_TYPE_CONST,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 3,
}

VSF_HW_CLK_LPIRC4M

const vsf_hw_clk_t VSF_HW_CLK_LPIRC4M

Initial value:

= {
    .clken_region               = VSF_HW_CLKRST_REGION(0x31, 0, 1), 
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x31, 1, 1), 
 
    .clk_freq_hz                = LPIRC4M_VALUE,
    .clktype                    = VSF_HW_CLK_TYPE_CONST,
}

VSF_HW_CLK_IRC32K

const vsf_hw_clk_t VSF_HW_CLK_IRC32K

Initial value:

= {
    .clken_region               = VSF_HW_CLKRST_REGION(0x1D, 0, 1), 
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x1D, 1, 1), 
 
    .clk_freq_hz                = IRC32K_VALUE,
    .clktype                    = VSF_HW_CLK_TYPE_CONST,
}

VSF_HW_CLK_PLL0_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL0_VCO

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x01, 0, 6), 
    .clksel_region              = VSF_HW_CLKRST_REGION(0x26, 0, 3), 
    .clken_region               = VSF_HW_CLKRST_REGION(0x00, 24, 1),
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x00, 25, 1),
 
    .clksrc                     = &__VSF_HW_CLK_PLL_SRC,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .getclk                     = __vsf_hw_pll_get_vco,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_FUNC,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 63,
}

VSF_HW_CLK_PLL1_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL1_VCO

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x21, 0, 6), 
    .clksel_region              = VSF_HW_CLKRST_REGION(0x26, 4, 3), 
    .clken_region               = VSF_HW_CLKRST_REGION(0x00, 26, 1),
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x00, 27, 1),
 
    .clksrc                     = &__VSF_HW_CLK_PLL_SRC,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .getclk                     = __vsf_hw_pll_get_vco,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_FUNC,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 63,
}

VSF_HW_CLK_PLL2_VCO

const vsf_hw_clk_t VSF_HW_CLK_PLL2_VCO

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x22, 0, 6), 
    .clksel_region              = VSF_HW_CLKRST_REGION(0x26, 8, 3), 
    .clken_region               = VSF_HW_CLKRST_REGION(0x00, 28, 1),
    .clkrdy_region              = VSF_HW_CLKRST_REGION(0x00, 29, 1),
 
    .clksrc                     = &__VSF_HW_CLK_PLL_SRC,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .getclk                     = __vsf_hw_pll_get_vco,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_FUNC,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 63,
}

VSF_HW_CLK_PLL0P

const vsf_hw_clk_t VSF_HW_CLK_PLL0P

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x01, 16, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 25, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL0_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL0Q

const vsf_hw_clk_t VSF_HW_CLK_PLL0Q

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x20, 0, 7), 
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 23, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL0_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL0R

const vsf_hw_clk_t VSF_HW_CLK_PLL0R

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x01, 24, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 24, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL0_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL1P

const vsf_hw_clk_t VSF_HW_CLK_PLL1P

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x21, 16, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 28, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL1_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL1Q

const vsf_hw_clk_t VSF_HW_CLK_PLL1Q

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x20, 8, 7), 
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 26, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL1_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL1R

const vsf_hw_clk_t VSF_HW_CLK_PLL1R

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x21, 24, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 27, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL1_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL2P

const vsf_hw_clk_t VSF_HW_CLK_PLL2P

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x22, 16, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 31, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL2_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL2Q

const vsf_hw_clk_t VSF_HW_CLK_PLL2Q

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x20, 16, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 29, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL2_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_PLL2R

const vsf_hw_clk_t VSF_HW_CLK_PLL2R

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x22, 24, 7),
    .clken_region               = VSF_HW_CLKRST_REGION(0x20, 30, 1),
 
    .clksrc                     = &VSF_HW_CLK_PLL2_VCO,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_DIV,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 127,
}

VSF_HW_CLK_RTCDIV

const vsf_hw_clk_t VSF_HW_CLK_RTCDIV

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 16, 6),
 
    .clksrc                     = &VSF_HW_CLK_HXTAL,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
    .clkprescaler_min           = 2,
    .clkprescaler_max           = 63,
}

VSF_HW_CLK_RTC

const vsf_hw_clk_t VSF_HW_CLK_RTC

Initial value:

= {
    .clksel_region              = VSF_HW_CLKRST_REGION(0x1C, 8, 2), 
 
    .clksel_mapper              = __VSF_HW_CLK_RTC_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_SYS

const vsf_hw_clk_t VSF_HW_CLK_SYS

Initial value:

= {
    .clksel_region              = VSF_HW_CLKRST_REGION(0x02, 0, 2), 
 
    .clksel_mapper              = __VSF_HW_CLK_SYS_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_PER

const vsf_hw_clk_t VSF_HW_CLK_PER

Initial value:

= {
    .clksel_region              = VSF_HW_CLKRST_REGION(0x23, 14, 2),
 
    .clksel_mapper              = __VSF_HW_CLK_PLL_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_AHB

const vsf_hw_clk_t VSF_HW_CLK_AHB

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 4, 4), 
 
    .clksrc                     = &VSF_HW_CLK_SYS,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
    .clkprescaler_mapper        = __VSF_HW_CLK_AHB_PRESCALER,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 15,
}

VSF_HW_CLK_PCLK1

const vsf_hw_clk_t VSF_HW_CLK_PCLK1

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 10, 3),
 
    .clksrc                     = &VSF_HW_CLK_AHB,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_mapper        = __VSF_HW_CLK_PCLK_PRESCALER,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
 
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 4,
}

VSF_HW_CLK_PCLK2

const vsf_hw_clk_t VSF_HW_CLK_PCLK2

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 13, 3),
 
    .clksrc                     = &VSF_HW_CLK_AHB,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_mapper        = __VSF_HW_CLK_PCLK_PRESCALER,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
 
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 4,
}

VSF_HW_CLK_PCLK3

const vsf_hw_clk_t VSF_HW_CLK_PCLK3

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 27, 3),
 
    .clksrc                     = &VSF_HW_CLK_AHB,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_mapper        = __VSF_HW_CLK_PCLK_PRESCALER,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
 
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 4,
}

VSF_HW_CLK_PCLK4

const vsf_hw_clk_t VSF_HW_CLK_PCLK4

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x02, 24, 3),
 
    .clksrc                     = &VSF_HW_CLK_AHB,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_mapper        = __VSF_HW_CLK_PCLK_PRESCALER,
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_SFT,
 
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 4,
}

VSF_HW_CLK_USART0

const vsf_hw_clk_t VSF_HW_CLK_USART0

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_USART0,
    .clksel_mapper              = __VSF_HW_CLK_USART_APB2_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_USART1

const vsf_hw_clk_t VSF_HW_CLK_USART1

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_USART1,
    .clksel_mapper              = __VSF_HW_CLK_USART_APB1_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_USART2

const vsf_hw_clk_t VSF_HW_CLK_USART2

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_USART2,
    .clksel_mapper              = __VSF_HW_CLK_USART_APB1_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_USART5

const vsf_hw_clk_t VSF_HW_CLK_USART5

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_USART5,
    .clksel_mapper              = __VSF_HW_CLK_USART_APB2_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_SDIO0

const vsf_hw_clk_t VSF_HW_CLK_SDIO0

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_SDIO0,
    .clksel_mapper              = __VSF_HW_CLK_SDIO_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_SDIO1

const vsf_hw_clk_t VSF_HW_CLK_SDIO1

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_SDIO1,
    .clksel_mapper              = __VSF_HW_CLK_SDIO_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}

VSF_HW_CLK_TLI

const vsf_hw_clk_t VSF_HW_CLK_TLI

Initial value:

= {
    .clkprescaler_region        = VSF_HW_CLKRST_REGION(0x23, 16, 2),
 
    .clksrc                     = &VSF_HW_CLK_PLL2R,
    .clktype                    = VSF_HW_CLK_TYPE_CLK,
 
    .clkprescaler_type          = VSF_HW_CLK_PRESCALER_ADD1_SFT,
 
    .clkprescaler_min           = 0,
    .clkprescaler_max           = 3,
}

VSF_HW_CLK_EXMC

const vsf_hw_clk_t VSF_HW_CLK_EXMC

Initial value:

= {
    .clksel_region              = VSF_HW_CLKSEL_EXMC,
    .clksel_mapper              = __VSF_HW_CLK_EXMC_CLKSEL_MAPPER,
    .clktype                    = VSF_HW_CLK_TYPE_SEL,
}