VSF Documented
common.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __HAL_DRIVER_SIFLI_SF32LB52X_COMMON_H__
19#define __HAL_DRIVER_SIFLI_SF32LB52X_COMMON_H__
20
21/* \note common.h should only be included by device.h */
22
23/*============================ INCLUDES ======================================*/
24
25#include "hal/vsf_hal_cfg.h"
26#include "hal/arch/vsf_arch.h"
27
28/*============================ MACROS ========================================*/
29
30#define SWI0_IRQn Interrupt23_IRQn
31#define SWI1_IRQn Interrupt24_IRQn
32#define SWI2_IRQn Interrupt25_IRQn
33#define SWI3_IRQn Interrupt26_IRQn
34#define SWI4_IRQn Interrupt27_IRQn
35#define SWI5_IRQn Interrupt28_IRQn
36#define SWI6_IRQn Interrupt29_IRQn
37#define SWI7_IRQn Interrupt30_IRQn
38#define SWI8_IRQn Interrupt31_IRQn
39#define SWI9_IRQn Interrupt32_IRQn
40#define SWI10_IRQn Interrupt33_IRQn
41#define SWI11_IRQn Interrupt34_IRQn
42#define SWI12_IRQn Interrupt35_IRQn
43#define SWI13_IRQn Interrupt36_IRQn
44#define SWI14_IRQn Interrupt37_IRQn
45#define SWI15_IRQn Interrupt38_IRQn
46#define SWI16_IRQn Interrupt39_IRQn
47#define SWI17_IRQn Interrupt40_IRQn
48#define SWI18_IRQn Interrupt41_IRQn
49#define SWI19_IRQn Interrupt42_IRQn
50#define SWI20_IRQn Interrupt43_IRQn
51#define SWI21_IRQn Interrupt44_IRQn
52#define SWI22_IRQn Interrupt45_IRQn
53#define SWI23_IRQn Interrupt80_IRQn
54#define SWI24_IRQn Interrupt81_IRQn
55#define SWI25_IRQn Interrupt83_IRQn
56#define SWI26_IRQn Interrupt87_IRQn
57#define SWI27_IRQn Interrupt88_IRQn
58#define SWI28_IRQn Interrupt97_IRQn
59
60// CLK & RST REGION
61
62#define VSF_HW_CLKRST_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH) \
63 (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
64
65/*============================ MACROFIED FUNCTIONS ===========================*/
66
67#define vsf_hw_peripheral_rst_set vsf_hw_clkrst_region_set_bit
68#define vsf_hw_peripheral_rst_clear vsf_hw_clkrst_region_clear_bit
69#define vsf_hw_peripheral_rst_get vsf_hw_clkrst_region_get_bit
70
71#define vsf_hw_peripheral_enable vsf_hw_clkrst_region_set_bit
72#define vsf_hw_peripheral_disable vsf_hw_clkrst_region_clear_bit
73
74/*============================ TYPES =========================================*/
75
76typedef enum vsf_hw_peripheral_rst_t {
77#ifdef SOC_BF0_HCPU
78 // RCC.RSTR1
79 VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x00, 1, 1),
80 VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x00, 2, 1),
81 VSF_HW_RST_USART3 = VSF_HW_CLKRST_REGION(0x00, 3, 1),
82 VSF_HW_RST_USART4 = VSF_HW_CLKRST_REGION(0x00, 4, 1),
83 VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x00, 5, 1),
84 VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x00, 6, 1),
85 VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x00, 7, 1),
86 VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x00, 8, 1),
87 VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x00, 9, 1),
88 VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x00, 10, 1),
89 VSF_HW_RST_GPTIM1 = VSF_HW_CLKRST_REGION(0x00, 11, 1),
90 VSF_HW_RST_GPTIM2 = VSF_HW_CLKRST_REGION(0x00, 12, 1),
91 VSF_HW_RST_GPTIM3 = VSF_HW_CLKRST_REGION(0x00, 13, 1),
92 VSF_HW_RST_GPIO = VSF_HW_CLKRST_REGION(0x00, 14, 1),
93 VSF_HW_RST_DMAC1 = VSF_HW_CLKRST_REGION(0x00, 15, 1),
94 VSF_HW_RST_GPDAC1 = VSF_HW_CLKRST_REGION(0x00, 16, 1),
95 VSF_HW_RST_GPDAC2 = VSF_HW_CLKRST_REGION(0x00, 17, 1),
96 VSF_HW_RST_BTIM1 = VSF_HW_CLKRST_REGION(0x00, 18, 1),
97 VSF_HW_RST_BTIM2 = VSF_HW_CLKRST_REGION(0x00, 19, 1),
98 VSF_HW_RST_LPTIM = VSF_HW_CLKRST_REGION(0x00, 20, 1),
99 VSF_HW_RST_LPUART = VSF_HW_CLKRST_REGION(0x00, 21, 1),
100
101 // RCC.RSTR2
102 VSF_HW_RST_LCDC = VSF_HW_CLKRST_REGION(0x01, 0, 1),
103 VSF_HW_RST_PSRAMC = VSF_HW_CLKRST_REGION(0x01, 1, 1),
104 VSF_HW_RST_TRNG = VSF_HW_CLKRST_REGION(0x01, 2, 1),
105 VSF_HW_RST_AES = VSF_HW_CLKRST_REGION(0x01, 3, 1),
106 VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x01, 4, 1),
107 VSF_HW_RST_WDT1 = VSF_HW_CLKRST_REGION(0x01, 6, 1),
108 VSF_HW_RST_I2S = VSF_HW_CLKRST_REGION(0x01, 7, 1),
109 VSF_HW_RST_EPIC = VSF_HW_CLKRST_REGION(0x01, 8, 1),
110 VSF_HW_RST_KEYPAD = VSF_HW_CLKRST_REGION(0x01, 9, 1),
111 VSF_HW_RST_USBC = VSF_HW_CLKRST_REGION(0x01, 10, 1),
112 VSF_HW_RST_GPDAC = VSF_HW_CLKRST_REGION(0x01, 11, 1),
113 VSF_HW_RST_MAILBOX = VSF_HW_CLKRST_REGION(0x01, 12, 1),
114 VSF_HW_RST_SYSCFG = VSF_HW_CLKRST_REGION(0x01, 13, 1),
115 VSF_HW_RST_FLASHC = VSF_HW_CLKRST_REGION(0x01, 14, 1),
116 VSF_HW_RST_DMAC2 = VSF_HW_CLKRST_REGION(0x01, 15, 1),
117 VSF_HW_RST_ATIM1 = VSF_HW_CLKRST_REGION(0x01, 16, 1),
118 VSF_HW_RST_ATIM2 = VSF_HW_CLKRST_REGION(0x01, 17, 1),
119 VSF_HW_RST_BTIM3 = VSF_HW_CLKRST_REGION(0x01, 18, 1),
120 VSF_HW_RST_BTIM4 = VSF_HW_CLKRST_REGION(0x01, 19, 1),
121 VSF_HW_RST_GPTIM4 = VSF_HW_CLKRST_REGION(0x01, 20, 1),
122 VSF_HW_RST_GPTIM5 = VSF_HW_CLKRST_REGION(0x01, 21, 1),
123 VSF_HW_RST_EXTDMA = VSF_HW_CLKRST_REGION(0x01, 22, 1),
124 VSF_HW_RST_NNACC = VSF_HW_CLKRST_REGION(0x01, 28, 1),
125 VSF_HW_RST_GAU = VSF_HW_CLKRST_REGION(0x01, 29, 1),
126 VSF_HW_RST_WDT2 = VSF_HW_CLKRST_REGION(0x01, 30, 1),
127 VSF_HW_RST_ACPU = VSF_HW_CLKRST_REGION(0x01, 31, 1),
128#endif
129} vsf_hw_peripheral_rst_t;
130
131typedef enum vsf_hw_peripheral_en_t {
132#ifdef SOC_BF0_HCPU
133 // RCC.ENR1
134 VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x00, 1, 1),
135 VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x00, 2, 1),
136 VSF_HW_EN_USART3 = VSF_HW_CLKRST_REGION(0x00, 3, 1),
137 VSF_HW_EN_USART4 = VSF_HW_CLKRST_REGION(0x00, 4, 1),
138 VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x00, 5, 1),
139 VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x00, 6, 1),
140 VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x00, 7, 1),
141 VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x00, 8, 1),
142 VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x00, 9, 1),
143 VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x00, 10, 1),
144 VSF_HW_EN_GPTIM1 = VSF_HW_CLKRST_REGION(0x00, 11, 1),
145 VSF_HW_EN_GPTIM2 = VSF_HW_CLKRST_REGION(0x00, 12, 1),
146 VSF_HW_EN_GPTIM3 = VSF_HW_CLKRST_REGION(0x00, 13, 1),
147 VSF_HW_EN_GPIO = VSF_HW_CLKRST_REGION(0x00, 14, 1),
148 VSF_HW_EN_DMAC1 = VSF_HW_CLKRST_REGION(0x00, 15, 1),
149 VSF_HW_EN_GPDAC1 = VSF_HW_CLKRST_REGION(0x00, 16, 1),
150 VSF_HW_EN_GPDAC2 = VSF_HW_CLKRST_REGION(0x00, 17, 1),
151 VSF_HW_EN_BTIM1 = VSF_HW_CLKRST_REGION(0x00, 18, 1),
152 VSF_HW_EN_BTIM2 = VSF_HW_CLKRST_REGION(0x00, 19, 1),
153 VSF_HW_EN_LPTIM = VSF_HW_CLKRST_REGION(0x00, 20, 1),
154 VSF_HW_EN_LPUART = VSF_HW_CLKRST_REGION(0x00, 21, 1),
155
156 // RCC.ENR2
157 VSF_HW_EN_LCDC = VSF_HW_CLKRST_REGION(0x01, 0, 1),
158 VSF_HW_EN_PSRAMC = VSF_HW_CLKRST_REGION(0x01, 1, 1),
159 VSF_HW_EN_TRNG = VSF_HW_CLKRST_REGION(0x01, 2, 1),
160 VSF_HW_EN_AES = VSF_HW_CLKRST_REGION(0x01, 3, 1),
161 VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0x01, 4, 1),
162 VSF_HW_EN_WDT1 = VSF_HW_CLKRST_REGION(0x01, 6, 1),
163 VSF_HW_EN_I2S = VSF_HW_CLKRST_REGION(0x01, 7, 1),
164 VSF_HW_EN_EPIC = VSF_HW_CLKRST_REGION(0x01, 8, 1),
165 VSF_HW_EN_KEYPAD = VSF_HW_CLKRST_REGION(0x01, 9, 1),
166 VSF_HW_EN_USBC = VSF_HW_CLKRST_REGION(0x01, 10, 1),
167 VSF_HW_EN_GPDAC = VSF_HW_CLKRST_REGION(0x01, 11, 1),
168 VSF_HW_EN_MAILBOX = VSF_HW_CLKRST_REGION(0x01, 12, 1),
169 VSF_HW_EN_SYSCFG = VSF_HW_CLKRST_REGION(0x01, 13, 1),
170 VSF_HW_EN_FLASHC = VSF_HW_CLKRST_REGION(0x01, 14, 1),
171 VSF_HW_EN_DMAC2 = VSF_HW_CLKRST_REGION(0x01, 15, 1),
172 VSF_HW_EN_ATIM1 = VSF_HW_CLKRST_REGION(0x01, 16, 1),
173 VSF_HW_EN_ATIM2 = VSF_HW_CLKRST_REGION(0x01, 17, 1),
174 VSF_HW_EN_BTIM3 = VSF_HW_CLKRST_REGION(0x01, 18, 1),
175 VSF_HW_EN_BTIM4 = VSF_HW_CLKRST_REGION(0x01, 19, 1),
176 VSF_HW_EN_GPTIM4 = VSF_HW_CLKRST_REGION(0x01, 20, 1),
177 VSF_HW_EN_GPTIM5 = VSF_HW_CLKRST_REGION(0x01, 21, 1),
178 VSF_HW_EN_EXTDMA = VSF_HW_CLKRST_REGION(0x01, 22, 1),
179 VSF_HW_EN_NNACC = VSF_HW_CLKRST_REGION(0x01, 28, 1),
180 VSF_HW_EN_GAU = VSF_HW_CLKRST_REGION(0x01, 29, 1),
181 VSF_HW_EN_WDT2 = VSF_HW_CLKRST_REGION(0x01, 30, 1),
182 VSF_HW_EN_ACPU = VSF_HW_CLKRST_REGION(0x01, 31, 1),
183#endif
184} vsf_hw_peripheral_en_t;
185
186typedef struct vsf_hw_clk_t vsf_hw_clk_t;
187
188/*============================ GLOBAL VARIABLES ==============================*/
189/*============================ LOCAL VARIABLES ===============================*/
190/*============================ PROTOTYPES ====================================*/
191
192extern void vsf_hw_clkrst_region_set_bit(uint32_t region);
193extern void vsf_hw_clkrst_region_clear_bit(uint32_t region);
194extern uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region);
195
196#endif
197/* EOF */
vsf_hw_peripheral_rst_t
vsf_hw_peripheral_rst_t
Definition common.h:58
VSF_HW_RST_SPI2
@ VSF_HW_RST_SPI2
Definition common.h:117
VSF_HW_RST_USART2
@ VSF_HW_RST_USART2
Definition common.h:114
VSF_HW_RST_I2C2
@ VSF_HW_RST_I2C2
Definition common.h:109
VSF_HW_RST_SPI1
@ VSF_HW_RST_SPI1
Definition common.h:118
VSF_HW_RST_I2C1
@ VSF_HW_RST_I2C1
Definition common.h:110
VSF_HW_RST_TRNG
@ VSF_HW_RST_TRNG
Definition common.h:70
VSF_HW_RST_USART1
@ VSF_HW_RST_USART1
Definition common.h:115
VSF_HW_RST_CRC
@ VSF_HW_RST_CRC
Definition common.h:90
VSF_HW_RST_SYSCFG
@ VSF_HW_RST_SYSCFG
Definition common.h:169
VSF_HW_RST_I2C3
@ VSF_HW_RST_I2C3
Definition common.h:108
VSF_HW_RST_SPI3
@ VSF_HW_RST_SPI3
Definition common.h:150
VSF_HW_CLKRST_REGION
#define VSF_HW_CLKRST_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH)
Definition common.h:32
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:172
VSF_HW_EN_SPI2
@ VSF_HW_EN_SPI2
Definition common.h:243
VSF_HW_EN_SPI1
@ VSF_HW_EN_SPI1
Definition common.h:244
VSF_HW_EN_USART2
@ VSF_HW_EN_USART2
Definition common.h:240
VSF_HW_EN_I2C1
@ VSF_HW_EN_I2C1
Definition common.h:236
VSF_HW_EN_CRC
@ VSF_HW_EN_CRC
Definition common.h:215
VSF_HW_EN_SPI3
@ VSF_HW_EN_SPI3
Definition common.h:276
VSF_HW_EN_USART1
@ VSF_HW_EN_USART1
Definition common.h:241
VSF_HW_EN_I2C2
@ VSF_HW_EN_I2C2
Definition common.h:235
VSF_HW_EN_SYSCFG
@ VSF_HW_EN_SYSCFG
Definition common.h:295
VSF_HW_EN_I2C3
@ VSF_HW_EN_I2C3
Definition common.h:234
VSF_HW_EN_TRNG
@ VSF_HW_EN_TRNG
Definition common.h:193
VSF_HW_RST_USART3
@ VSF_HW_RST_USART3
Definition common.h:113
VSF_HW_EN_USART3
@ VSF_HW_EN_USART3
Definition common.h:229
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:63
vsf_hw_peripheral_rst_t
vsf_hw_peripheral_rst_t
Definition common.h:76
vsf_hw_clkrst_region_clear_bit
void vsf_hw_clkrst_region_clear_bit(uint32_t region)
Definition driver.c:518
vsf_hw_clkrst_region_set_bit
void vsf_hw_clkrst_region_set_bit(uint32_t region)
Definition driver.c:506
vsf_hw_clkrst_region_get_bit
uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region)
Definition driver.c:530
uint32_t
unsigned int uint32_t
Definition lvgl.h:43
uint_fast8_t
unsigned char uint_fast8_t
Definition stdint.h:23
vsf_hw_clk_t
Definition driver.c:80
vsf_arch.h
vsf_hal_cfg.h
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