VSF Documented
Data Structures | Macros | Typedefs | Enumerations | Variables
i2c.h File Reference
#include "hal/vsf_hal_cfg.h"
#include "../../__device.h"
#include "utilities/ooc_class.h"

Go to the source code of this file.

Data Structures

class  vsf_$
 
struct  vsf_i2c_status_t
 

Macros

#define __HAL_DRIVER_   ${SERIES/I2C_IP}_I2C_H__
 
#define VSF_   ${I2C_IP}_I2C_CFG_MULTI_CLASS VSF_I2C_CFG_MULTI_CLASS
 
#define VSF_I2C_CFG_REIMPLEMENT_TYPE_MODE   ENABLED
 
#define VSF_I2C_CFG_REIMPLEMENT_TYPE_CMD   ENABLED
 
#define VSF_I2C_CFG_REIMPLEMENT_TYPE_STATUS   ENABLED
 
#define VSF_I2C_CFG_REIMPLEMENT_TYPE_IRQ_MASK   ENABLED
 

Typedefs

typedef enum vsf_i2c_mode_t vsf_i2c_mode_t
 
typedef enum vsf_i2c_cmd_t vsf_i2c_cmd_t
 
typedef enum vsf_i2c_irq_mask_t vsf_i2c_irq_mask_t
 
typedef struct vsf_i2c_status_t vsf_i2c_status_t
 

Enumerations

enum  vsf_i2c_mode_t {
  VSF_I2C_MODE_MASTER = (0x1ul << 28) ,
  VSF_I2C_MODE_SLAVE = (0x0ul << 28) ,
  VSF_I2C_SPEED_STANDARD_MODE = (0x0ul << 29) ,
  VSF_I2C_SPEED_FAST_MODE = (0x1ul << 29) ,
  VSF_I2C_SPEED_FAST_MODE_PLUS = (0x2ul << 29) ,
  VSF_I2C_SPEED_HIGH_SPEED_MODE = (0x3ul << 29) ,
  VSF_I2C_ADDR_7_BITS = (0x0ul << 31) ,
  VSF_I2C_ADDR_10_BITS = (0x1ul << 31)
}
 
enum  vsf_i2c_cmd_t {
  VSF_I2C_CMD_WRITE = (0x00ul << 0) ,
  VSF_I2C_CMD_READ = (0x01ul << 0) ,
  VSF_I2C_CMD_START = (0x00ul << 28) ,
  VSF_I2C_CMD_NO_START = (0x01ul << 28) ,
  VSF_I2C_CMD_STOP = (0x00ul << 29) ,
  VSF_I2C_CMD_RESTART = (0x01ul << 30) ,
  VSF_I2C_CMD_NO_STOP_RESTART = (0x01ul << 30) ,
  VSF_I2C_CMD_7_BITS = (0x00ul << 31) ,
  VSF_I2C_CMD_10_BITS = (0x01ul << 31)
}
 
enum  vsf_i2c_irq_mask_t {
  VSF_I2C_IRQ_MASK_MASTER_STARTED = (0x1ul << 0) ,
  VSF_I2C_IRQ_MASK_MASTER_STOPPED = (0x1ul << 1) ,
  VSF_I2C_IRQ_MASK_MASTER_STOP_DETECT = (0x1ul << 2) ,
  VSF_I2C_IRQ_MASK_MASTER_NACK_DETECT = (0x1ul << 4) ,
  VSF_I2C_IRQ_MASK_MASTER_ARBITRATION_LOST = (0x1ul << 5) ,
  VSF_I2C_IRQ_MASK_MASTER_TX_EMPTY = (0x1ul << 6) ,
  VSF_I2C_IRQ_MASK_MASTER_ERROR = (0x1ul << 7) ,
  VSF_I2C_IRQ_MASK_MASTER_TRANSFER_COMPLETE = (0x1ul << 8) ,
  VSF_I2C_IRQ_MASK_MASTER_ADDRESS_NACK = (0x1ul << 9)
}
 

Variables

class vsf_$reg
 
vsf_i2c_isr_t isr
 

Macro Definition Documentation

◆ __HAL_DRIVER_

#define __HAL_DRIVER_   ${SERIES/I2C_IP}_I2C_H__

◆ VSF_

#define VSF_   ${I2C_IP}_I2C_CFG_MULTI_CLASS VSF_I2C_CFG_MULTI_CLASS

◆ VSF_I2C_CFG_REIMPLEMENT_TYPE_MODE

#define VSF_I2C_CFG_REIMPLEMENT_TYPE_MODE   ENABLED

◆ VSF_I2C_CFG_REIMPLEMENT_TYPE_CMD

#define VSF_I2C_CFG_REIMPLEMENT_TYPE_CMD   ENABLED

◆ VSF_I2C_CFG_REIMPLEMENT_TYPE_STATUS

#define VSF_I2C_CFG_REIMPLEMENT_TYPE_STATUS   ENABLED

◆ VSF_I2C_CFG_REIMPLEMENT_TYPE_IRQ_MASK

#define VSF_I2C_CFG_REIMPLEMENT_TYPE_IRQ_MASK   ENABLED

Typedef Documentation

◆ vsf_i2c_mode_t

◆ vsf_i2c_cmd_t

◆ vsf_i2c_irq_mask_t

◆ vsf_i2c_status_t

Enumeration Type Documentation

◆ vsf_i2c_mode_t

Enumerator
VSF_I2C_MODE_MASTER 
VSF_I2C_MODE_SLAVE 
VSF_I2C_SPEED_STANDARD_MODE 
VSF_I2C_SPEED_FAST_MODE 
VSF_I2C_SPEED_FAST_MODE_PLUS 
VSF_I2C_SPEED_HIGH_SPEED_MODE 
VSF_I2C_ADDR_7_BITS 
VSF_I2C_ADDR_10_BITS 

◆ vsf_i2c_cmd_t

Enumerator
VSF_I2C_CMD_WRITE 
VSF_I2C_CMD_READ 
VSF_I2C_CMD_START 
VSF_I2C_CMD_NO_START 
VSF_I2C_CMD_STOP 
VSF_I2C_CMD_RESTART 
VSF_I2C_CMD_NO_STOP_RESTART 
VSF_I2C_CMD_7_BITS 
VSF_I2C_CMD_10_BITS 

◆ vsf_i2c_irq_mask_t

Enumerator
VSF_I2C_IRQ_MASK_MASTER_STARTED 
VSF_I2C_IRQ_MASK_MASTER_STOPPED 
VSF_I2C_IRQ_MASK_MASTER_STOP_DETECT 
VSF_I2C_IRQ_MASK_MASTER_NACK_DETECT 
VSF_I2C_IRQ_MASK_MASTER_ARBITRATION_LOST 
VSF_I2C_IRQ_MASK_MASTER_TX_EMPTY 
VSF_I2C_IRQ_MASK_MASTER_ERROR 
VSF_I2C_IRQ_MASK_MASTER_TRANSFER_COMPLETE 
VSF_I2C_IRQ_MASK_MASTER_ADDRESS_NACK 

Variable Documentation

◆ reg

class vsf_$* reg

◆ isr