dwcotg_dev_global_regs_t Struct Reference

#include <dwcotg_regs.h>

Data Fields
volatile uint32_t	dcfg
volatile uint32_t	dctl
volatile uint32_t	dsts
uint32_t	unused
volatile uint32_t	diepmsk
volatile uint32_t	doepmsk
volatile uint32_t	daint
volatile uint32_t	daintmsk
volatile uint32_t	dtknqr1
volatile uint32_t	dtknqr2
volatile uint32_t	dvbusdis
volatile uint32_t	dvbuspulse
volatile uint32_t	dtknqr3_dthrctl
volatile uint32_t	dtknqr4_fifoemptymsk
volatile uint32_t	deachint
volatile uint32_t	deachintmsk
volatile uint32_t	diepeachintmsk [MAX_EPS_CHANNELS]
volatile uint32_t	doepeachintmsk [MAX_EPS_CHANNELS]

Detailed Description

Device Global Registers. Offsets 800h-BFFh

The following structures define the size and relative field offsets for the Device Mode Registers.

These registers are visible only in Device mode and must not be accessed in Host mode, as the results are unknown.

Field Documentation

dcfg

volatile uint32_t dwcotg_dev_global_regs_t::dcfg

Device Configuration Register. Offset 800h

dctl

volatile uint32_t dwcotg_dev_global_regs_t::dctl

Device Control Register. Offset: 804h

dsts

volatile uint32_t dwcotg_dev_global_regs_t::dsts

Device Status Register (Read Only). Offset: 808h

unused

uint32_t dwcotg_dev_global_regs_t::unused

Reserved. Offset: 80Ch

diepmsk

volatile uint32_t dwcotg_dev_global_regs_t::diepmsk

Device IN Endpoint Common Interrupt Mask Register. Offset: 810h

doepmsk

volatile uint32_t dwcotg_dev_global_regs_t::doepmsk

Device OUT Endpoint Common Interrupt Mask Register. Offset: 814h

daint

volatile uint32_t dwcotg_dev_global_regs_t::daint

Device All Endpoints Interrupt Register. Offset: 818h

daintmsk

volatile uint32_t dwcotg_dev_global_regs_t::daintmsk

Device All Endpoints Interrupt Mask Register. Offset: 81Ch

dtknqr1

volatile uint32_t dwcotg_dev_global_regs_t::dtknqr1

Device IN Token Queue Read Register-1 (Read Only). Offset: 820h

dtknqr2

volatile uint32_t dwcotg_dev_global_regs_t::dtknqr2

Device IN Token Queue Read Register-2 (Read Only). Offset: 824h

dvbusdis

volatile uint32_t dwcotg_dev_global_regs_t::dvbusdis

Device VBUS discharge Register. Offset: 828h

dvbuspulse

volatile uint32_t dwcotg_dev_global_regs_t::dvbuspulse

Device VBUS Pulse Register. Offset: 82Ch

dtknqr3_dthrctl

volatile uint32_t dwcotg_dev_global_regs_t::dtknqr3_dthrctl

Device IN Token Queue Read Register-3 (Read Only). / Device Thresholding control register (Read/Write) Offset: 830h

dtknqr4_fifoemptymsk

volatile uint32_t dwcotg_dev_global_regs_t::dtknqr4_fifoemptymsk

Device IN Token Queue Read Register-4 (Read Only). / Device IN EPs empty Inr. Mask Register (Read/Write) Offset: 834h

deachint

volatile uint32_t dwcotg_dev_global_regs_t::deachint

Device Each Endpoint Interrupt Register (Read Only). / Offset: 838h

deachintmsk

volatile uint32_t dwcotg_dev_global_regs_t::deachintmsk

Device Each Endpoint Interrupt mask Register (Read/Write). / Offset: 83Ch

diepeachintmsk

volatile uint32_t dwcotg_dev_global_regs_t::diepeachintmsk[MAX_EPS_CHANNELS]

Device Each In Endpoint Interrupt mask Register (Read/Write). / Offset: 840h

doepeachintmsk

volatile uint32_t dwcotg_dev_global_regs_t::doepeachintmsk[MAX_EPS_CHANNELS]

Device Each Out Endpoint Interrupt mask Register (Read/Write). / Offset: 880h