dwcotg_dev_in_ep_regs_t Struct Reference

#include <dwcotg_regs.h>

Data Fields
volatile uint32_t	diepctl
uint32_t	reserved04
volatile uint32_t	diepint
uint32_t	reserved0C
volatile uint32_t	dieptsiz
volatile uint32_t	diepdma
volatile uint32_t	dtxfsts
volatile uint32_t	diepdmab

Detailed Description

Device Logical IN Endpoint-Specific Registers. Offsets 900h-AFCh

There will be one set of endpoint registers per logical endpoint implemented.

These registers are visible only in Device mode and must not be accessed in Host mode, as the results are unknown.

Field Documentation

diepctl

volatile uint32_t dwcotg_dev_in_ep_regs_t::diepctl

Device IN Endpoint Control Register. Offset:900h + (ep_num * 20h) + 00h

reserved04

uint32_t dwcotg_dev_in_ep_regs_t::reserved04

Reserved. Offset:900h + (ep_num * 20h) + 04h

diepint

volatile uint32_t dwcotg_dev_in_ep_regs_t::diepint

Device IN Endpoint Interrupt Register. Offset:900h + (ep_num * 20h) + 08h

reserved0C

uint32_t dwcotg_dev_in_ep_regs_t::reserved0C

Reserved. Offset:900h + (ep_num * 20h) + 0Ch

dieptsiz

volatile uint32_t dwcotg_dev_in_ep_regs_t::dieptsiz

Device IN Endpoint Transfer Size Register. Offset:900h + (ep_num * 20h) + 10h

diepdma

volatile uint32_t dwcotg_dev_in_ep_regs_t::diepdma

Device IN Endpoint DMA Address Register. Offset:900h + (ep_num * 20h) + 14h

dtxfsts

volatile uint32_t dwcotg_dev_in_ep_regs_t::dtxfsts

Device IN Endpoint Transmit FIFO Status Register. Offset:900h + (ep_num * 20h) + 18h

diepdmab

volatile uint32_t dwcotg_dev_in_ep_regs_t::diepdmab

Device IN Endpoint DMA Buffer Register. Offset:900h + (ep_num * 20h) + 1Ch