dwcotg_hc_regs_t Struct Reference

#include <dwcotg_regs.h>

Data Fields
volatile uint32_t	hcchar
volatile uint32_t	hcsplt
volatile uint32_t	hcint
volatile uint32_t	hcintmsk
volatile uint32_t	hctsiz
volatile uint32_t	hcdma
volatile uint32_t	reserved
volatile uint32_t	hcdmab

Detailed Description

Host Channel Specific Registers. 500h-5FCh

Field Documentation

hcchar

volatile uint32_t dwcotg_hc_regs_t::hcchar

Host Channel 0 Characteristic Register. Offset: 500h + (chan_num * 20h) + 00h

hcsplt

volatile uint32_t dwcotg_hc_regs_t::hcsplt

Host Channel 0 Split Control Register. Offset: 500h + (chan_num * 20h) + 04h

hcint

volatile uint32_t dwcotg_hc_regs_t::hcint

Host Channel 0 Interrupt Register. Offset: 500h + (chan_num * 20h) + 08h

hcintmsk

volatile uint32_t dwcotg_hc_regs_t::hcintmsk

Host Channel 0 Interrupt Mask Register. Offset: 500h + (chan_num * 20h) + 0Ch

hctsiz

volatile uint32_t dwcotg_hc_regs_t::hctsiz

Host Channel 0 Transfer Size Register. Offset: 500h + (chan_num * 20h) + 10h

hcdma

volatile uint32_t dwcotg_hc_regs_t::hcdma

Host Channel 0 DMA Address Register. Offset: 500h + (chan_num * 20h) + 14h

reserved

volatile uint32_t dwcotg_hc_regs_t::reserved

hcdmab

volatile uint32_t dwcotg_hc_regs_t::hcdmab

Host Channel 0 DMA Buffer Address Register. Offset: 500h + (chan_num * 20h) + 1Ch