VSF Documented
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#include "component/usb/vsf_usb_cfg.h"
#include "kernel/vsf_kernel.h"
#include "component/usb/host/vsf_usbh.h"
#include "./vsf_ohci.h"
Data Structures | |
struct | ohci_hcca_t |
struct | ohci_regs_t |
struct | ohci_regs_t::ohci_roothub_regs |
struct | ohci_ed_t |
struct | ohci_td_t |
struct | vk_ohci_t |
struct | ohci_urb_t |
Macros | |
#define | __VSF_USBH_CLASS_IMPLEMENT_HCD__ |
#define | __VSF_EDA_CLASS_INHERIT__ |
#define | VSFHAL_HCD_ISO_EN VSF_USBH_CFG_ISO_EN |
#define | OHCI_ISO_DELAY 2 |
#define | OHCI_NUM_CHAINS 32 |
#define | OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ |
#define | OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ |
#define | OHCI_CTRL_IE (1 << 3) /* isochronous enable */ |
#define | OHCI_CTRL_CLE (1 << 4) /* control list enable */ |
#define | OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ |
#define | OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ |
#define | OHCI_CTRL_IR (1 << 8) /* interrupt routing */ |
#define | OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ |
#define | OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ |
#define | OHCI_CONTROL_INIT (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE | OHCI_CTRL_CLE |
#define | OHCI_USB_RESET (0 << 6) |
#define | OHCI_USB_RESUME (1 << 6) |
#define | OHCI_USB_OPER (2 << 6) |
#define | OHCI_USB_SUSPEND (3 << 6) |
#define | OHCI_HCR (1 << 0) /* host controller reset */ |
#define | OHCI_CLF (1 << 1) /* control list filled */ |
#define | OHCI_BLF (1 << 2) /* bulk list filled */ |
#define | OHCI_OCR (1 << 3) /* ownership change request */ |
#define | OHCI_SOC (3 << 16) /* scheduling overrun count */ |
#define | OHCI_INTR_SO (0x1ul << 0) /* scheduling overrun */ |
#define | OHCI_INTR_WDH (0x1ul << 1) /* writeback of done_head */ |
#define | OHCI_INTR_SF (0x1ul << 2) /* start frame */ |
#define | OHCI_INTR_RD (0x1ul << 3) /* resume detect */ |
#define | OHCI_INTR_UE (0x1ul << 4) /* unrecoverable error */ |
#define | OHCI_INTR_FNO (0x1ul << 5) /* frame number overflow */ |
#define | OHCI_INTR_RHSC (0x1ul << 6) /* root hub status change */ |
#define | OHCI_INTR_OC (0x1ul << 30) /* ownership change */ |
#define | OHCI_INTR_MIE (0x1ul << 31) /* master interrupt enable */ |
#define | ED_IDLE 0x00 |
#define | ED_UNLINK 0x01 |
#define | ED_OPER 0x02 |
#define | ED_DEL 0x04 |
#define | ED_URB_DEL 0x08 |
#define | TD_CC 0xf0000000 |
#define | TD_CC_GET(td_p) (((td_p) >> 28) & 0x0f) |
#define | TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) |
#define | TD_EC 0x0C000000 |
#define | TD_T 0x03000000 |
#define | TD_T_DATA0 0x02000000 |
#define | TD_T_DATA1 0x03000000 |
#define | TD_T_TOGGLE 0x00000000 |
#define | TD_R 0x00040000 |
#define | TD_DI 0x00E00000 |
#define | TD_DI_SET(X) (((X) & 0x07)<< 21) |
#define | TD_DP 0x00180000 |
#define | TD_DP_SETUP 0x00000000 |
#define | TD_DP_IN 0x00100000 |
#define | TD_DP_OUT 0x00080000 |
#define | TD_ISO 0x00010000 |
#define | TD_DEL 0x00020000 |
#define | TD_CC_NOERROR 0x00 |
#define | TD_CC_CRC 0x01 |
#define | TD_CC_BITSTUFFING 0x02 |
#define | TD_CC_DATATOGGLEM 0x03 |
#define | TD_CC_STALL 0x04 |
#define | TD_DEVNOTRESP 0x05 |
#define | TD_PIDCHECKFAIL 0x06 |
#define | TD_UNEXPECTEDPID 0x07 |
#define | TD_DATAOVERRUN 0x08 |
#define | TD_DATAUNDERRUN 0x09 |
#define | TD_BUFFEROVERRUN 0x0C |
#define | TD_BUFFERUNDERRUN 0x0D |
#define | TD_NOTACCESSED 0x0F |
#define | RH_PORT_CONNECTION 0x00 |
#define | RH_PORT_ENABLE 0x01 |
#define | RH_PORT_SUSPEND 0x02 |
#define | RH_PORT_OVER_CURRENT 0x03 |
#define | RH_PORT_RESET 0x04 |
#define | RH_PORT_POWER 0x08 |
#define | RH_PORT_LOW_SPEED 0x09 |
#define | RH_C_PORT_CONNECTION 0x10 |
#define | RH_C_PORT_ENABLE 0x11 |
#define | RH_C_PORT_SUSPEND 0x12 |
#define | RH_C_PORT_OVER_CURRENT 0x13 |
#define | RH_C_PORT_RESET 0x14 |
#define | RH_C_HUB_LOCAL_POWER 0x00 |
#define | RH_C_HUB_OVER_CURRENT 0x01 |
#define | RH_DEVICE_REMOTE_WAKEUP 0x00 |
#define | RH_ENDPOINT_STALL 0x01 |
#define | RH_PS_CCS 0x00000001 /* current connect status */ |
#define | RH_PS_PES 0x00000002 /* port enable status*/ |
#define | RH_PS_PSS 0x00000004 /* port suspend status */ |
#define | RH_PS_POCI 0x00000008 /* port over current indicator */ |
#define | RH_PS_PRS 0x00000010 /* port reset status */ |
#define | RH_PS_PPS 0x00000100 /* port power status */ |
#define | RH_PS_LSDA 0x00000200 /* low speed device attached */ |
#define | RH_PS_CSC 0x00010000 /* connect status change */ |
#define | RH_PS_PESC 0x00020000 /* port enable status change */ |
#define | RH_PS_PSSC 0x00040000 /* port suspend status change */ |
#define | RH_PS_OCIC 0x00080000 /* over current indicator change */ |
#define | RH_PS_PRSC 0x00100000 /* port reset status change */ |
#define | RH_HS_LPS 0x00000001 /* local power status */ |
#define | RH_HS_OCI 0x00000002 /* over current indicator */ |
#define | RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ |
#define | RH_HS_LPSC 0x00010000 /* local power status change */ |
#define | RH_HS_OCIC 0x00020000 /* over current indicator change */ |
#define | RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ |
#define | RH_B_DR 0x0000ffff /* device removable flags */ |
#define | RH_B_PPCM 0xffff0000 /* port power control mask */ |
#define | RH_A_NDP (0xfful << 0) /* number of downstream ports */ |
#define | RH_A_PSM (0x1ul << 8) /* power switching mode */ |
#define | RH_A_NPS (0x1ul << 9) /* no power switching */ |
#define | RH_A_DT (0x1ul << 10) /* device type (mbz) */ |
#define | RH_A_OCPM (0x1ul << 11) /* over current protection mode */ |
#define | RH_A_NOCP (0x1ul << 12) /* no over current protection */ |
#define | RH_A_POTPGT (0xfful << 24) /* power on to power good time */ |
#define | CC_TO_ERROR(cc) (cc == 0 ? VSF_ERR_NONE : -cc) |
#define | ED_DEQUEUE (0x1ul << 27) |
#define | ED_ISO (0x1ul << 15) |
#define | ED_SKIP (0x1ul << 14) |
#define | ED_LOWSPEED (0x1ul << 13) |
#define | ED_OUT (0x1ul << 11) |
#define | ED_IN (0x2ul << 11) |
#define | ED_C 0x02ul |
#define | ED_H 0x01ul |
#define | URB_PRIV_INIT 0 |
#define | URB_PRIV_EDLINK (0x1 << 1) |
#define | URB_PRIV_EDSKIP (0x1 << 2) |
#define | URB_PRIV_TDALLOC (0x1 << 3) |
#define | URB_PRIV_TDLINK (0x1 << 4) |
#define | URB_PRIV_WAIT_COMPLETE (0x1 << 5) |
#define | URB_PRIV_WAIT_DELETE (0x1 << 6) |
Typedefs | |
typedef struct ohci_hcca_t | ohci_hcca_t |
typedef struct ohci_regs_t | ohci_regs_t |
typedef struct ohci_td_t | ohci_td_t |
typedef struct ohci_ed_t | ohci_ed_t |
typedef struct ohci_urb_t | ohci_urb_t |
typedef struct vk_ohci_t | vk_ohci_t |
Functions | |
dcl_vsf_pool (def_vsf_pool(ohci_td_pool) | |
imp_vsf_pool (ohci_td_pool, ohci_td_t) | |
void | vk_ohci_init (void) |
Variables | |
ohci_hcd_state_t | |
const vk_usbh_hcd_drv_t | vk_ohci_drv |
#define __VSF_USBH_CLASS_IMPLEMENT_HCD__ |
#define __VSF_EDA_CLASS_INHERIT__ |
#define VSFHAL_HCD_ISO_EN VSF_USBH_CFG_ISO_EN |
#define OHCI_ISO_DELAY 2 |
#define OHCI_NUM_CHAINS 32 |
#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ |
#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ |
#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */ |
#define OHCI_CTRL_CLE (1 << 4) /* control list enable */ |
#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ |
#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ |
#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ |
#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ |
#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ |
#define OHCI_CONTROL_INIT (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE | OHCI_CTRL_CLE |
#define OHCI_USB_RESET (0 << 6) |
#define OHCI_USB_RESUME (1 << 6) |
#define OHCI_USB_OPER (2 << 6) |
#define OHCI_USB_SUSPEND (3 << 6) |
#define OHCI_HCR (1 << 0) /* host controller reset */ |
#define OHCI_CLF (1 << 1) /* control list filled */ |
#define OHCI_BLF (1 << 2) /* bulk list filled */ |
#define OHCI_OCR (1 << 3) /* ownership change request */ |
#define OHCI_SOC (3 << 16) /* scheduling overrun count */ |
#define OHCI_INTR_SO (0x1ul << 0) /* scheduling overrun */ |
#define OHCI_INTR_WDH (0x1ul << 1) /* writeback of done_head */ |
#define OHCI_INTR_SF (0x1ul << 2) /* start frame */ |
#define OHCI_INTR_RD (0x1ul << 3) /* resume detect */ |
#define OHCI_INTR_UE (0x1ul << 4) /* unrecoverable error */ |
#define OHCI_INTR_FNO (0x1ul << 5) /* frame number overflow */ |
#define OHCI_INTR_RHSC (0x1ul << 6) /* root hub status change */ |
#define OHCI_INTR_OC (0x1ul << 30) /* ownership change */ |
#define OHCI_INTR_MIE (0x1ul << 31) /* master interrupt enable */ |
#define ED_IDLE 0x00 |
#define ED_UNLINK 0x01 |
#define ED_OPER 0x02 |
#define ED_DEL 0x04 |
#define ED_URB_DEL 0x08 |
#define TD_CC 0xf0000000 |
#define TD_CC_GET | ( | td_p | ) | (((td_p) >> 28) & 0x0f) |
#define TD_CC_SET | ( | td_p, | |
cc | |||
) | (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) |
#define TD_EC 0x0C000000 |
#define TD_T 0x03000000 |
#define TD_T_DATA0 0x02000000 |
#define TD_T_DATA1 0x03000000 |
#define TD_T_TOGGLE 0x00000000 |
#define TD_R 0x00040000 |
#define TD_DI 0x00E00000 |
#define TD_DI_SET | ( | X | ) | (((X) & 0x07)<< 21) |
#define TD_DP 0x00180000 |
#define TD_DP_SETUP 0x00000000 |
#define TD_DP_IN 0x00100000 |
#define TD_DP_OUT 0x00080000 |
#define TD_ISO 0x00010000 |
#define TD_DEL 0x00020000 |
#define TD_CC_NOERROR 0x00 |
#define TD_CC_CRC 0x01 |
#define TD_CC_BITSTUFFING 0x02 |
#define TD_CC_DATATOGGLEM 0x03 |
#define TD_CC_STALL 0x04 |
#define TD_DEVNOTRESP 0x05 |
#define TD_PIDCHECKFAIL 0x06 |
#define TD_UNEXPECTEDPID 0x07 |
#define TD_DATAOVERRUN 0x08 |
#define TD_DATAUNDERRUN 0x09 |
#define TD_BUFFEROVERRUN 0x0C |
#define TD_BUFFERUNDERRUN 0x0D |
#define TD_NOTACCESSED 0x0F |
#define RH_PORT_CONNECTION 0x00 |
#define RH_PORT_ENABLE 0x01 |
#define RH_PORT_SUSPEND 0x02 |
#define RH_PORT_OVER_CURRENT 0x03 |
#define RH_PORT_RESET 0x04 |
#define RH_PORT_POWER 0x08 |
#define RH_PORT_LOW_SPEED 0x09 |
#define RH_C_PORT_CONNECTION 0x10 |
#define RH_C_PORT_ENABLE 0x11 |
#define RH_C_PORT_SUSPEND 0x12 |
#define RH_C_PORT_OVER_CURRENT 0x13 |
#define RH_C_PORT_RESET 0x14 |
#define RH_C_HUB_LOCAL_POWER 0x00 |
#define RH_C_HUB_OVER_CURRENT 0x01 |
#define RH_DEVICE_REMOTE_WAKEUP 0x00 |
#define RH_ENDPOINT_STALL 0x01 |
#define RH_PS_PES 0x00000002 /* port enable status*/ |
#define RH_PS_PSS 0x00000004 /* port suspend status */ |
#define RH_PS_POCI 0x00000008 /* port over current indicator */ |
#define RH_PS_PRS 0x00000010 /* port reset status */ |
#define RH_PS_PPS 0x00000100 /* port power status */ |
#define RH_PS_LSDA 0x00000200 /* low speed device attached */ |
#define RH_PS_PESC 0x00020000 /* port enable status change */ |
#define RH_PS_PSSC 0x00040000 /* port suspend status change */ |
#define RH_PS_OCIC 0x00080000 /* over current indicator change */ |
#define RH_PS_PRSC 0x00100000 /* port reset status change */ |
#define RH_HS_LPS 0x00000001 /* local power status */ |
#define RH_HS_OCI 0x00000002 /* over current indicator */ |
#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ |
#define RH_HS_LPSC 0x00010000 /* local power status change */ |
#define RH_HS_OCIC 0x00020000 /* over current indicator change */ |
#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ |
#define RH_B_DR 0x0000ffff /* device removable flags */ |
#define RH_B_PPCM 0xffff0000 /* port power control mask */ |
#define RH_A_NDP (0xfful << 0) /* number of downstream ports */ |
#define RH_A_PSM (0x1ul << 8) /* power switching mode */ |
#define RH_A_NPS (0x1ul << 9) /* no power switching */ |
#define RH_A_OCPM (0x1ul << 11) /* over current protection mode */ |
#define RH_A_NOCP (0x1ul << 12) /* no over current protection */ |
#define RH_A_POTPGT (0xfful << 24) /* power on to power good time */ |
#define CC_TO_ERROR | ( | cc | ) | (cc == 0 ? VSF_ERR_NONE : -cc) |
#define ED_DEQUEUE (0x1ul << 27) |
#define ED_ISO (0x1ul << 15) |
#define ED_SKIP (0x1ul << 14) |
#define ED_LOWSPEED (0x1ul << 13) |
#define ED_OUT (0x1ul << 11) |
#define ED_IN (0x2ul << 11) |
#define ED_C 0x02ul |
#define ED_H 0x01ul |
#define URB_PRIV_INIT 0 |
#define URB_PRIV_EDLINK (0x1 << 1) |
#define URB_PRIV_EDSKIP (0x1 << 2) |
#define URB_PRIV_TDALLOC (0x1 << 3) |
#define URB_PRIV_TDLINK (0x1 << 4) |
#define URB_PRIV_WAIT_COMPLETE (0x1 << 5) |
#define URB_PRIV_WAIT_DELETE (0x1 << 6) |
typedef struct ohci_hcca_t ohci_hcca_t |
typedef struct ohci_regs_t ohci_regs_t |
typedef struct ohci_urb_t ohci_urb_t |
dcl_vsf_pool | ( | def_vsf_pool( | ohci_td_pool | ) |
imp_vsf_pool | ( | ohci_td_pool | , |
ohci_td_t | |||
) |
void vk_ohci_init | ( | void | ) |
ohci_hcd_state_t |
const vk_usbh_hcd_drv_t vk_ohci_drv |