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| #define | VSF_PM_CFG_PREFIX vsf |
| | Application code can redefine this prefix to specify a different driver implementation.
|
| |
| #define | __PM_DIV_(_N, _D) VSF ## _D ## DIV_ ## _N = (_N), |
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_PLL ENABLED |
| | Enable PLL (Phase-Locked Loop) support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_LPOSC ENABLED |
| | Enable LPOSC (Low Power Oscillator) support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_CLK_OUT ENABLED |
| | Enable clock output support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_PCLK ENABLED |
| | Enable peripheral clock (PCLK) support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_SCLK ENABLED |
| | Enable system clock (SCLK) support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_PWR_CTRL ENABLED |
| | Enable power control support by default.
|
| |
| #define | VSF_HAL_DRV_PM_CFG_SUPPORT_SLEEP_CTRL ENABLED |
| | Enable sleep control support by default.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER DISABLED |
| | Enable to reimplement power number type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK DISABLED |
| | Enable to reimplement power number mask type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE DISABLED |
| | Enable to reimplement sleep mode type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER DISABLED |
| | Enable to reimplement peripheral clock number type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG DISABLED |
| | Enable to reimplement peripheral clock configuration type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER DISABLED |
| | Enable to reimplement system clock number type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK DISABLED |
| | Enable to reimplement system clock number mask type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL DISABLED |
| | Enable to reimplement system clock selection type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV DISABLED |
| | Enable to reimplement system clock division type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG DISABLED |
| | Enable to reimplement main clock configuration type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO DISABLED |
| | Enable to reimplement main clock number type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL DISABLED |
| | Enable to reimplement PLL selection type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG DISABLED |
| | Enable to reimplement PLL configuration type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV DISABLED |
| | Enable to reimplement post division type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL DISABLED |
| | Enable to reimplement low power oscillator selection type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG DISABLED |
| | Enable to reimplement clock output configuration type in specific hardware drivers.
|
| |
| #define | VSF_PM_CFG_INHERIT_HAL_CAPABILITY ENABLED |
| | Enable to inherit HAL capability in PM capability structure.
|
| |
| #define | VSF_PM_POWER_APIS(__prefix_name) |
| |
| #define | VSF_PM_SLEEP_APIS(__prefix_name) __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, sleep_enter, vsf_pm_sleep_cfg_t *cfg_ptr) |
| |
| #define | VSF_PM_PCLK_APIS(__prefix_name) |
| |
| #define | VSF_PM_SCLK_APIS(__prefix_name) |
| |
| #define | VSF_PM_MCLK_APIS(__prefix_name) |
| |
| #define | VSF_PM_PLL_APIS(__prefix_name) |
| |
| #define | VSF_PM_LPOSC_APIS(__prefix_name) |
| |
| #define | VSF_PM_MISC_APIS(__prefix_name) __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_capability_t, pm, capability, VSF_MCONNECT(__prefix_name, _pm_t) * pm_ptr) |
| |
| #define | VSF_PM_APIS(__prefix_name) |
| |
|
| enum | vsf_pm_power_cfg_no_t { VSF_POWER_IRC_IDX = 1
} |
| |
| enum | vsf_pm_power_cfg_msk_t { VSF_POWER_IRC_MSK = 1UL << 0
} |
| |
| enum | vsf_pm_sleep_mode_t {
VSF_PM_WAIT = 0
,
VSF_PM_SLEEP = 1
,
VSF_PM_DEEP_SLEEP = 2
,
VSF_PM_POWER_OFF = 3
} |
| |
| enum | vsf_pm_sclk_no_t {
VSF_SCLK_CORE_IDX = 0
,
VSF_SCLK_ROM0_IDX = 1
,
VSF_SCLK_PM0_IDX = 2
,
VSF_SCLK_SRAM0_IDX = 3
} |
| |
| enum | vsf_pm_sclk_msk_t {
VSF_SCLK_CORE_MSK = 0x1ul << VSF_SCLK_CORE_IDX
,
VSF_SCLK_ROM0_MSK = 0x1ul << VSF_SCLK_ROM0_IDX
,
VSF_SCLK_PM0_MSK = 0x1ul << VSF_SCLK_ROM0_IDX
,
VSF_SCLK_SRAM0_MSK = 0x1ul << VSF_SCLK_SRAM0_IDX
} |
| |
| enum | vsf_pm_clk_src_sel_t {
VSF_AUTO_CLKSRC_IRC = 0x0
,
VSF_AUTO_CLKSRC_SYSOSC0 = 0x1
,
VSF_AUTO_CLKSRC_SYSOSC1 = 0x2
,
VSF_AUTO_CLKSRC_EXTCLK0 = 0x3
,
VSF_AUTO_CLKSRC_EXTCLK1 = 0x4
,
VSF_PLL_CLKSRC_IRC = 0x0
,
VSF_PLL_CLKSRC_SYSOSC0 = 0x1
,
VSF_PLL_CLKSRC_SYSOSC1 = 0x2
,
VSF_PLL_CLKSRC_EXTCLK0 = 0x3
,
VSF_PLL_CLKSRC_EXTCLK1 = 0x4
,
VSF_MAIN_CLKSRC_IRC = 0x0
,
VSF_MAIN_CLKSRC_PLLIN = 0x1
,
VSF_MAIN_CLKSRC_LPOSC = 0x2
,
VSF_MAIN_CLKSRC_PLLOUT = 0x3
,
VSF_CLKOUT_CLKSRC_IRC = 0x0
,
VSF_CLKOUT_CLKSRC_SYSOSC0 = 0x1
,
VSF_CLKOUT_CLKSRC_LPOSC = 0x2
,
VSF_CLKOUT_CLKSRC_MCLK = 0x3
} |
| |
| enum | vsf_pm_divider_t |
| | main clock prescaler More...
|
| |
| enum | vsf_pm_pclk_no_t {
VSF_PCLK_PM0 = 8
,
VSF_PCLK_SPI0 = 9
,
VSF_PCLK_SPI1 = 10
,
VSF_PCLK_USART0 = 12
,
VSF_PCLK_USART1 = 13
} |
| |
| enum | vsf_pm_mclk_core_div_t |
| |
| enum | vsf_pm_mclk_axi_div_t |
| |
| enum | vsf_pm_mclk_ahb_div_t |
| |
| enum | vsf_pm_mclk_apb_div_t |
| |
| enum | vsf_pm_mclk_no_t {
VSF_MCLK_CORE_IDX = 0
,
VSF_MCLK_CORE0_IDX = 0
,
VSF_MCLK_AXI0_IDX
,
VSF_MCLK_AXI1_IDX
,
VSF_MCLK_AHB0_IDX
,
VSF_MCLK_AHB1_IDX
,
VSF_MCLK_APB0_IDX
,
VSF_MCLK_APB1_IDX
} |
| |
| enum | vsf_pm_pll_sel_t {
VSF_PLL0_IDX
,
VSF_PLL1_IDX
} |
| |
| enum | vsf_pm_pll_post_div_t {
VSF_PLL_POST_DIV_1 = 0x00
,
VSF_PLL_POST_DIV_2 = 0x01
,
VSF_PLL_POST_DIV_4 = 0x02
,
VSF_PLL_POST_DIV_8 = 0x03
} |
| |
| enum | vsf_pm_lposc_sel_t {
VSF_LPOSC_ALWAYS_ON
,
VSF_LPOSC_32K_OSC
} |
| |