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vsf_template_pm.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __VSF_TEMPLATE_PM_H__
19#define __VSF_TEMPLATE_PM_H__
20
21/*============================ INCLUDES ======================================*/
22
24#include "hal/arch/vsf_arch.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*============================ MACROS ========================================*/
31
32// application code can redefine it
33#ifndef VSF_PM_CFG_PREFIX
34# if defined(VSF_HW_PM_COUNT) && (VSF_HW_PM_COUNT != 0)
35# define VSF_PM_CFG_PREFIX vsf_hw
36# else
37# define VSF_PM_CFG_PREFIX vsf
38# endif
39#endif
40
41#define __PM_DIV_(_N, _D) VSF ## _D ## DIV_ ## _N = (_N),
42
43#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PLL
44# define VSF_HAL_DRV_PM_CFG_SUPPORT_PLL ENABLED
45#endif
46
47#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_LPOSC
48# define VSF_HAL_DRV_PM_CFG_SUPPORT_LPOSC ENABLED
49#endif
50
51#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_CLK_OUT
52# define VSF_HAL_DRV_PM_CFG_SUPPORT_CLK_OUT ENABLED
53#endif
54
55#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PCLK
56# define VSF_HAL_DRV_PM_CFG_SUPPORT_PCLK ENABLED
57#endif
58
59#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_SCLK
60# define VSF_HAL_DRV_PM_CFG_SUPPORT_SCLK ENABLED
61#endif
62
63#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PWR_CTRL
64# define VSF_HAL_DRV_PM_CFG_SUPPORT_PWR_CTRL ENABLED
65#endif
66
67#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_SLEEP_CTRL
68# define VSF_HAL_DRV_PM_CFG_SUPPORT_SLEEP_CTRL ENABLED
69#endif
70
71/********************* REIMPLEMENT ***************************/
72
73#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER
74# define VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER DISABLED
75#endif
76
77#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK
78# define VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK DISABLED
79#endif
80
81#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE
82# define VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE DISABLED
83#endif
84
85#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER
86# define VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER DISABLED
87#endif
88
89#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG
90# define VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG DISABLED
91#endif
92
93#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER
94# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER DISABLED
95#endif
96
97#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK
98# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK DISABLED
99#endif
100
101#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL
102# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL DISABLED
103#endif
104
105#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV
106# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV DISABLED
107#endif
108
109#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG
110# define VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG DISABLED
111#endif
112
113#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO
114# define VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO DISABLED
115#endif
116
117#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL
118# define VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL DISABLED
119#endif
120
121#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG
122# define VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG DISABLED
123#endif
124
125#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV
126# define VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV DISABLED
127#endif
128
129#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL
130# define VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL DISABLED
131#endif
132
133#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG
134# define VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG DISABLED
135#endif
136
137#ifndef VSF_PM_CFG_INHERT_HAL_CAPABILITY
138# define VSF_PM_CFG_INHERT_HAL_CAPABILITY ENABLED
139#endif
140
141/*============================ MACROFIED FUNCTIONS ===========================*/
142
143#define VSF_PM_POWER_APIS(__prefix_name) \
144 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_enable, vsf_pm_power_cfg_no_t index) \
145 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_disable, vsf_pm_power_cfg_no_t index) \
146 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_get_status, vsf_pm_power_cfg_no_t index) \
147 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, power_resume, vsf_pm_power_cfg_no_t index, vsf_pm_power_status_t status)
148
149#define VSF_PM_SLEEP_APIS(__prefix_name) \
150 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, sleep_enter, vsf_pm_sleep_cfg_t *cfg_ptr)
151
152#define VSF_PM_PCLK_APIS(__prefix_name) \
153 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_config, vsf_pm_pclk_no_t index, vsf_pm_pclk_cfg_t *cfg_ptr) \
154 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pclk_get_clock, vsf_pm_pclk_no_t index) \
155 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_enable, vsf_pm_pclk_no_t index) \
156 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_disable, vsf_pm_pclk_no_t index) \
157 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_get_status, vsf_pm_pclk_no_t index) \
158 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, pclk_resume, vsf_pm_pclk_no_t index, vsf_pm_pclk_status_t status)
159
160#define VSF_PM_SCLK_APIS(__prefix_name) \
161 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_enable, vsf_pm_sclk_no_t index) \
162 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_disable, vsf_pm_sclk_no_t index) \
163 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_get_status, vsf_pm_sclk_no_t index) \
164 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, sclk_resume, vsf_pm_sclk_no_t index, vsf_pm_sclk_status_t status)
165
166#define VSF_PM_MCLK_APIS(__prefix_name) \
167 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, pm, mclk_init, vsf_pm_mclk_cfg_t *cfg_ptr) \
168 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, mclk_get_clock, vsf_pm_mclk_no_t sel)
169
170#define VSF_PM_PLL_APIS(__prefix_name) \
171 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, pm, pll_init, vsf_pm_pll_sel_t pll, vsf_pm_pll_cfg_t *cfg_ptr) \
172 __VSF_HAL_TEMPLATE_API(__prefix_name, bool, pm, pll_is_locked, vsf_pm_pll_sel_t pll) \
173 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pll_get_clock_out, vsf_pm_pll_sel_t pll) \
174 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pll_get_clock_in, vsf_pm_pll_sel_t pll)
175
176#define VSF_PM_LPOSC_APIS(__prefix_name) \
177 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, lposc_init, vsf_pm_lposc_sel_t lposc, vsf_pm_lposc_cfg_t *cfg_ptr) \
178 __VSF_HAL_TEMPLATE_API(__prefix_name, void, pm, lposc_enable, vsf_pm_lposc_sel_t lposc) \
179 __VSF_HAL_TEMPLATE_API(__prefix_name, void, pm, lposc_disable, vsf_pm_lposc_sel_t lposc) \
180 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, lposc_get_clock, vsf_pm_lposc_sel_t lposc)
181
182#define VSF_PM_MISC_APIS(__prefix_name) \
183 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_capability_t, pm, capability, VSF_MCONNECT(__prefix_name, _pm_t) * pm_ptr)
184
185
186#define VSF_PM_APIS(__prefix_name) \
187 VSF_PM_POWER_APIS(__prefix_name) \
188 VSF_PM_SLEEP_APIS(__prefix_name) \
189 VSF_PM_PCLK_APIS(__prefix_name) \
190 VSF_PM_SCLK_APIS(__prefix_name) \
191 VSF_PM_MCLK_APIS(__prefix_name) \
192 VSF_PM_PLL_APIS(__prefix_name) \
193 VSF_PM_LPOSC_APIS(__prefix_name) \
194 VSF_PM_MISC_APIS(__prefix_name)
195
196/*============================ TYPES =========================================*/
197
198
199/*----------------------------------------------------------------------------*
200 * Power Domain Management *
201 *----------------------------------------------------------------------------*/
202
203#if VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER == DISABLED
207#endif
208
209#if VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK == DISABLED
213#endif
214
216
217/*----------------------------------------------------------------------------*
218 * Sleep Management *
219 *----------------------------------------------------------------------------*/
220
221#if VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE == DISABLED
228#endif
229
230typedef struct vsf_pm_sleep_cfg_t {
236
237/*----------------------------------------------------------------------------*
238 * AHB Clock Management *
239 *----------------------------------------------------------------------------*/
240
241#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER == DISABLED
242typedef enum vsf_pm_sclk_no_t {
248#endif
249
250#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK == DISABLED
251typedef enum vsf_pm_sclk_msk_t {
257#endif
258
260
261/*----------------------------------------------------------------------------*
262 * Main Clock Management *
263 *----------------------------------------------------------------------------*/
264
265#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL == DISABLED
272
273
279
284
290#endif
291
293#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV == DISABLED
294typedef enum vsf_pm_divider_t {
295 VSF_MREPEAT(255, __PM_DIV_, MAIN)
297#endif
298
299/*----------------------------------------------------------------------------*
300 * Peripheral Clock Management *
301 *----------------------------------------------------------------------------*/
302
303#if VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER == DISABLED
304typedef enum vsf_pm_pclk_no_t {
311#endif
312
313#if VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG == DISABLED
314typedef struct vsf_pm_pclk_cfg_t {
318#endif
319
321
322#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CORE_DIV == DISABLED
324 VSF_MREPEAT(255, __PM_DIV_, MCLK_CORE)
326#endif
327
328#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_AXI_DIV == DISABLED
330 VSF_MREPEAT(255, __PM_DIV_, MCLK_AXI)
332#endif
333
334#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_AHB_DIV == DISABLED
336 VSF_MREPEAT(255, __PM_DIV_, MCLK_AHB)
338#endif
339
340#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_APB_DIV == DISABLED
342 VSF_MREPEAT(255, __PM_DIV_, MCLK_APB)
344#endif
345
346#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG == DISABLED
347typedef struct vsf_pm_mclk_cfg_t {
351#endif
352
353#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO == DISABLED
354typedef enum vsf_pm_mclk_no_t {
357
360
363
367#endif
368
369/*----------------------------------------------------------------------------*
370 * PLL Control *
371 *----------------------------------------------------------------------------*/
372
373#if VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL == DISABLED
374typedef enum vsf_pm_pll_sel_t {
378#endif
379
380#if VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG == DISABLED
381typedef struct vsf_pm_pll_cfg_t {
387#endif
388
389#if VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV == DISABLED
396#endif
397
398/*----------------------------------------------------------------------------*
399 * Low Power Oscillator Management *
400 *----------------------------------------------------------------------------*/
401
403
404#if VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL == DISABLED
405typedef enum vsf_pm_lposc_sel_t {
409#endif
410
412
413/*----------------------------------------------------------------------------*
414 * Clock Management *
415 *----------------------------------------------------------------------------*/
416
417#if VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG == DISABLED
424#endif
425
426typedef struct vsf_pm_capability_t {
427#if VSF_PM_CFG_INHERT_HAL_CAPABILITY == ENABLED
429#endif
431
432/*============================ GLOBAL VARIABLES ==============================*/
433/*============================ PROTOTYPES ====================================*/
434/*============================ MACROFIED FUNCTIONS ===========================*/
435
436#ifdef __cplusplus
437}
438#endif
439
440#endif /* __VSF_TEMPLATE_PM_H__ */
441/* EOF */
vsf_pm_clk_src_sel_t
Definition pm.h:387
vsf_pm_clk_src_sel_t
Definition device.h:200
unsigned short uint16_t
Definition stdint.h:7
unsigned char uint_fast8_t
Definition stdint.h:23
unsigned uint32_t
Definition stdint.h:9
unsigned int uint_fast32_t
Definition stdint.h:27
unsigned char uint8_t
Definition stdint.h:5
short int_fast16_t
Definition stdint.h:24
Definition vsf_template_hal_driver.h:203
Definition vsf_template_pm.h:426
Definition vsf_template_pm.h:418
uint_fast8_t div
clk divider
Definition vsf_template_pm.h:422
vsf_pm_clk_src_sel_t clk_src
clk out source select
Definition vsf_template_pm.h:420
main clock config struct
Definition vsf_template_pm.h:347
uint32_t freq
system oscillator frequency
Definition vsf_template_pm.h:349
vsf_pm_clk_src_sel_t clk_src
main clock source
Definition vsf_template_pm.h:348
Definition vsf_template_pm.h:314
uint16_t div
Definition vsf_template_pm.h:316
vsf_pm_clk_src_sel_t clk_src
Definition vsf_template_pm.h:315
pll config struct
Definition vsf_template_pm.h:381
uint8_t ssel
pll Feedback divider value
Definition vsf_template_pm.h:385
vsf_pm_clk_src_sel_t pll_clk_src
pll clock source
Definition vsf_template_pm.h:382
uint8_t msel
PLL Feedback divider value.
Definition vsf_template_pm.h:384
uint32_t freq
system oscillator frequency
Definition vsf_template_pm.h:383
Definition vsf_template_pm.h:230
uint32_t sleep_cfg
Sleep mode cfg.
Definition vsf_template_pm.h:232
vsf_pm_sleep_mode_t sleep_mode
sleep mode
Definition vsf_template_pm.h:231
uint32_t wake_cfg
Awake mode cfg.
Definition vsf_template_pm.h:233
uint32_t sleep_walking_cfg
Sleep Walking mode cfg.
Definition vsf_template_pm.h:234
#define VSF_MREPEAT(__COUNT, __MACRO, __PARAM)
Definition vsf_repeat_macro.h:51
vsf_pm_mclk_no_t
Definition vsf_template_pm.h:354
@ VSF_MCLK_APB0_IDX
Definition vsf_template_pm.h:364
@ VSF_MCLK_AHB1_IDX
Definition vsf_template_pm.h:362
@ VSF_MCLK_CORE0_IDX
Definition vsf_template_pm.h:356
@ VSF_MCLK_CORE_IDX
Definition vsf_template_pm.h:355
@ VSF_MCLK_AXI1_IDX
Definition vsf_template_pm.h:359
@ VSF_MCLK_APB1_IDX
Definition vsf_template_pm.h:365
@ VSF_MCLK_AHB0_IDX
Definition vsf_template_pm.h:361
@ VSF_MCLK_AXI0_IDX
Definition vsf_template_pm.h:358
vsf_pm_sclk_msk_t
Definition vsf_template_pm.h:251
@ VSF_SCLK_SRAM0_MSK
Definition vsf_template_pm.h:255
@ VSF_SCLK_ROM0_MSK
Definition vsf_template_pm.h:253
@ VSF_SCLK_CORE_MSK
Definition vsf_template_pm.h:252
@ VSF_SCLK_PM0_MSK
Definition vsf_template_pm.h:254
uint_fast32_t vsf_pm_power_status_t
Definition vsf_template_pm.h:215
struct vsf_pm_pclk_cfg_t vsf_pm_pclk_cfg_t
vsf_pm_pll_sel_t
Definition vsf_template_pm.h:374
@ VSF_PLL1_IDX
Definition vsf_template_pm.h:376
@ VSF_PLL0_IDX
Definition vsf_template_pm.h:375
vsf_pm_power_cfg_msk_t
Definition vsf_template_pm.h:210
@ VSF_POWER_IRC_MSK
Definition vsf_template_pm.h:211
vsf_pm_power_cfg_no_t
Definition vsf_template_pm.h:204
@ VSF_POWER_IRC_IDX
Definition vsf_template_pm.h:205
vsf_pm_mclk_axi_div_t
Definition vsf_template_pm.h:329
struct vsf_pm_mclk_cfg_t vsf_pm_mclk_cfg_t
vsf_pm_pll_post_div_t
Definition vsf_template_pm.h:390
@ VSF_PLL_POST_DIV_2
pll post divider rate is 2
Definition vsf_template_pm.h:392
@ VSF_PLL_POST_DIV_1
pll post divider rate is 1
Definition vsf_template_pm.h:391
@ VSF_PLL_POST_DIV_8
pll post divider rate is 8
Definition vsf_template_pm.h:394
@ VSF_PLL_POST_DIV_4
pll post divider rate is 4
Definition vsf_template_pm.h:393
vsf_pm_mclk_apb_div_t
Definition vsf_template_pm.h:341
vsf_pm_divider_t
main clock prescaler
Definition vsf_template_pm.h:294
struct vsf_pm_lposc_cfg_t vsf_pm_lposc_cfg_t
Definition vsf_template_pm.h:411
vsf_pm_mclk_ahb_div_t
Definition vsf_template_pm.h:335
vsf_pm_pclk_no_t
Definition vsf_template_pm.h:304
@ VSF_PCLK_PM0
PM 0.
Definition vsf_template_pm.h:305
@ VSF_PCLK_SPI0
SPI 0.
Definition vsf_template_pm.h:306
@ VSF_PCLK_SPI1
SPI 1.
Definition vsf_template_pm.h:307
@ VSF_PCLK_USART1
USART1.
Definition vsf_template_pm.h:309
@ VSF_PCLK_USART0
USART0.
Definition vsf_template_pm.h:308
struct vsf_pm_pll_cfg_t vsf_pm_pll_cfg_t
uint_fast32_t vsf_pm_sclk_status_t
Definition vsf_template_pm.h:259
vsf_pm_mclk_core_div_t
Definition vsf_template_pm.h:323
vsf_pm_sclk_no_t
Definition vsf_template_pm.h:242
@ VSF_SCLK_CORE_IDX
Definition vsf_template_pm.h:243
@ VSF_SCLK_PM0_IDX
Definition vsf_template_pm.h:245
@ VSF_SCLK_ROM0_IDX
Definition vsf_template_pm.h:244
@ VSF_SCLK_SRAM0_IDX
Definition vsf_template_pm.h:246
vsf_pm_sleep_mode_t
Definition vsf_template_pm.h:222
@ VSF_PM_POWER_OFF
Definition vsf_template_pm.h:226
@ VSF_PM_DEEP_SLEEP
Definition vsf_template_pm.h:225
@ VSF_PM_WAIT
Definition vsf_template_pm.h:223
@ VSF_PM_SLEEP
Definition vsf_template_pm.h:224
struct vsf_lposc_cfg_t vsf_lposc_cfg_t
Definition vsf_template_pm.h:402
int_fast16_t vsf_pm_pclk_status_t
Definition vsf_template_pm.h:320
vsf_pm_clk_src_sel_t
Definition vsf_template_pm.h:266
@ VSF_MAIN_CLKSRC_PLLOUT
Maniclk source is PLLOUT.
Definition vsf_template_pm.h:283
@ VSF_PLL_CLKSRC_IRC
pll source clk is IRC
Definition vsf_template_pm.h:274
@ VSF_AUTO_CLKSRC_EXTCLK1
source clk is extern clock1
Definition vsf_template_pm.h:271
@ VSF_MAIN_CLKSRC_LPOSC
Maniclk source is LPOSC.
Definition vsf_template_pm.h:282
@ VSF_AUTO_CLKSRC_IRC
source clk is IRC
Definition vsf_template_pm.h:267
@ VSF_AUTO_CLKSRC_SYSOSC0
source clk is System oscillator
Definition vsf_template_pm.h:268
@ VSF_AUTO_CLKSRC_EXTCLK0
Source clk is extern clock0.
Definition vsf_template_pm.h:270
@ VSF_MAIN_CLKSRC_IRC
Maniclk source is IRC.
Definition vsf_template_pm.h:280
@ VSF_PLL_CLKSRC_SYSOSC1
pll source clk is CLKIN
Definition vsf_template_pm.h:276
@ VSF_AUTO_CLKSRC_SYSOSC1
source clock is WDTOSC
Definition vsf_template_pm.h:269
@ VSF_CLKOUT_CLKSRC_LPOSC
Clockout source is LPOSC.
Definition vsf_template_pm.h:287
@ VSF_CLKOUT_CLKSRC_SYSOSC0
Clockout source is System Oscillator 0.
Definition vsf_template_pm.h:286
@ VSF_PLL_CLKSRC_SYSOSC0
pll source clk is System oscillator
Definition vsf_template_pm.h:275
@ VSF_CLKOUT_CLKSRC_MCLK
Clockout source is PLLOUT.
Definition vsf_template_pm.h:288
@ VSF_PLL_CLKSRC_EXTCLK1
pll source clk is extern clock1
Definition vsf_template_pm.h:278
@ VSF_PLL_CLKSRC_EXTCLK0
pll source clk is extern clock0
Definition vsf_template_pm.h:277
@ VSF_MAIN_CLKSRC_PLLIN
Maniclk source is System OSC0.
Definition vsf_template_pm.h:281
@ VSF_CLKOUT_CLKSRC_IRC
Clockout source is IRC.
Definition vsf_template_pm.h:285
vsf_pm_lposc_sel_t
Definition vsf_template_pm.h:405
@ VSF_LPOSC_ALWAYS_ON
Definition vsf_template_pm.h:406
@ VSF_LPOSC_32K_OSC
Definition vsf_template_pm.h:407
#define __PM_DIV_(_N, _D)
Definition vsf_template_pm.h:41