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vsf_template_pm.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __VSF_TEMPLATE_PM_H__
19#define __VSF_TEMPLATE_PM_H__
20
21/*============================ INCLUDES ======================================*/
22
24#include "hal/arch/vsf_arch.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*============================ MACROS ========================================*/
31
40#ifndef VSF_PM_CFG_PREFIX
41# if defined(VSF_HW_PM_COUNT) && (VSF_HW_PM_COUNT != 0)
42# define VSF_PM_CFG_PREFIX vsf_hw
43# else
44# define VSF_PM_CFG_PREFIX vsf
45# endif
46#endif
47
48#define __PM_DIV_(_N, _D) VSF ## _D ## DIV_ ## _N = (_N),
49
57#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PLL
58# define VSF_HAL_DRV_PM_CFG_SUPPORT_PLL ENABLED
59#endif
60
68#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_LPOSC
69# define VSF_HAL_DRV_PM_CFG_SUPPORT_LPOSC ENABLED
70#endif
71
79#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_CLK_OUT
80# define VSF_HAL_DRV_PM_CFG_SUPPORT_CLK_OUT ENABLED
81#endif
82
90#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PCLK
91# define VSF_HAL_DRV_PM_CFG_SUPPORT_PCLK ENABLED
92#endif
93
101#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_SCLK
102# define VSF_HAL_DRV_PM_CFG_SUPPORT_SCLK ENABLED
103#endif
104
112#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_PWR_CTRL
113# define VSF_HAL_DRV_PM_CFG_SUPPORT_PWR_CTRL ENABLED
114#endif
115
123#ifndef VSF_HAL_DRV_PM_CFG_SUPPORT_SLEEP_CTRL
124# define VSF_HAL_DRV_PM_CFG_SUPPORT_SLEEP_CTRL ENABLED
125#endif
126
127/********************* REIMPLEMENT ***************************/
128
136#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER
137# define VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER DISABLED
138#endif
139
147#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK
148# define VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK DISABLED
149#endif
150
158#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE
159# define VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE DISABLED
160#endif
161
169#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER
170# define VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER DISABLED
171#endif
172
180#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG
181# define VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG DISABLED
182#endif
183
191#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER
192# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER DISABLED
193#endif
194
202#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK
203# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK DISABLED
204#endif
205
213#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL
214# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL DISABLED
215#endif
216
224#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV
225# define VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV DISABLED
226#endif
227
235#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG
236# define VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG DISABLED
237#endif
238
246#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO
247# define VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO DISABLED
248#endif
249
257#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL
258# define VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL DISABLED
259#endif
260
268#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG
269# define VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG DISABLED
270#endif
271
279#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV
280# define VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV DISABLED
281#endif
282
290#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL
291# define VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL DISABLED
292#endif
293
301#ifndef VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG
302# define VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG DISABLED
303#endif
304
312#ifndef VSF_PM_CFG_INHERIT_HAL_CAPABILITY
313# define VSF_PM_CFG_INHERIT_HAL_CAPABILITY ENABLED
314#endif
315
316/*============================ MACROFIED FUNCTIONS ===========================*/
317
318#define VSF_PM_POWER_APIS(__prefix_name) \
319 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_enable, vsf_pm_power_cfg_no_t index) \
320 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_disable, vsf_pm_power_cfg_no_t index) \
321 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_power_status_t, pm, power_get_status, vsf_pm_power_cfg_no_t index) \
322 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, power_resume, vsf_pm_power_cfg_no_t index, vsf_pm_power_status_t status)
323
324#define VSF_PM_SLEEP_APIS(__prefix_name) \
325 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, sleep_enter, vsf_pm_sleep_cfg_t *cfg_ptr)
326
327#define VSF_PM_PCLK_APIS(__prefix_name) \
328 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_config, vsf_pm_pclk_no_t index, vsf_pm_pclk_cfg_t *cfg_ptr) \
329 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pclk_get_clock, vsf_pm_pclk_no_t index) \
330 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_enable, vsf_pm_pclk_no_t index) \
331 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_disable, vsf_pm_pclk_no_t index) \
332 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_pclk_status_t, pm, pclk_get_status, vsf_pm_pclk_no_t index) \
333 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, pclk_resume, vsf_pm_pclk_no_t index, vsf_pm_pclk_status_t status)
334
335#define VSF_PM_SCLK_APIS(__prefix_name) \
336 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_enable, vsf_pm_sclk_no_t index) \
337 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_disable, vsf_pm_sclk_no_t index) \
338 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_sclk_status_t, pm, sclk_get_status, vsf_pm_sclk_no_t index) \
339 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, sclk_resume, vsf_pm_sclk_no_t index, vsf_pm_sclk_status_t status)
340
341#define VSF_PM_MCLK_APIS(__prefix_name) \
342 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, pm, mclk_init, vsf_pm_mclk_cfg_t *cfg_ptr) \
343 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, mclk_get_clock, vsf_pm_mclk_no_t sel)
344
345#define VSF_PM_PLL_APIS(__prefix_name) \
346 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, pm, pll_init, vsf_pm_pll_sel_t pll, vsf_pm_pll_cfg_t *cfg_ptr) \
347 __VSF_HAL_TEMPLATE_API(__prefix_name, bool, pm, pll_is_locked, vsf_pm_pll_sel_t pll) \
348 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pll_get_clock_out, vsf_pm_pll_sel_t pll) \
349 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, pll_get_clock_in, vsf_pm_pll_sel_t pll)
350
351#define VSF_PM_LPOSC_APIS(__prefix_name) \
352 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, pm, lposc_init, vsf_pm_lposc_sel_t lposc, vsf_pm_lposc_cfg_t *cfg_ptr) \
353 __VSF_HAL_TEMPLATE_API(__prefix_name, void, pm, lposc_enable, vsf_pm_lposc_sel_t lposc) \
354 __VSF_HAL_TEMPLATE_API(__prefix_name, void, pm, lposc_disable, vsf_pm_lposc_sel_t lposc) \
355 __VSF_HAL_TEMPLATE_API(__prefix_name, uint_fast32_t, pm, lposc_get_clock, vsf_pm_lposc_sel_t lposc)
356
357#define VSF_PM_MISC_APIS(__prefix_name) \
358 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_pm_capability_t, pm, capability, VSF_MCONNECT(__prefix_name, _pm_t) * pm_ptr)
359
360
361#define VSF_PM_APIS(__prefix_name) \
362 VSF_PM_POWER_APIS(__prefix_name) \
363 VSF_PM_SLEEP_APIS(__prefix_name) \
364 VSF_PM_PCLK_APIS(__prefix_name) \
365 VSF_PM_SCLK_APIS(__prefix_name) \
366 VSF_PM_MCLK_APIS(__prefix_name) \
367 VSF_PM_PLL_APIS(__prefix_name) \
368 VSF_PM_LPOSC_APIS(__prefix_name) \
369 VSF_PM_MISC_APIS(__prefix_name)
370
371/*============================ TYPES =========================================*/
372
373
374/*----------------------------------------------------------------------------*
375 * Power Domain Management *
376 *----------------------------------------------------------------------------*/
377
378#if VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER == DISABLED
382#endif
383
384#if VSF_PM_CFG_REIMPLEMENT_TYPE_POWER_NUMBER_MASK == DISABLED
388#endif
389
391
392/*----------------------------------------------------------------------------*
393 * Sleep Management *
394 *----------------------------------------------------------------------------*/
395
396#if VSF_PM_CFG_REIMPLEMENT_TYPE_SLEEP_MODE == DISABLED
403#endif
404
405typedef struct vsf_pm_sleep_cfg_t {
411
412/*----------------------------------------------------------------------------*
413 * AHB Clock Management *
414 *----------------------------------------------------------------------------*/
415
416#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER == DISABLED
417typedef enum vsf_pm_sclk_no_t {
423#endif
424
425#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_NUMBER_MASK == DISABLED
426typedef enum vsf_pm_sclk_msk_t {
432#endif
433
435
436/*----------------------------------------------------------------------------*
437 * Main Clock Management *
438 *----------------------------------------------------------------------------*/
439
440#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_SEL == DISABLED
447
448
454
459
465#endif
466
468#if VSF_PM_CFG_REIMPLEMENT_TYPE_SCLK_DIV == DISABLED
469typedef enum vsf_pm_divider_t {
470 VSF_MREPEAT(255, __PM_DIV_, MAIN)
472#endif
473
474/*----------------------------------------------------------------------------*
475 * Peripheral Clock Management *
476 *----------------------------------------------------------------------------*/
477
478#if VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_NUMBER == DISABLED
479typedef enum vsf_pm_pclk_no_t {
486#endif
487
488#if VSF_PM_CFG_REIMPLEMENT_TYPE_PCLK_CFG == DISABLED
489typedef struct vsf_pm_pclk_cfg_t {
493#endif
494
496
497#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CORE_DIV == DISABLED
499 VSF_MREPEAT(255, __PM_DIV_, MCLK_CORE)
501#endif
502
503#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_AXI_DIV == DISABLED
505 VSF_MREPEAT(255, __PM_DIV_, MCLK_AXI)
507#endif
508
509#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_AHB_DIV == DISABLED
511 VSF_MREPEAT(255, __PM_DIV_, MCLK_AHB)
513#endif
514
515#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_APB_DIV == DISABLED
517 VSF_MREPEAT(255, __PM_DIV_, MCLK_APB)
519#endif
520
521#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_CFG == DISABLED
522typedef struct vsf_pm_mclk_cfg_t {
526#endif
527
528#if VSF_PM_CFG_REIMPLEMENT_TYPE_MCLK_NO == DISABLED
529typedef enum vsf_pm_mclk_no_t {
532
535
538
542#endif
543
544/*----------------------------------------------------------------------------*
545 * PLL Control *
546 *----------------------------------------------------------------------------*/
547
548#if VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_SEL == DISABLED
549typedef enum vsf_pm_pll_sel_t {
553#endif
554
555#if VSF_PM_CFG_REIMPLEMENT_TYPE_PLL_CFG == DISABLED
556typedef struct vsf_pm_pll_cfg_t {
562#endif
563
564#if VSF_PM_CFG_REIMPLEMENT_TYPE_POST_DIV == DISABLED
571#endif
572
573/*----------------------------------------------------------------------------*
574 * Low Power Oscillator Management *
575 *----------------------------------------------------------------------------*/
576
578
579#if VSF_PM_CFG_REIMPLEMENT_TYPE_LPOSC_SEL == DISABLED
580typedef enum vsf_pm_lposc_sel_t {
584#endif
585
587
588/*----------------------------------------------------------------------------*
589 * Clock Management *
590 *----------------------------------------------------------------------------*/
591
592#if VSF_PM_CFG_REIMPLEMENT_TYPE_CLOCK_OUT_CFG == DISABLED
599#endif
600
601typedef struct vsf_pm_capability_t {
602#if VSF_PM_CFG_INHERIT_HAL_CAPABILITY == ENABLED
604#endif
606
607/*============================ GLOBAL VARIABLES ==============================*/
608/*============================ PROTOTYPES ====================================*/
609/*============================ MACROFIED FUNCTIONS ===========================*/
610
611#ifdef __cplusplus
612}
613#endif
614
615#endif /* __VSF_TEMPLATE_PM_H__ */
616/* EOF */
vsf_pm_clk_src_sel_t
Definition pm.h:387
vsf_pm_clk_src_sel_t
Definition device.h:200
unsigned short uint16_t
Definition stdint.h:7
unsigned char uint_fast8_t
Definition stdint.h:23
unsigned uint32_t
Definition stdint.h:9
unsigned int uint_fast32_t
Definition stdint.h:27
unsigned char uint8_t
Definition stdint.h:5
short int_fast16_t
Definition stdint.h:24
Definition vsf_template_hal_driver.h:203
Definition vsf_template_pm.h:601
Definition vsf_template_pm.h:593
uint_fast8_t div
clk divider
Definition vsf_template_pm.h:597
vsf_pm_clk_src_sel_t clk_src
clk out source select
Definition vsf_template_pm.h:595
main clock config struct
Definition vsf_template_pm.h:522
uint32_t freq
system oscillator frequency
Definition vsf_template_pm.h:524
vsf_pm_clk_src_sel_t clk_src
main clock source
Definition vsf_template_pm.h:523
Definition vsf_template_pm.h:489
uint16_t div
Definition vsf_template_pm.h:491
vsf_pm_clk_src_sel_t clk_src
Definition vsf_template_pm.h:490
pll config struct
Definition vsf_template_pm.h:556
uint8_t ssel
pll Feedback divider value
Definition vsf_template_pm.h:560
vsf_pm_clk_src_sel_t pll_clk_src
pll clock source
Definition vsf_template_pm.h:557
uint8_t msel
PLL Feedback divider value.
Definition vsf_template_pm.h:559
uint32_t freq
system oscillator frequency
Definition vsf_template_pm.h:558
Definition vsf_template_pm.h:405
uint32_t sleep_cfg
Sleep mode cfg.
Definition vsf_template_pm.h:407
vsf_pm_sleep_mode_t sleep_mode
sleep mode
Definition vsf_template_pm.h:406
uint32_t wake_cfg
Awake mode cfg.
Definition vsf_template_pm.h:408
uint32_t sleep_walking_cfg
Sleep Walking mode cfg.
Definition vsf_template_pm.h:409
#define VSF_MREPEAT(__COUNT, __MACRO, __PARAM)
Definition vsf_repeat_macro.h:51
vsf_pm_mclk_no_t
Definition vsf_template_pm.h:529
@ VSF_MCLK_APB0_IDX
Definition vsf_template_pm.h:539
@ VSF_MCLK_AHB1_IDX
Definition vsf_template_pm.h:537
@ VSF_MCLK_CORE0_IDX
Definition vsf_template_pm.h:531
@ VSF_MCLK_CORE_IDX
Definition vsf_template_pm.h:530
@ VSF_MCLK_AXI1_IDX
Definition vsf_template_pm.h:534
@ VSF_MCLK_APB1_IDX
Definition vsf_template_pm.h:540
@ VSF_MCLK_AHB0_IDX
Definition vsf_template_pm.h:536
@ VSF_MCLK_AXI0_IDX
Definition vsf_template_pm.h:533
vsf_pm_sclk_msk_t
Definition vsf_template_pm.h:426
@ VSF_SCLK_SRAM0_MSK
Definition vsf_template_pm.h:430
@ VSF_SCLK_ROM0_MSK
Definition vsf_template_pm.h:428
@ VSF_SCLK_CORE_MSK
Definition vsf_template_pm.h:427
@ VSF_SCLK_PM0_MSK
Definition vsf_template_pm.h:429
uint_fast32_t vsf_pm_power_status_t
Definition vsf_template_pm.h:390
struct vsf_pm_pclk_cfg_t vsf_pm_pclk_cfg_t
vsf_pm_pll_sel_t
Definition vsf_template_pm.h:549
@ VSF_PLL1_IDX
Definition vsf_template_pm.h:551
@ VSF_PLL0_IDX
Definition vsf_template_pm.h:550
vsf_pm_power_cfg_msk_t
Definition vsf_template_pm.h:385
@ VSF_POWER_IRC_MSK
Definition vsf_template_pm.h:386
vsf_pm_power_cfg_no_t
Definition vsf_template_pm.h:379
@ VSF_POWER_IRC_IDX
Definition vsf_template_pm.h:380
vsf_pm_mclk_axi_div_t
Definition vsf_template_pm.h:504
struct vsf_pm_mclk_cfg_t vsf_pm_mclk_cfg_t
vsf_pm_pll_post_div_t
Definition vsf_template_pm.h:565
@ VSF_PLL_POST_DIV_2
pll post divider rate is 2
Definition vsf_template_pm.h:567
@ VSF_PLL_POST_DIV_1
pll post divider rate is 1
Definition vsf_template_pm.h:566
@ VSF_PLL_POST_DIV_8
pll post divider rate is 8
Definition vsf_template_pm.h:569
@ VSF_PLL_POST_DIV_4
pll post divider rate is 4
Definition vsf_template_pm.h:568
vsf_pm_mclk_apb_div_t
Definition vsf_template_pm.h:516
vsf_pm_divider_t
main clock prescaler
Definition vsf_template_pm.h:469
struct vsf_pm_lposc_cfg_t vsf_pm_lposc_cfg_t
Definition vsf_template_pm.h:586
vsf_pm_mclk_ahb_div_t
Definition vsf_template_pm.h:510
vsf_pm_pclk_no_t
Definition vsf_template_pm.h:479
@ VSF_PCLK_PM0
PM 0.
Definition vsf_template_pm.h:480
@ VSF_PCLK_SPI0
SPI 0.
Definition vsf_template_pm.h:481
@ VSF_PCLK_SPI1
SPI 1.
Definition vsf_template_pm.h:482
@ VSF_PCLK_USART1
USART1.
Definition vsf_template_pm.h:484
@ VSF_PCLK_USART0
USART0.
Definition vsf_template_pm.h:483
struct vsf_pm_pll_cfg_t vsf_pm_pll_cfg_t
uint_fast32_t vsf_pm_sclk_status_t
Definition vsf_template_pm.h:434
vsf_pm_mclk_core_div_t
Definition vsf_template_pm.h:498
vsf_pm_sclk_no_t
Definition vsf_template_pm.h:417
@ VSF_SCLK_CORE_IDX
Definition vsf_template_pm.h:418
@ VSF_SCLK_PM0_IDX
Definition vsf_template_pm.h:420
@ VSF_SCLK_ROM0_IDX
Definition vsf_template_pm.h:419
@ VSF_SCLK_SRAM0_IDX
Definition vsf_template_pm.h:421
vsf_pm_sleep_mode_t
Definition vsf_template_pm.h:397
@ VSF_PM_POWER_OFF
Definition vsf_template_pm.h:401
@ VSF_PM_DEEP_SLEEP
Definition vsf_template_pm.h:400
@ VSF_PM_WAIT
Definition vsf_template_pm.h:398
@ VSF_PM_SLEEP
Definition vsf_template_pm.h:399
struct vsf_lposc_cfg_t vsf_lposc_cfg_t
Definition vsf_template_pm.h:577
int_fast16_t vsf_pm_pclk_status_t
Definition vsf_template_pm.h:495
vsf_pm_clk_src_sel_t
Definition vsf_template_pm.h:441
@ VSF_MAIN_CLKSRC_PLLOUT
Maniclk source is PLLOUT.
Definition vsf_template_pm.h:458
@ VSF_PLL_CLKSRC_IRC
pll source clk is IRC
Definition vsf_template_pm.h:449
@ VSF_AUTO_CLKSRC_EXTCLK1
source clk is extern clock1
Definition vsf_template_pm.h:446
@ VSF_MAIN_CLKSRC_LPOSC
Maniclk source is LPOSC.
Definition vsf_template_pm.h:457
@ VSF_AUTO_CLKSRC_IRC
source clk is IRC
Definition vsf_template_pm.h:442
@ VSF_AUTO_CLKSRC_SYSOSC0
source clk is System oscillator
Definition vsf_template_pm.h:443
@ VSF_AUTO_CLKSRC_EXTCLK0
Source clk is extern clock0.
Definition vsf_template_pm.h:445
@ VSF_MAIN_CLKSRC_IRC
Maniclk source is IRC.
Definition vsf_template_pm.h:455
@ VSF_PLL_CLKSRC_SYSOSC1
pll source clk is CLKIN
Definition vsf_template_pm.h:451
@ VSF_AUTO_CLKSRC_SYSOSC1
source clock is WDTOSC
Definition vsf_template_pm.h:444
@ VSF_CLKOUT_CLKSRC_LPOSC
Clockout source is LPOSC.
Definition vsf_template_pm.h:462
@ VSF_CLKOUT_CLKSRC_SYSOSC0
Clockout source is System Oscillator 0.
Definition vsf_template_pm.h:461
@ VSF_PLL_CLKSRC_SYSOSC0
pll source clk is System oscillator
Definition vsf_template_pm.h:450
@ VSF_CLKOUT_CLKSRC_MCLK
Clockout source is PLLOUT.
Definition vsf_template_pm.h:463
@ VSF_PLL_CLKSRC_EXTCLK1
pll source clk is extern clock1
Definition vsf_template_pm.h:453
@ VSF_PLL_CLKSRC_EXTCLK0
pll source clk is extern clock0
Definition vsf_template_pm.h:452
@ VSF_MAIN_CLKSRC_PLLIN
Maniclk source is System OSC0.
Definition vsf_template_pm.h:456
@ VSF_CLKOUT_CLKSRC_IRC
Clockout source is IRC.
Definition vsf_template_pm.h:460
vsf_pm_lposc_sel_t
Definition vsf_template_pm.h:580
@ VSF_LPOSC_ALWAYS_ON
Definition vsf_template_pm.h:581
@ VSF_LPOSC_32K_OSC
Definition vsf_template_pm.h:582
#define __PM_DIV_(_N, _D)
Definition vsf_template_pm.h:48
Generated from commit: vsfteam/vsf@2b286be