VSF Documented
vsf_template_sdio.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __VSF_TEMPLATE_SDIO_H__
19#define __VSF_TEMPLATE_SDIO_H__
20
21/*============================ INCLUDES ======================================*/
22
24#include "hal/arch/vsf_arch.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*============================ MACROS ========================================*/
31
39#ifndef VSF_SDIO_CFG_MULTI_CLASS
40# define VSF_SDIO_CFG_MULTI_CLASS ENABLED
41#endif
42
50#if defined(VSF_HW_SDIO_COUNT) && !defined(VSF_HW_SDIO_MASK)
51# define VSF_HW_SDIO_MASK VSF_HAL_COUNT_TO_MASK(VSF_HW_SDIO_COUNT)
52#endif
53
61#if defined(VSF_HW_SDIO_MASK) && !defined(VSF_HW_SDIO_COUNT)
62# define VSF_HW_SDIO_COUNT VSF_HAL_MASK_TO_COUNT(VSF_HW_SDIO_MASK)
63#endif
64
73#ifndef VSF_SDIO_CFG_PREFIX
74# if VSF_SDIO_CFG_MULTI_CLASS == ENABLED
75# define VSF_SDIO_CFG_PREFIX vsf
76# elif defined(VSF_HW_SDIO_COUNT) && (VSF_HW_SDIO_COUNT != 0)
77# define VSF_SDIO_CFG_PREFIX vsf_hw
78# else
79# define VSF_SDIO_CFG_PREFIX vsf
80# endif
81#endif
82
92#ifndef VSF_SDIO_CFG_FUNCTION_RENAME
93# define VSF_SDIO_CFG_FUNCTION_RENAME ENABLED
94#endif
95
105#ifndef VSF_SDIO_CFG_REIMPLEMENT_TYPE_MODE
106# define VSF_SDIO_CFG_REIMPLEMENT_TYPE_MODE DISABLED
107#endif
108
119#ifndef VSF_SDIO_CFG_REIMPLEMENT_TYPE_IRQ_MASK
120# define VSF_SDIO_CFG_REIMPLEMENT_TYPE_IRQ_MASK DISABLED
121#endif
122
133#ifndef VSF_SDIO_CFG_REIMPLEMENT_TYPE_STATUS
134# define VSF_SDIO_CFG_REIMPLEMENT_TYPE_STATUS DISABLED
135#endif
136
149#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_CFG == DISABLED
150# define VSF_SDIO_CFG_REIMPLEMENT_TYPE_CFG DISABLED
151#endif
152
165#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_CAPABILITY == DISABLED
166# define VSF_SDIO_CFG_REIMPLEMENT_TYPE_CAPABILITY DISABLED
167#endif
168
179#ifndef VSF_SDIO_CFG_INHERIT_HAL_CAPABILITY
180# define VSF_SDIO_CFG_INHERIT_HAL_CAPABILITY ENABLED
181#endif
182
183/* SD commands type argument response */
184 /* class 0 */
185/* This is basically the same command as for MMC with some quirks. */
186#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
187#define SD_SEND_RELATIVE_ADDR_OP (SDIO_RESP_R6)
188#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
189#define SD_SEND_IF_COND_OP (SDIO_RESP_R7)
190#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
191#define SD_SWITCH_VOLTAGE_OP (SDIO_RESP_R1 | SDIO_CMDOP_CLKHOLD)
192
193 /* class 10 */
194#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
195#define SD_SWITCH_OP (SDIO_RESP_R1)
196
197 /* class 5 */
198#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
199#define SD_ERASE_WR_BLK_START_OP (SDIO_RESP_R1)
200#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
201#define SD_ERASE_WR_BLK_END_OP (SDIO_RESP_R1)
202
203 /* Application commands */
204#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
205#define SD_APP_SET_BUS_WIDTH_OP (SDIO_RESP_R1)
206# define SD_BUS_WIDTH_1 0
207# define SD_BUS_WIDTH_4 2
208# define SD_BUS_WIDTH_8 3
209#define SD_APP_SD_STATUS 13 /* adtc R1 */
210#define SD_APP_SD_STATUS_OP (SDIO_RESP_R1)
211#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
212#define SD_APP_SEND_NUM_WR_BLKS_OP (SDIO_RESP_R1)
213#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
214#define SD_APP_OP_COND_OP (SDIO_RESP_R3)
215#define SD_APP_SEND_SCR 51 /* adtc R1 */
216#define SD_APP_SEND_SCR_OP (SDIO_RESP_R1)
217
218 /* class 11 */
219#define SD_READ_EXTR_SINGLE 48 /* adtc [31:0] R1 */
220#define SD_READ_EXTR_SINGLE_OP (SDIO_RESP_R1)
221#define SD_WRITE_EXTR_SINGLE 49 /* adtc [31:0] R1 */
222#define SD_WRITE_EXTR_SINGLE_OP (SDIO_RESP_R1)
223
224/* OCR bit definitions */
225#define SD_OCR_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
226#define SD_OCR_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
227#define SD_OCR_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
228#define SD_OCR_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
229#define SD_OCR_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
230#define SD_OCR_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
231#define SD_OCR_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
232#define SD_OCR_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
233#define SD_OCR_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
234#define SD_OCR_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
235#define SD_OCR_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
236#define SD_OCR_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
237#define SD_OCR_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
238#define SD_OCR_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
239#define SD_OCR_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
240#define SD_OCR_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
241#define SD_OCR_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
242#define SD_OCR_VDD_HIGH 0x00FF8000 /* VDD voltage 2.7 ~ 3.6 */
243#define SD_OCR_VDD_LOW 0x00007F80 /* VDD voltage 1.65 ~ 2.7 */
244#define SD_OCR_VDD (SD_OCR_VDD_HIGH | SD_OCR_VDD_LOW)
245#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
246#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
247#define SD_OCR_XPC (1 << 28) /* SDXC power control */
248#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
249
250/* Standard MMC commands (4.1) type argument response */
251 /* class 1 */
252#define MMC_GO_IDLE_STATE 0 /* bc */
253#define MMC_GO_IDLE_STATE_OP (SDIO_RESP_NONE)
254#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
255#define MMC_SEND_OP_COND_OP (SDIO_RESP_R3)
256#define MMC_ALL_SEND_CID 2 /* bcr R2 */
257#define MMC_ALL_SEND_CID_OP (SDIO_RESP_R2)
258#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
259#define MMC_SET_RELATIVE_ADDR_OP (SDIO_RESP_R1)
260#define MMC_SET_DSR 4 /* bc [31:16] RCA */
261#define MMC_SET_DSR_OP (SDIO_RESP_NONE)
262#define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */
263#define MMC_SLEEP_AWAKE_OP (SDIO_RESP_R1B)
264#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
265#define MMC_SWITCH_OP (SDIO_RESP_R1B)
266#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
267#define MMC_SELECT_CARD_OP (SDIO_RESP_R1)
268#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
269#define MMC_SEND_EXT_CSD_OP (SDIO_RESP_R1)
270#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
271#define MMC_SEND_CSD_OP (SDIO_RESP_R2)
272#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
273#define MMC_SEND_CID_OP (SDIO_RESP_R2)
274#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
275#define MMC_READ_DAT_UNTIL_STOP_OP (SDIO_RESP_R1)
276#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
277#define MMC_STOP_TRANSMISSION_OP (SDIO_RESP_R1B | SDIO_CMDOP_TRANS_STOP)
278#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
279#define MMC_SEND_STATUS_OP (SDIO_RESP_R1)
280#define MMC_BUS_TEST_R 14 /* adtc R1 */
281#define MMC_BUS_TEST_R_OP (SDIO_RESP_R1)
282#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
283#define MMC_BUS_TEST_W 19 /* adtc R1 */
284#define MMC_BUS_TEST_W_OP (SDIO_RESP_R1)
285#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
286#define MMC_SPI_READ_OCR_OP (SDIO_RESP_SPI_R3)
287#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
288#define MMC_SPI_CRC_ON_OFF_OP (SDIO_RESP_SPI_R1)
289
290 /* class 2 */
291#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
292#define MMC_SET_BLOCKLEN_OP (SDIO_RESP_R1)
293#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
294#define MMC_READ_SINGLE_BLOCK_OP (SDIO_RESP_R1 | SDIO_CMDOP_SINGLE_BLOCK | SDIO_CMDOP_READ)
295#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
296#define MMC_READ_MULTIPLE_BLOCK_OP (SDIO_RESP_R1 | SDIO_CMDOP_MULTI_BLOCK | SDIO_CMDOP_READ)
297#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
298#define MMC_SEND_TUNING_BLOCK_OP (SDIO_RESP_R1)
299#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
300#define MMC_SEND_TUNING_BLOCK_HS200_OP (SDIO_RESP_R1)
301
302 /* class 3 */
303#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
304#define MMC_WRITE_DAT_UNTIL_STOP_OP (SDIO_RESP_R1)
305
306 /* class 4 */
307#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
308#define MMC_SET_BLOCK_COUNT_OP (SDIO_RESP_R1)
309#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
310#define MMC_WRITE_BLOCK_OP (SDIO_RESP_R1 | SDIO_CMDOP_SINGLE_BLOCK | SDIO_CMDOP_WRITE)
311#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
312#define MMC_WRITE_MULTIPLE_BLOCK_OP (SDIO_RESP_R1 | SDIO_CMDOP_MULTI_BLOCK | SDIO_CMDOP_WRITE)
313#define MMC_PROGRAM_CID 26 /* adtc R1 */
314#define MMC_PROGRAM_CID_OP (SDIO_RESP_R1)
315#define MMC_PROGRAM_CSD 27 /* adtc R1 */
316#define MMC_PROGRAM_CSD_OP (SDIO_RESP_R1)
317
318 /* class 6 */
319#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
320#define MMC_SET_WRITE_PROT_OP (SDIO_RESP_R1B)
321#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
322#define MMC_CLR_WRITE_PROT_OP (SDIO_RESP_R1B)
323#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
324#define MMC_SEND_WRITE_PROT_OP (SDIO_RESP_R1)
325
326 /* class 5 */
327#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
328#define MMC_ERASE_GROUP_START_OP (SDIO_RESP_R1)
329#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
330#define MMC_ERASE_GROUP_END_OP (SDIO_RESP_R1)
331#define MMC_ERASE 38 /* ac R1b */
332#define MMC_ERASE_OP (SDIO_RESP_R1B)
333
334 /* class 9 */
335#define MMC_FAST_IO 39 /* ac <Complex> R4 */
336#define MMC_FAST_IO_OP (SDIO_RESP_R4)
337#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
338#define MMC_GO_IRQ_STATE_OP (SDIO_RESP_R5)
339
340 /* class 7 */
341#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
342#define MMC_LOCK_UNLOCK_OP (SDIO_RESP_R1B)
343
344 /* class 8 */
345#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
346#define MMC_APP_CMD_OP (SDIO_RESP_R1)
347#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
348#define MMC_GEN_CMD_OP (SDIO_RESP_R1)
349
350 /* class 11 */
351#define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */
352#define MMC_QUE_TASK_PARAMS_OP (SDIO_RESP_R1)
353#define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */
354#define MMC_QUE_TASK_ADDR_OP (SDIO_RESP_R1)
355#define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */
356#define MMC_EXECUTE_READ_TASK_OP (SDIO_RESP_R1)
357#define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */
358#define MMC_EXECUTE_WRITE_TASK_OP (SDIO_RESP_R1)
359#define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */
360#define MMC_CMDQ_TASK_MGMT_OP (SDIO_RESP_R1B)
361
362/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
363#define SD_VERSION_SD (1U << 31)
364#define MMC_VERSION_MMC (1U << 30)
365
366#define MAKE_SDMMC_VERSION(a, b, c) \
367 ((((uint32_t)(a)) << 16) | ((uint32_t)(b) << 8) | (uint32_t)(c))
368#define MAKE_SD_VERSION(a, b, c) \
369 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
370#define MAKE_MMC_VERSION(a, b, c) \
371 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
372
373#define EXTRACT_SDMMC_MAJOR_VERSION(x) \
374 (((uint32_t)(x) >> 16) & 0xff)
375#define EXTRACT_SDMMC_MINOR_VERSION(x) \
376 (((uint32_t)(x) >> 8) & 0xff)
377#define EXTRACT_SDMMC_CHANGE_VERSION(x) \
378 ((uint32_t)(x) & 0xff)
379
380#define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
381#define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
382#define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
383#define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
384
385#define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
386#define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
387#define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
388#define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
389#define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
390#define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
391#define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
392#define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
393#define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
394#define MMC_VERSION_4_4 MAKE_MMC_VERSION(4, 4, 0)
395#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
396#define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
397#define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
398#define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
399
400#define IS_SD(x) ((x) & SD_VERSION_SD)
401#define IS_MMC(x) ((x) & MMC_VERSION_MMC)
402
403// r1 response card status
404#define R1_OUT_OF_RANGE (1 << 31) /* er, c */
405#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
406#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
407#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
408#define R1_ERASE_PARAM (1 << 27) /* ex, c */
409#define R1_WP_VIOLATION (1 << 26) /* erx, c */
410#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
411#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
412#define R1_COM_CRC_ERROR (1 << 23) /* er, b */
413#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
414#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
415#define R1_CC_ERROR (1 << 20) /* erx, c */
416#define R1_ERROR (1 << 19) /* erx, c */
417#define R1_UNDERRUN (1 << 18) /* ex, c */
418#define R1_OVERRUN (1 << 17) /* ex, c */
419#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
420#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
421#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
422#define R1_ERASE_RESET (1 << 13) /* sr, c */
423#define R1_STATUS(x) (x & 0xFFF9A000)
424#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
425#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
426#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
427#define R1_EXCEPTION_EVENT (1 << 6) /* sr, a */
428#define R1_APP_CMD (1 << 5) /* sr, c */
429
430#define R1_STATE_IDLE 0
431#define R1_STATE_READY 1
432#define R1_STATE_IDENT 2
433#define R1_STATE_STBY 3
434#define R1_STATE_TRAN 4
435#define R1_STATE_DATA 5
436#define R1_STATE_RCV 6
437#define R1_STATE_PRG 7
438#define R1_STATE_DIS 8
439#define R1_STATE_MASK 0x0FUL
440
441#define R1_CUR_STATE(__S) ((__S) << 9)
442
443/*============================ MACROFIED FUNCTIONS ===========================*/
444
454#define VSF_SDIO_APIS(__prefix) \
455 __VSF_HAL_TEMPLATE_API(__prefix, vsf_err_t, sdio, init, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, vsf_sdio_cfg_t *cfg_ptr) \
456 __VSF_HAL_TEMPLATE_API(__prefix, void, sdio, fini, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr) \
457 __VSF_HAL_TEMPLATE_API(__prefix, void, sdio, irq_enable, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, vsf_sdio_irq_mask_t irq_mask) \
458 __VSF_HAL_TEMPLATE_API(__prefix, void, sdio, irq_disable, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, vsf_sdio_irq_mask_t irq_mask) \
459 __VSF_HAL_TEMPLATE_API(__prefix, vsf_sdio_status_t, sdio, status, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr) \
460 __VSF_HAL_TEMPLATE_API(__prefix, vsf_sdio_capability_t, sdio, capability, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr) \
461 __VSF_HAL_TEMPLATE_API(__prefix, vsf_err_t, sdio, set_clock, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, uint32_t clock_hz, bool is_ddr) \
462 __VSF_HAL_TEMPLATE_API(__prefix, vsf_err_t, sdio, set_bus_width, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, uint8_t bus_width) \
463 __VSF_HAL_TEMPLATE_API(__prefix, vsf_err_t, sdio, host_request, VSF_MCONNECT(__prefix, _sdio_t) *sdio_ptr, vsf_sdio_req_t *req)
464
465/*============================ TYPES =========================================*/
466
467typedef union vsf_sdio_csd_t {
468// name bitlen offset
469// refer to: Part_1_Physical_Layer_Specification_Ver3.01_Final_100218.pdf
470 struct {
471 uint32_t ALWAY1 : 1; // 0
472 uint32_t CRC : 7; // 1
473
474 // different part from mmc
475 uint32_t : 2; // 8
476
480 uint32_t COPY : 1; // 14
482
483 // different part from mmc
484 uint32_t : 5; // 16
485
489
490 // different part from mmc
491 uint32_t : 2; // 29
492
497
498 // different part from sd_v2
504 uint32_t C_SIZE : 12; // 62
505 uint32_t : 2; // 74
506
507 uint32_t DSR_IMP : 1; // 76
512 uint32_t CCC : 12; // 84
514 uint32_t NSAC : 8; // 104
515 uint32_t TAAC : 8; // 112
516
517 // different part from mmc
518 uint32_t : 6; // 120
519
522// refer to: Part_1_Physical_Layer_Specification_Ver3.01_Final_100218.pdf
523 struct {
524 uint32_t : 1; // 0
525 uint32_t CRC : 7; // 1
526
527 // different part from mmc
528 uint32_t : 2; // 8
529
530 uint32_t FILE_FORMAT : 2; // 10
531 uint32_t TMP_WRITE_PROTECT : 1; // 12
533 uint32_t COPY : 1; // 14
534 uint32_t FILE_FORMAT_GRP : 1; // 15
535
536 // different part from mmc
537 uint32_t : 5; // 16
538
539 uint32_t WRITE_BL_PARTIAL : 1; // 21
540 uint32_t WRITE_BL_LEN : 4; // 22
541 uint32_t R2W_FACTOR : 3; // 26
542
543 // different part from mmc
544 uint32_t : 2; // 29
545
546 uint32_t WP_GRP_ENABLE : 1; // 31
547 uint32_t WP_GRP_SIZE : 7; // 32
548 uint32_t SECTOR_SIZE : 7; // 39
549 uint32_t ERASE_BLK_EN : 1; // 46
550
551 // different part from sd_v1 and mmc
552 uint32_t : 1; // 47
553 uint32_t C_SIZE : 22; // 48
554 uint32_t : 6; // 70
555
556 uint32_t DSR_IMP : 1; // 76
557 uint32_t READ_BLK_MISALIGN : 1; // 77
559 uint32_t READ_BL_PARTIAL : 1; // 79
560 uint32_t READ_BL_LEN : 4; // 80
561 uint32_t CCC : 12; // 84
562 uint32_t TRANS_SPEED : 8; // 96
563 uint32_t NSAC : 8; // 104
564 uint32_t TAAC : 8; // 112
565
566 // different part from mmc
567 uint32_t : 2; // 120
568
569 uint32_t CSD_STRUCTURE : 2; // 126
571// refer to: mmc specification
572 struct {
573 uint32_t : 1; // 0
574 uint32_t CRC : 7; // 1
575
576 // different part from sd_v1 and sd_v2
577 uint32_t ECC : 2; // 8
578
579 uint32_t FILE_FORMAT : 2; // 10
580 uint32_t TMP_WRITE_PROTECT : 1; // 12
582 uint32_t COPY : 1; // 14
583 uint32_t FILE_FORMAT_GRP : 1; // 15
584
585 // different part from sd_v1 and sd_v2
587 uint32_t : 4; // 17
588
589 uint32_t WRITE_BL_PARTIAL : 1; // 21
590 uint32_t WRITE_BL_LEN : 4; // 22
591 uint32_t R2W_FACTOR : 3; // 26
592
593 // different part from sd_v1 and sd_v2
595
596 uint32_t WP_GRP_ENABLE : 1; // 31
597
598 // different part from sd_v1 and sd_v2
599 uint32_t WP_GRP_SIZE : 5; // 32
602
603 // different part from sd_v2
604 uint32_t C_SIZE_MULT : 3; // 47
605 uint32_t VDD_W_CURR_MAX : 3; // 50
606 uint32_t VDD_W_CURR_MIN : 3; // 53
607 uint32_t VDD_R_CURR_MAX : 3; // 56
608 uint32_t VDD_R_CURR_MIN : 3; // 59
609 uint32_t C_SIZE : 12; // 62
610 uint32_t : 2; // 74
611
612 uint32_t DSR_IMP : 1; // 76
613 uint32_t READ_BLK_MISALIGN : 1; // 77
615 uint32_t READ_BL_PARTIAL : 1; // 79
616 uint32_t READ_BL_LEN : 4; // 80
617 uint32_t CCC : 12; // 84
618 uint32_t TRANS_SPEED : 8; // 96
619 uint32_t NSAC : 8; // 104
620 uint32_t TAAC : 8; // 112
621
622 // different part from sd_v1 and sd_v2
623 uint32_t : 2; // 120
624 uint32_t SPEC_VERS : 4; // 122
625
626 uint32_t CSD_STRUCTURE : 2; // 126
629
630typedef struct vsf_sdio_cid_t {
631// refer to: Part_1_Physical_Layer_Specification_Ver3.01_Final_100218.pdf
632 uint64_t : 1; // 0
633 uint64_t CRC : 7; // 1
634 uint64_t MDT : 12; // 8 Manufacturing date
635 uint64_t : 4; // 20
636 uint64_t PSN : 32; // 24 Product serial number
637 uint64_t PRV : 8; // 56 Product revision
638 uint64_t PNM : 40; // 64 Product name
639 uint64_t OID : 16; // 104 OEM/Application ID
640 uint64_t MID : 8; // 120 Manufacturer ID
642
643#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_MODE == DISABLED
644typedef enum vsf_sdio_mode_t {
645 SDIO_MODE_HOST = (0x1ul << 0), // select host mode
646 SDIO_MODE_SLAVE = (0x0ul << 0), // select slave mode
647 SDIO_MODE_MASK = (0x1ul << 0),
649#endif
650
660#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_REQOP == DISABLED
661typedef enum vsf_sdio_reqop_t {
662 SDIO_CMDOP_BYTE = (0ul << 0),
663 SDIO_CMDOP_STREAM = (1ul << 0),
666
667 SDIO_CMDOP_WRITE = (1ul << 2),
668 SDIO_CMDOP_READ = (0ul << 2),
669
671 // prefix __ means private, not mandatory, different names can be used according to different hw
672 __SDIO_CMDOP_RESP = (1ul << 4),
676 // SDIO_RESP_R1 etc are mandatory
679#define SDIO_RESP_R1B (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT_CRC | SDIO_CMDOP_RESP_BUSY)
680#define SDIO_RESP_R2 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_LONG_CRC)
681#define SDIO_RESP_R3 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT)
682#define SDIO_RESP_R4 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT)
683#define SDIO_RESP_R5 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT_CRC)
684#define SDIO_RESP_R6 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT_CRC)
685#define SDIO_RESP_R7 (__SDIO_CMDOP_RESP | __SDIO_CMDOP_RESP_SHORT_CRC)
686
687 // used for CMD11(SD_SWITCH_VOLTAGE) only, hold clock after resp, ignore if no resp
688 SDIO_CMDOP_CLKHOLD = (1ul << 7),
689 // used for CMD12(MMC_STOP_TRANSMISSION) only
692#endif
693
694typedef struct vsf_sdio_req_t {
698
699 // block_size will be 1 << block_size_bits
704
705#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_IRQ_MASK == DISABLED
707 // TODO: add irq mask for stream mode
710 SDIO_IRQ_MASK_HOST_DATA_ABORT = (0x1ul << 2), // aborted by CMD12
715#endif
716
717#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_REQSTS == DISABLED
718typedef enum vsf_sdio_reqsts_t {
723 SDIO_REQSTS_DATA_BUSY = (0x1ul << 3),
724 SDIO_REQSTS_BUSY = (0x1ul << 4),
729#endif
730
731#if VSF_SDIO_CFG_REIMPLEMENT_TYPE_STATUS == DISABLED
732typedef struct vsf_sdio_status_t {
733 union {
735 vsf_sdio_reqsts_t req_status;
737 };
739#endif
740
741typedef struct vsf_sdio_capability_t {
742#if VSF_SDIO_CFG_INHERIT_HAL_CAPABILITY == ENABLED
744#endif
745 enum {
746 SDIO_CAP_BUS_WIDTH_1 = (0x1ul << 0),
747 SDIO_CAP_BUS_WIDTH_4 = (0x1ul << 1),
748 SDIO_CAP_BUS_WIDTH_8 = (0x1ul << 2),
751 // data alignment(address and size) in bytes
752 uint16_t data_ptr_alignment; // alignment of data pointer
753 uint16_t data_size_alignment; // alignment of data size
756
757#if VSF_STIO_CFG_REIMPLEMENT_TYPE_CFG == DISABLED
758typedef struct vsf_sdio_t vsf_sdio_t;
759
794typedef void vsf_sdio_isr_handler_t(void *target_ptr,
795 vsf_sdio_t *sdio_ptr,
798 uint32_t resp[4]);
799
807typedef struct vsf_sdio_isr_t {
815
823typedef struct vsf_sdio_cfg_t {
829#endif
830
831typedef struct vsf_sdio_op_t {
833#undef __VSF_HAL_TEMPLATE_API
834#define __VSF_HAL_TEMPLATE_API VSF_HAL_TEMPLATE_API_FP
836
837 VSF_SDIO_APIS(vsf)
839
840#if VSF_SDIO_CFG_MULTI_CLASS == ENABLED
843};
844#endif
845
846/*============================ GLOBAL VARIABLES ==============================*/
847/*============================ PROTOTYPES ====================================*/
848
868extern vsf_err_t vsf_sdio_init(vsf_sdio_t *sdio_ptr, vsf_sdio_cfg_t *cfg_ptr);
869
881extern void vsf_sdio_fini(vsf_sdio_t *sdio_ptr);
882
899
914
927
940
956extern vsf_err_t vsf_sdio_set_clock(vsf_sdio_t *sdio_ptr, uint32_t clock_hz, bool is_ddr);
957
971extern vsf_err_t vsf_sdio_set_bus_width(vsf_sdio_t *sdio_ptr, uint8_t bus_width);
972
987
1002
1003// TODO: add APIs for stream mode
1004
1005/*============================ MACROFIED FUNCTIONS ===========================*/
1006
1008#if VSF_SDIO_CFG_FUNCTION_RENAME == ENABLED
1009# define __vsf_sdio_t VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_t)
1010# define vsf_sdio_init(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_init) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1011# define vsf_sdio_enable(__SDIO) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_enable) ((__vsf_sdio_t *)(__SDIO))
1012# define vsf_sdio_disable(__SDIO) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_disable) ((__vsf_sdio_t *)(__SDIO))
1013# define vsf_sdio_irq_enable(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_irq_enable) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1014# define vsf_sdio_irq_disable(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_irq_disable) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1015# define vsf_sdio_status(__SDIO) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_status) ((__vsf_sdio_t *)(__SDIO))
1016# define vsf_sdio_capability(__SDIO) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_capability) ((__vsf_sdio_t *)(__SDIO))
1017# define vsf_sdio_set_clock(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_set_clock) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1018# define vsf_sdio_set_bus_width(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_set_bus_width) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1019# define vsf_sdio_host_request(__SDIO, ...) VSF_MCONNECT(VSF_SDIO_CFG_PREFIX, _sdio_host_request) ((__vsf_sdio_t *)(__SDIO), ##__VA_ARGS__)
1020#endif
1022
1023#ifdef __cplusplus
1024}
1025#endif
1026
1027#endif /*__VSF_TEMPLATE_SDIO_H__*/
vsf_err_t
Definition __type.h:42
vsf_sdio_reqop_t
Definition sdio.h:38
vsf_sdio_irq_mask_t
Definition sdio.h:78
vsf_sdio_reqsts_t
Definition sdio.h:85
vsf_arch_prio_t
Definition cortex_a_generic.h:88
const i_spi_t vsf_spi_irq_mask_t irq_mask
Definition spi_interface.h:38
unsigned short uint16_t
Definition stdint.h:7
unsigned uint32_t
Definition stdint.h:9
unsigned long long uint64_t
Definition stdint.h:11
unsigned char uint8_t
Definition stdint.h:5
Definition vsf_template_hal_driver.h:203
Definition vsf_template_hal_driver.h:196
Definition vsf_template_sdio.h:741
bus_width
Definition vsf_template_sdio.h:749
bool support_ddr
Definition vsf_template_sdio.h:754
uint16_t data_size_alignment
Definition vsf_template_sdio.h:753
uint32_t max_freq_hz
Definition vsf_template_sdio.h:750
uint16_t data_ptr_alignment
Definition vsf_template_sdio.h:752
inherit(vsf_peripheral_capability_t) enum
Definition vsf_template_sdio.h:743
sdio configuration
Definition vsf_template_sdio.h:823
vsf_sdio_isr_t isr
Definition vsf_template_sdio.h:826
vsf_sdio_mode_t mode
Definition vsf_template_sdio.h:824
Definition vsf_template_sdio.h:630
uint64_t MDT
Definition vsf_template_sdio.h:634
uint64_t PRV
Definition vsf_template_sdio.h:637
uint64_t PNM
Definition vsf_template_sdio.h:638
uint64_t MID
Definition vsf_template_sdio.h:640
uint64_t PSN
Definition vsf_template_sdio.h:636
uint64_t OID
Definition vsf_template_sdio.h:639
uint64_t CRC
Definition vsf_template_sdio.h:633
sdio interrupt configuration
Definition vsf_template_sdio.h:807
vsf_sdio_isr_handler_t * handler_fn
Definition vsf_template_sdio.h:808
void * target_ptr
Definition vsf_template_sdio.h:810
vsf_arch_prio_t prio
Definition vsf_template_sdio.h:812
Definition vsf_template_sdio.h:831
Definition vsf_template_sdio.h:694
uint8_t cmd
Definition vsf_template_sdio.h:695
vsf_sdio_reqop_t op
Definition vsf_template_sdio.h:697
uint32_t arg
Definition vsf_template_sdio.h:696
uint8_t block_size_bits
Definition vsf_template_sdio.h:700
uint8_t * buffer
Definition vsf_template_sdio.h:701
uint32_t count
Definition vsf_template_sdio.h:702
Definition vsf_template_sdio.h:732
vsf_sdio_irq_mask_t irq_status
Definition vsf_template_sdio.h:736
Definition vsf_template_sdio.h:841
const vsf_sdio_op_t * op
Definition vsf_template_sdio.h:842
void vsf_sdio_isr_handler_t(void *target_ptr, vsf_sdio_t *sdio_ptr, vsf_sdio_irq_mask_t irq_mask, vsf_sdio_reqsts_t status, uint32_t resp[4])
Definition sdio.h:189
vsf_sdio_irq_mask_t
Definition sdio.h:152
vsf_sdio_mode_t
Definition sdio.h:117
vsf_sdio_reqsts_t
Definition sdio.h:164
Definition vsf_template_sdio.h:467
uint32_t WRITE_BL_LEN
Definition vsf_template_sdio.h:487
uint32_t TAAC
Definition vsf_template_sdio.h:515
uint32_t CONTENT_PROT_APP
Definition vsf_template_sdio.h:586
uint32_t READ_BL_PARTIAL
Definition vsf_template_sdio.h:510
uint32_t WP_GRP_SIZE
Definition vsf_template_sdio.h:494
uint32_t ERASE_GRP_SIZE
Definition vsf_template_sdio.h:601
struct vsf_sdio_csd_t::@581 mmc
uint32_t READ_BLK_MISALIGN
Definition vsf_template_sdio.h:508
uint32_t ECC
Definition vsf_template_sdio.h:577
uint32_t ERASE_GRP_MULT
Definition vsf_template_sdio.h:600
uint32_t SECTOR_SIZE
Definition vsf_template_sdio.h:495
uint32_t R2W_FACTOR
Definition vsf_template_sdio.h:488
uint32_t ALWAY1
Definition vsf_template_sdio.h:471
uint32_t WP_GRP_ENABLE
Definition vsf_template_sdio.h:493
uint32_t NSAC
Definition vsf_template_sdio.h:514
uint32_t ERASE_BLK_EN
Definition vsf_template_sdio.h:496
uint32_t FILE_FORMAT
Definition vsf_template_sdio.h:477
uint32_t READ_BL_LEN
Definition vsf_template_sdio.h:511
uint32_t COPY
Definition vsf_template_sdio.h:480
uint32_t CCC
Definition vsf_template_sdio.h:512
struct vsf_sdio_csd_t::@579 sd_v1
uint32_t VDD_R_CURR_MAX
Definition vsf_template_sdio.h:502
struct vsf_sdio_csd_t::@580 sd_v2
uint32_t WRITE_BL_PARTIAL
Definition vsf_template_sdio.h:486
uint32_t CSD_STRUCTURE
Definition vsf_template_sdio.h:520
uint32_t FILE_FORMAT_GRP
Definition vsf_template_sdio.h:481
uint32_t VDD_W_CURR_MIN
Definition vsf_template_sdio.h:501
uint32_t DSR_IMP
Definition vsf_template_sdio.h:507
uint32_t VDD_R_CURR_MIN
Definition vsf_template_sdio.h:503
uint32_t SPEC_VERS
Definition vsf_template_sdio.h:624
uint32_t CRC
Definition vsf_template_sdio.h:472
uint32_t TRANS_SPEED
Definition vsf_template_sdio.h:513
uint32_t DEFAULT_ECC
Definition vsf_template_sdio.h:594
uint32_t C_SIZE
Definition vsf_template_sdio.h:504
uint32_t C_SIZE_MULT
Definition vsf_template_sdio.h:499
uint32_t TMP_WRITE_PROTECT
Definition vsf_template_sdio.h:478
uint32_t PERM_WRITE_PROTECT
Definition vsf_template_sdio.h:479
uint32_t WRITE_BLK_MISALIGN
Definition vsf_template_sdio.h:509
uint32_t VDD_W_CURR_MAX
Definition vsf_template_sdio.h:500
struct vk_romfs_header_t VSF_CAL_PACKED
vsf_sdio_reqop_t
flags of sdio request operations
Definition vsf_template_sdio.h:661
@ SDIO_CMDOP_READ
Definition vsf_template_sdio.h:668
@ SDIO_CMDOP_RESP_BUSY
Definition vsf_template_sdio.h:670
@ SDIO_CMDOP_SINGLE_BLOCK
Definition vsf_template_sdio.h:664
@ __SDIO_CMDOP_RESP
Definition vsf_template_sdio.h:672
@ SDIO_CMDOP_BYTE
Definition vsf_template_sdio.h:662
@ SDIO_CMDOP_STREAM
Definition vsf_template_sdio.h:663
@ SDIO_CMDOP_TRANS_STOP
Definition vsf_template_sdio.h:690
@ __SDIO_CMDOP_RESP_LONG_CRC
Definition vsf_template_sdio.h:675
@ SDIO_CMDOP_WRITE
Definition vsf_template_sdio.h:667
@ __SDIO_CMDOP_RESP_SHORT
Definition vsf_template_sdio.h:673
@ SDIO_CMDOP_CLKHOLD
Definition vsf_template_sdio.h:688
@ SDIO_CMDOP_MULTI_BLOCK
Definition vsf_template_sdio.h:665
@ __SDIO_CMDOP_RESP_SHORT_CRC
Definition vsf_template_sdio.h:674
#define VSF_SDIO_APIS(__prefix)
SDIO API template, used to generate SDIO type, specific prefix function declarations,...
Definition vsf_template_sdio.h:454
void vsf_sdio_isr_handler_t(void *target_ptr, vsf_sdio_t *sdio_ptr, vsf_sdio_irq_mask_t irq_mask, vsf_sdio_reqsts_t status, uint32_t resp[4])
sdio interrupt callback function prototype.
Definition vsf_template_sdio.h:794
vsf_sdio_irq_mask_t
Definition vsf_template_sdio.h:706
@ SDIO_IRQ_MASK_HOST_DATA_DONE
Definition vsf_template_sdio.h:709
@ SDIO_IRQ_MASK_HOST_RESP_DONE
Definition vsf_template_sdio.h:708
@ SDIO_IRQ_MASK_HOST_ALL
Definition vsf_template_sdio.h:711
@ SDIO_IRQ_MASK_HOST_DATA_ABORT
Definition vsf_template_sdio.h:710
struct vsf_sdio_capability_t vsf_sdio_capability_t
vsf_err_t vsf_sdio_host_request(vsf_sdio_t *sdio_ptr, vsf_sdio_req_t *req)
Start a new request for sdio instance.
Definition sdio_common.c:108
vsf_err_t vsf_sdio_set_bus_width(vsf_sdio_t *sdio_ptr, uint8_t bus_width)
Set the bus width of sdio instance.
Definition sdio_common.c:99
void vsf_sdio_irq_enable(vsf_sdio_t *sdio_ptr, vsf_sdio_irq_mask_t irq_mask)
Enable interrupt masks of sdio instance.
Definition sdio_common.c:54
vsf_sdio_capability_t vsf_sdio_capability(vsf_sdio_t *sdio_ptr)
Get the capability of sdio instance.
Definition sdio_common.c:81
vsf_sdio_mode_t
Definition vsf_template_sdio.h:644
@ SDIO_MODE_MASK
Definition vsf_template_sdio.h:647
@ SDIO_MODE_SLAVE
Definition vsf_template_sdio.h:646
@ SDIO_MODE_HOST
Definition vsf_template_sdio.h:645
#define SDIO_RESP_NONE
Definition vsf_template_sdio.h:677
void vsf_sdio_fini(vsf_sdio_t *sdio_ptr)
Finalize a sdio instance.
Definition sdio_common.c:45
vsf_err_t vsf_sdio_set_clock(vsf_sdio_t *sdio_ptr, uint32_t clock_hz, bool is_ddr)
Set the clock of sdio instance.
Definition sdio_common.c:90
struct vsf_sdio_isr_t vsf_sdio_isr_t
sdio interrupt configuration
struct vsf_sdio_status_t vsf_sdio_status_t
vsf_err_t vsf_sdio_single_voltage(vsf_sdio_t *sdio_ptr, uint8_t bus_width)
Set the single voltage mode of sdio instance.
vsf_err_t vsf_sdio_init(vsf_sdio_t *sdio_ptr, vsf_sdio_cfg_t *cfg_ptr)
Initialize a sdio instance.
Definition sdio_common.c:36
void vsf_sdio_irq_disable(vsf_sdio_t *sdio_ptr, vsf_sdio_irq_mask_t irq_mask)
Disable interrupt masks of sdio instance.
Definition sdio_common.c:63
vsf_sdio_status_t vsf_sdio_status(vsf_sdio_t *sdio_ptr)
Get the status of sdio instance.
Definition sdio_common.c:72
#define SDIO_RESP_R1
Definition vsf_template_sdio.h:678
struct vsf_sdio_cfg_t vsf_sdio_cfg_t
sdio configuration
vsf_sdio_reqsts_t
Definition vsf_template_sdio.h:718
@ SDIO_REQSTS_ERR_MASK
Definition vsf_template_sdio.h:725
@ SDIO_REQSTS_BUSY
Definition vsf_template_sdio.h:724
@ SDIO_REQSTS_DATA_BUSY
Definition vsf_template_sdio.h:723
@ SDIO_REQSTS_DONE
Definition vsf_template_sdio.h:719
@ SDIO_REQSTS_ERR_RESP_CRC
Definition vsf_template_sdio.h:721
@ SDIO_REQSTS_ERR_RESP_NONE
Definition vsf_template_sdio.h:720
@ SDIO_REQSTS_ERR_DATA_CRC
Definition vsf_template_sdio.h:722
uint8_t status
Definition vsf_tgui.h:144
Generated from commit: vsfteam/vsf@2b286be