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vsf_template_spi.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __VSF_TEMPLATE_SPI_H__
19#define __VSF_TEMPLATE_SPI_H__
20
21/*============================ INCLUDES ======================================*/
22
23#include "./vsf_template_hal_driver.h"
24#include "hal/arch/vsf_arch.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*============================ MACROS ========================================*/
31
32// multi-class support enabled by default for maximum availability.
33#ifndef VSF_SPI_CFG_MULTI_CLASS
34# define VSF_SPI_CFG_MULTI_CLASS ENABLED
35#endif
36
37#if defined(VSF_HW_SPI_COUNT) && !defined(VSF_HW_SPI_MASK)
38# define VSF_HW_SPI_MASK VSF_HAL_COUNT_TO_MASK(VSF_HW_SPI_COUNT)
39#endif
40
41#if defined(VSF_HW_SPI_MASK) && !defined(VSF_HW_SPI_COUNT)
42# define VSF_HW_SPI_COUNT VSF_HAL_MASK_TO_COUNT(VSF_HW_SPI_MASK)
43#endif
44
45// application code can redefine it
46#ifndef VSF_SPI_CFG_PREFIX
47# if (VSF_SPI_CFG_MULTI_CLASS == DISABLED) && defined(VSF_HW_SPI_COUNT) && (VSF_HW_SPI_COUNT != 0)
48# define VSF_SPI_CFG_PREFIX vsf_hw
49# else
50# define VSF_SPI_CFG_PREFIX vsf
51# endif
52#endif
53
54#ifndef VSF_SPI_CFG_FUNCTION_RENAME
55# define VSF_SPI_CFG_FUNCTION_RENAME ENABLED
56#endif
57
60#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE
61# define VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE DISABLED
62#endif
63
66#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK
67# define VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK DISABLED
68#endif
69
72#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS
73# define VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS DISABLED
74#endif
75
79#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG == DISABLED
80# define VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG DISABLED
81#endif
82
86#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY == DISABLED
87# define VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY DISABLED
88#endif
89
93#ifndef VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS
94# define VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS DISABLED
95#endif
96
100#ifndef VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE
101# define VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE DISABLED
102#endif
103
107#ifndef VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_BYTES
108# define VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_BYTES DISABLED
109#endif
110
111#ifndef VSF_SPI_CFG_INHERT_HAL_CAPABILITY
112# define VSF_SPI_CFG_INHERT_HAL_CAPABILITY ENABLED
113#endif
114
115/*============================ MACROFIED FUNCTIONS ===========================*/
116
117#define VSF_SPI_APIS(__prefix_name) \
118 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, init, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, vsf_spi_cfg_t *cfg_ptr) \
119 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, fini, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
120 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, spi, enable, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
121 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, spi, disable, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
122 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, irq_enable, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, vsf_spi_irq_mask_t irq_mask) \
123 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, irq_disable, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, vsf_spi_irq_mask_t irq_mask) \
124 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_spi_status_t, spi, status, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
125 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_spi_capability_t, spi, capability, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
126 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, cs_active, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, uint_fast8_t index) \
127 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, cs_inactive, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, uint_fast8_t index) \
128 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, fifo_transfer, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, \
129 void *out_buffer_ptr, uint_fast32_t *out_offset_ptr, \
130 void *in_buffer_ptr, uint_fast32_t *in_offset_ptr, uint_fast32_t cnt) \
131 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, request_transfer, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, void *out_buffer_ptr, \
132 void *in_buffer_ptr, uint_fast32_t count) \
133 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, cancel_transfer, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr) \
134 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, get_transferred_count, VSF_MCONNECT(__prefix_name, _spi_t) *spi_ptr, uint_fast32_t * tx_count, uint_fast32_t *rx_count)
135
136
137/*============================ TYPES =========================================*/
138
139#if VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE == DISABLED
187typedef enum vsf_spi_mode_t {
188 VSF_SPI_MASTER = 0x00ul << 0,
189 VSF_SPI_SLAVE = 0x01ul << 0,
190
191 VSF_SPI_MSB_FIRST = 0x00ul << 1,
192 VSF_SPI_LSB_FIRST = 0x01ul << 1,
193
194 // CPOL and CPHA are not recommended to use, not every SPI driver provide this
195 VSF_SPI_CPOL_LOW = 0x00ul << 2,
196 VSF_SPI_CPOL_HIGH = 0x01ul << 2,
197 VSF_SPI_CPHA_LOW = 0x00ul << 2,
198 VSF_SPI_CPHA_HIGH = 0x01ul << 2,
199 // SPI_MODE is recommended
200 VSF_SPI_MODE_0 = VSF_SPI_CPOL_LOW | VSF_SPI_CPHA_LOW,
201 VSF_SPI_MODE_1 = VSF_SPI_CPOL_LOW | VSF_SPI_CPHA_HIGH,
202 VSF_SPI_MODE_2 = VSF_SPI_CPOL_HIGH | VSF_SPI_CPHA_LOW,
203 VSF_SPI_MODE_3 = VSF_SPI_CPOL_HIGH | VSF_SPI_CPHA_HIGH,
204
206 VSF_SPI_CS_SOFTWARE_MODE = 0x00ul << 4,
209 VSF_SPI_CS_HARDWARE_MODE = 0x01ul << 4,
210 /*
211 // Some hardware supports multimaster mode
212 VSF_SPI_CS_HARDWARE_INPUT_MODE = 0x02ul << 4,
213 #define VSF_SPI_CS_HARDWARE_INPUT_MODE VSF_SPI_CS_HARDWARE_INPUT_MODE
214 */
215
216 VSF_SPI_DATASIZE_8 = 0x00ul << 8,
217 VSF_SPI_DATASIZE_16 = 0x01ul << 8,
218 VSF_SPI_DATASIZE_32 = 0x02ul << 8,
219 /*
220 // Some hardware supports more data bits, we can redefine it inside the specific driver
221 VSF_SPI_DATASIZE_VALUE_OFFSET = 1,
222 VSF_SPI_DATASIZE_BIT_OFFSET = 8,
223 VSF_SPI_DATASIZE_4 = ( 4ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
224 VSF_SPI_DATASIZE_5 = ( 5ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
225 VSF_SPI_DATASIZE_6 = ( 6ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
226 VSF_SPI_DATASIZE_7 = ( 7ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
227 VSF_SPI_DATASIZE_8 = ( 8ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
228 VSF_SPI_DATASIZE_9 = ( 9ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
229 VSF_SPI_DATASIZE_10 = (10ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
230 VSF_SPI_DATASIZE_11 = (11ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
231 VSF_SPI_DATASIZE_12 = (12ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
232 VSF_SPI_DATASIZE_13 = (13ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
233 VSF_SPI_DATASIZE_14 = (14ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
234 VSF_SPI_DATASIZE_15 = (15ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
235 VSF_SPI_DATASIZE_16 = (16ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
236 VSF_SPI_DATASIZE_17 = (17ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
237 VSF_SPI_DATASIZE_18 = (18ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
238 VSF_SPI_DATASIZE_19 = (19ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
239 VSF_SPI_DATASIZE_20 = (20ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
240 VSF_SPI_DATASIZE_21 = (21ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
241 VSF_SPI_DATASIZE_22 = (22ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
242 VSF_SPI_DATASIZE_23 = (23ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
243 VSF_SPI_DATASIZE_24 = (24ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
244 VSF_SPI_DATASIZE_25 = (25ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
245 VSF_SPI_DATASIZE_26 = (26ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
246 VSF_SPI_DATASIZE_27 = (27ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
247 VSF_SPI_DATASIZE_28 = (28ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
248 VSF_SPI_DATASIZE_29 = (29ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
249 VSF_SPI_DATASIZE_30 = (30ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
250 VSF_SPI_DATASIZE_31 = (31ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
251 VSF_SPI_DATASIZE_32 = (32ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
252
253 #define VSF_SPI_DATASIZE_BIT_OFFSET VSF_SPI_DATASIZE_BIT_OFFSET
254 #define VSF_SPI_DATASIZE_VALUE_OFFSET VSF_SPI_DATASIZE_VALUE_OFFSET
255 #define VSF_SPI_DATASIZE_4 VSF_SPI_DATASIZE_4
256 #define VSF_SPI_DATASIZE_5 VSF_SPI_DATASIZE_5
257 #define VSF_SPI_DATASIZE_6 VSF_SPI_DATASIZE_6
258 #define VSF_SPI_DATASIZE_7 VSF_SPI_DATASIZE_7
259 #define VSF_SPI_DATASIZE_8 VSF_SPI_DATASIZE_8
260 #define VSF_SPI_DATASIZE_9 VSF_SPI_DATASIZE_9
261 #define VSF_SPI_DATASIZE_10 VSF_SPI_DATASIZE_10
262 #define VSF_SPI_DATASIZE_11 VSF_SPI_DATASIZE_11
263 #define VSF_SPI_DATASIZE_12 VSF_SPI_DATASIZE_12
264 #define VSF_SPI_DATASIZE_13 VSF_SPI_DATASIZE_13
265 #define VSF_SPI_DATASIZE_14 VSF_SPI_DATASIZE_14
266 #define VSF_SPI_DATASIZE_15 VSF_SPI_DATASIZE_15
267 #define VSF_SPI_DATASIZE_16 VSF_SPI_DATASIZE_16
268 #define VSF_SPI_DATASIZE_17 VSF_SPI_DATASIZE_17
269 #define VSF_SPI_DATASIZE_18 VSF_SPI_DATASIZE_18
270 #define VSF_SPI_DATASIZE_19 VSF_SPI_DATASIZE_19
271 #define VSF_SPI_DATASIZE_20 VSF_SPI_DATASIZE_20
272 #define VSF_SPI_DATASIZE_21 VSF_SPI_DATASIZE_21
273 #define VSF_SPI_DATASIZE_22 VSF_SPI_DATASIZE_22
274 #define VSF_SPI_DATASIZE_23 VSF_SPI_DATASIZE_23
275 #define VSF_SPI_DATASIZE_24 VSF_SPI_DATASIZE_24
276 #define VSF_SPI_DATASIZE_25 VSF_SPI_DATASIZE_25
277 #define VSF_SPI_DATASIZE_26 VSF_SPI_DATASIZE_26
278 #define VSF_SPI_DATASIZE_27 VSF_SPI_DATASIZE_27
279 #define VSF_SPI_DATASIZE_28 VSF_SPI_DATASIZE_28
280 #define VSF_SPI_DATASIZE_29 VSF_SPI_DATASIZE_29
281 #define VSF_SPI_DATASIZE_30 VSF_SPI_DATASIZE_30
282 #define VSF_SPI_DATASIZE_31 VSF_SPI_DATASIZE_31
283 #define VSF_SPI_DATASIZE_32 VSF_SPI_DATASIZE_32
284
285 #define VSF_SPI_DATASIZE_MASK ( VSF_SPI_DATASIZE_4 \
286 | VSF_SPI_DATASIZE_5 \
287 | VSF_SPI_DATASIZE_6 \
288 | VSF_SPI_DATASIZE_7 \
289 | VSF_SPI_DATASIZE_8 \
290 | VSF_SPI_DATASIZE_9 \
291 | VSF_SPI_DATASIZE_10 \
292 | VSF_SPI_DATASIZE_11 \
293 | VSF_SPI_DATASIZE_12 \
294 | VSF_SPI_DATASIZE_13 \
295 | VSF_SPI_DATASIZE_14 \
296 | VSF_SPI_DATASIZE_15 \
297 | VSF_SPI_DATASIZE_16 \
298 | VSF_SPI_DATASIZE_17 \
299 | VSF_SPI_DATASIZE_18 \
300 | VSF_SPI_DATASIZE_19 \
301 | VSF_SPI_DATASIZE_20 \
302 | VSF_SPI_DATASIZE_21 \
303 | VSF_SPI_DATASIZE_22 \
304 | VSF_SPI_DATASIZE_23 \
305 | VSF_SPI_DATASIZE_24 \
306 | VSF_SPI_DATASIZE_25 \
307 | VSF_SPI_DATASIZE_26 \
308 | VSF_SPI_DATASIZE_27 \
309 | VSF_SPI_DATASIZE_28 \
310 | VSF_SPI_DATASIZE_29 \
311 | VSF_SPI_DATASIZE_30 \
312 | VSF_SPI_DATASIZE_31 \
313 | VSF_SPI_DATASIZE_32 )
314 */
315 /*
316 // Some hardware supports a different number of data line
317 VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX = (0x00ul << 16), // 2 line, full-duplex, standard spi
318 VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX = (0x01ul << 16), // 1 line, half-duplex
319 VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX = (0x02ul << 16), // 2 line, half-duplex, dual spi
320 VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX = (0x03ul << 16), // 4 line, half-duplex, qual spi
321 VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX = (0x04ul << 16), // 8 line, half-duplex, octal spi
322
323 #define VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX
324 #define VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX
325 #define VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX
326 #define VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX
327 #define VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX
328
329 #define VSF_SPI_DATALINE_MASK ( VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX \
330 | VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX \
331 | VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX \
332 | VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX \
333 | VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX)
334 */
335
336 /*
337 // Some hardware supports TI mode
338 VSF_SPI_MOTORALA_MODE = (0x00 << 20), // SPI, serial peripheral interface
339 VSF_SPI_TI_MODE = (0x01 << 20), // SSI, synchronous serial interface
340 #define VSF_SPI_MOTORALA_MODE VSF_SPI_MOTORALA_MODE
341 #define VSF_SPI_TI_MODE VSF_SPI_TI_MODE
342 #define VSF_SPI_MOTORALA_TI_MASK (VSF_SPI_MOTORALA_MODE | VSF_SPI_TI_MODE)
343 */
344
345 /*
346 // Some hardware supports crc
347 VSF_SPI_CRC_DISABLED = (0x00 << 21),
348 VSF_SPI_CRC_ENABLED = (0x01 << 21),
349 #define VSF_SPI_CRC_DISABLED VSF_SPI_CRC_DISABLED
350 #define VSF_SPI_CRC_ENABLED VSF_SPI_CRC_ENABLED
351 #define VSF_SPI_CRC_MASK (VSF_SPI_CRC_DISABLED | VSF_SPI_CRC_ENABLED)
352 */
353
354 /*
355 // Some hardware supports prescaler
356 VSF_SPI_CLOCK_PRESCLER_2 = (0x00 << 22),
357 VSF_SPI_CLOCK_PRESCLER_4 = (0x01 << 22),
358 VSF_SPI_CLOCK_PRESCLER_8 = (0x02 << 22),
359 VSF_SPI_CLOCK_PRESCLER_16 = (0x03 << 22),
360 VSF_SPI_CLOCK_PRESCLER_32 = (0x04 << 22),
361 VSF_SPI_CLOCK_PRESCLER_64 = (0x05 << 22),
362 VSF_SPI_CLOCK_PRESCLER_128 = (0x06 << 22),
363 VSF_SPI_CLOCK_PRESCLER_256 = (0x07 << 22),
364
365 #define VSF_SPI_CLOCK_PRESCLER_MASK VSF_SPI_CLOCK_PRESCLER_2
366 #define VSF_SPI_CLOCK_PRESCLER_2 VSF_SPI_CLOCK_PRESCLER_2
367 #define VSF_SPI_CLOCK_PRESCLER_4 VSF_SPI_CLOCK_PRESCLER_4
368 #define VSF_SPI_CLOCK_PRESCLER_8 VSF_SPI_CLOCK_PRESCLER_8
369 #define VSF_SPI_CLOCK_PRESCLER_16 VSF_SPI_CLOCK_PRESCLER_16
370 #define VSF_SPI_CLOCK_PRESCLER_32 VSF_SPI_CLOCK_PRESCLER_32
371 #define VSF_SPI_CLOCK_PRESCLER_64 VSF_SPI_CLOCK_PRESCLER_64
372 #define VSF_SPI_CLOCK_PRESCLER_128 VSF_SPI_CLOCK_PRESCLER_128
373 #define VSF_SPI_CLOCK_PRESCLER_256 VSF_SPI_CLOCK_PRESCLER_256
374
375 #define VSF_SPI_CLOCK_PRESCLER_MASK ( VSF_SPI_CLOCK_PRESCLER_2 \
376 | VSF_SPI_CLOCK_PRESCLER_4 \
377 | VSF_SPI_CLOCK_PRESCLER_8 \
378 | VSF_SPI_CLOCK_PRESCLER_16 \
379 | VSF_SPI_CLOCK_PRESCLER_32 \
380 | VSF_SPI_CLOCK_PRESCLER_64 \
381 | VSF_SPI_CLOCK_PRESCLER_128 \
382 | VSF_SPI_CLOCK_PRESCLER_256)
383 */
384} vsf_spi_mode_t;
385#endif
386
387enum {
388 VSF_SPI_DIR_MODE_MASK = VSF_SPI_MASTER
389 | VSF_SPI_SLAVE,
390
391 VSF_SPI_BIT_ORDER_MASK = VSF_SPI_MSB_FIRST
392 | VSF_SPI_LSB_FIRST,
393
394 VSF_SPI_MODE_MASK = VSF_SPI_MODE_0
395 | VSF_SPI_MODE_1
396 | VSF_SPI_MODE_2
397 | VSF_SPI_MODE_3,
398
399#ifndef VSF_SPI_CS_MODE_MASK
400 VSF_SPI_CS_MODE_MASK = VSF_SPI_CS_SOFTWARE_MODE
401 | VSF_SPI_CS_HARDWARE_MODE
402#ifdef VSF_SPI_CS_HARDWARE_INPUT_MODE
403 | VSF_SPI_CS_HARDWARE_INPUT_MODE
404#endif
405 ,
406#endif
407
408#ifndef VSF_SPI_DATASIZE_MASK
409 VSF_SPI_DATASIZE_MASK = VSF_SPI_DATASIZE_8
410 | VSF_SPI_DATASIZE_16
411 | VSF_SPI_DATASIZE_32,
412#endif
413
414 VSF_SPI_MODE_ALL_BITS_MASK = VSF_SPI_DIR_MODE_MASK
415 | VSF_SPI_BIT_ORDER_MASK
416 | VSF_SPI_MODE_MASK
417 | VSF_SPI_DIR_MODE_MASK
418 | VSF_SPI_CS_MODE_MASK
419 | VSF_SPI_DATASIZE_MASK
420#ifdef VSF_SPI_DATALINE_MASK
421 | VSF_SPI_DATALINE_MASK
422#endif
423#ifdef VSF_SPI_MOTORALA_TI_MASK
424 | VSF_SPI_MOTORALA_TI_MASK
425#endif
426#ifdef VSF_SPI_CRC_MASK
427 | VSF_SPI_CRC_MASK
428#endif
429#ifdef VSF_SPI_CLOCK_PRESCLER_MASK
430 | VSF_SPI_CLOCK_PRESCLER_MASK
431#endif
432};
433
434#if VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK == DISABLED
454typedef enum vsf_spi_irq_mask_t {
455 // TX/RX reach fifo threshold, threshold on some devices is bound to 1
456 VSF_SPI_IRQ_MASK_TX = 0x01ul << 0,
457 VSF_SPI_IRQ_MASK_RX = 0x01ul << 1,
458
459 // request_rx/request_tx complete
460 VSF_SPI_IRQ_MASK_TX_CPL = 0x01ul << 2,
461 VSF_SPI_IRQ_MASK_CPL = 0x01ul << 3,
462
463 VSF_SPI_IRQ_MASK_OVERFLOW_ERR = 0x01ul << 4,
464 VSF_SPI_IRQ_MASK_ERROR = 0x01ul << 5,
465} vsf_spi_irq_mask_t;
466#endif
467
468enum {
469 VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD = VSF_SPI_IRQ_MASK_TX,
470 VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD = VSF_SPI_IRQ_MASK_RX,
471
473 VSF_SPI_IRQ_MASK_RX_CPL = VSF_SPI_IRQ_MASK_CPL,
474
475 VSF_SPI_IRQ_ALL_BITS_MASK = VSF_SPI_IRQ_MASK_TX
476 | VSF_SPI_IRQ_MASK_RX
477 | VSF_SPI_IRQ_MASK_TX_CPL
478 | VSF_SPI_IRQ_MASK_CPL
479 | VSF_SPI_IRQ_MASK_OVERFLOW_ERR
480 | VSF_SPI_IRQ_MASK_ERROR,
481};
482
483#if VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS == DISABLED
484typedef struct vsf_spi_status_t {
485 union {
486 inherit(vsf_peripheral_status_t)
487 struct {
488 uint32_t is_busy : 1;
489 };
490 };
491} vsf_spi_status_t;
492#endif
493
494#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY == DISABLED
495typedef struct vsf_spi_capability_t {
496#if VSF_SPI_CFG_INHERT_HAL_CAPABILITY == ENABLED
497 inherit(vsf_peripheral_capability_t)
498#endif
499 vsf_spi_irq_mask_t irq_mask;
500
501 uint8_t support_hardware_cs : 1; // some hardware support
502 uint8_t support_software_cs : 1; // some hardware support
503 uint8_t cs_count : 6;
504
505 uint32_t max_clock_hz;
506 uint32_t min_clock_hz;
507} vsf_spi_capability_t;
508#endif
509
510#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG == DISABLED
511typedef struct vsf_spi_t vsf_spi_t;
512
513typedef void vsf_spi_isr_handler_t(void *target_ptr,
514 vsf_spi_t *spi_ptr,
515 vsf_spi_irq_mask_t irq_mask);
516
518typedef struct vsf_spi_isr_t {
519 vsf_spi_isr_handler_t *handler_fn;
520 void *target_ptr;
521 vsf_arch_prio_t prio;
522} vsf_spi_isr_t;
523
525typedef struct vsf_spi_cfg_t {
526 vsf_spi_mode_t mode;
527 uint32_t clock_hz;
528 vsf_spi_isr_t isr;
529 uint8_t auto_cs_index;
530} vsf_spi_cfg_t;
531#endif
532
533typedef struct vsf_spi_op_t {
534#undef __VSF_HAL_TEMPLATE_API
535#define __VSF_HAL_TEMPLATE_API VSF_HAL_TEMPLATE_API_FP
536
537 VSF_SPI_APIS(vsf)
538} vsf_spi_op_t;
539
540#if VSF_SPI_CFG_MULTI_CLASS == ENABLED
541struct vsf_spi_t {
542 const vsf_spi_op_t * op;
543};
544#endif
545
546/*============================ PROTOTYPES ====================================*/
547
561extern vsf_err_t vsf_spi_init(vsf_spi_t *spi_ptr, vsf_spi_cfg_t *cfg_ptr);
562
575extern void vsf_spi_fini(vsf_spi_t *spi_ptr);
576
588extern fsm_rt_t vsf_spi_enable(vsf_spi_t *spi_ptr);
589
601extern fsm_rt_t vsf_spi_disable(vsf_spi_t *spi_ptr);
602
618extern void vsf_spi_irq_enable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask);
619
633extern void vsf_spi_irq_disable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask);
634
648extern void vsf_spi_cs_active(vsf_spi_t *spi_ptr, uint_fast8_t index);
649
663extern void vsf_spi_cs_inactive(vsf_spi_t *spi_ptr, uint_fast8_t index);
664
676extern vsf_spi_status_t vsf_spi_status(vsf_spi_t *spi_ptr);
677
689extern vsf_spi_capability_t vsf_spi_capability(vsf_spi_t *spi_ptr);
690
712extern void vsf_spi_fifo_transfer(vsf_spi_t *spi_ptr,
713 void *out_buffer_ptr, uint_fast32_t* out_offset_ptr,
714 void *in_buffer_ptr, uint_fast32_t* in_offset_ptr,
715 uint_fast32_t count);
716
740extern vsf_err_t vsf_spi_request_transfer(vsf_spi_t *spi_ptr, void *out_buffer_ptr,
741 void *in_buffer_ptr, uint_fast32_t count);
742
754extern vsf_err_t vsf_spi_cancel_transfer(vsf_spi_t *spi_ptr);
755
771extern void vsf_spi_get_transferred_count(vsf_spi_t *spi_ptr, uint_fast32_t * sent_count, uint_fast32_t *received_count);
772
773
774/*============================ INLINE FUNCTIONS ==============================*/
775
776#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS == ENABLD
777# if defined(VSF_SPI_DATASIZE_BIT_OFFSET) && defined(VSF_SPI_DATASIZE_VALUE_OFFSET)
778static inline uint8_t vsf_spi_mode_to_data_bits(vsf_spi_mode_t mode)
779{
780 int bits = (mode & VSF_SPI_DATASIZE_MASK) >> VSF_SPI_DATASIZE_BIT_OFFSET;
781 return bits + VSF_SPI_DATASIZE_VALUE_OFFSET;
782}
783# else
784static inline uint8_t vsf_spi_mode_to_data_bits(vsf_spi_mode_t mode)
785{
786 uint32_t m = mode & VSF_SPI_DATASIZE_MASK;
787 switch(m) {
788#ifdef VSF_SPI_DATASIZE_4
789 case VSF_SPI_DATASIZE_4:
790 return 4;
791#endif
792#ifdef VSF_SPI_DATASIZE_5
793 case VSF_SPI_DATASIZE_5:
794 return 5;
795#endif
796#ifdef VSF_SPI_DATASIZE_6
797 case VSF_SPI_DATASIZE_6:
798 return 6;
799#endif
800#ifdef VSF_SPI_DATASIZE_7
801 case VSF_SPI_DATASIZE_7:
802 return 7;
803#endif
804 case VSF_SPI_DATASIZE_8:
805 return 8;
806#ifdef VSF_SPI_DATASIZE_9
807 case VSF_SPI_DATASIZE_9:
808 return 9;
809#endif
810#ifdef VSF_SPI_DATASIZE_10
811 case VSF_SPI_DATASIZE_10:
812 return 10;
813#endif
814#ifdef VSF_SPI_DATASIZE_11
815 case VSF_SPI_DATASIZE_11:
816 return 11;
817#endif
818#ifdef VSF_SPI_DATASIZE_12
819 case VSF_SPI_DATASIZE_12:
820 return 12;
821#endif
822#ifdef VSF_SPI_DATASIZE_13
823 case VSF_SPI_DATASIZE_13:
824 return 13;
825#endif
826#ifdef VSF_SPI_DATASIZE_14
827 case VSF_SPI_DATASIZE_14:
828 return 14;
829#endif
830#ifdef VSF_SPI_DATASIZE_15
831 case VSF_SPI_DATASIZE_15:
832 return 15;
833#endif
834 case VSF_SPI_DATASIZE_16:
835 return 16;
836#ifdef VSF_SPI_DATASIZE_17
837 case VSF_SPI_DATASIZE_17:
838 return 17;
839#endif
840#ifdef VSF_SPI_DATASIZE_18
841 case VSF_SPI_DATASIZE_18:
842 return 18;
843#endif
844#ifdef VSF_SPI_DATASIZE_19
845 case VSF_SPI_DATASIZE_19:
846 return 19;
847#endif
848#ifdef VSF_SPI_DATASIZE_20
849 case VSF_SPI_DATASIZE_20:
850 return 20;
851#endif
852#ifdef VSF_SPI_DATASIZE_21
853 case VSF_SPI_DATASIZE_21:
854 return 21;
855#endif
856#ifdef VSF_SPI_DATASIZE_22
857 case VSF_SPI_DATASIZE_22:
858 return 22;
859#endif
860#ifdef VSF_SPI_DATASIZE_23
861 case VSF_SPI_DATASIZE_23:
862 return 23;
863#endif
864#ifdef VSF_SPI_DATASIZE_24
865 case VSF_SPI_DATASIZE_24:
866 return 24;
867#endif
868#ifdef VSF_SPI_DATASIZE_25
869 case VSF_SPI_DATASIZE_25:
870 return 25;
871#endif
872#ifdef VSF_SPI_DATASIZE_26
873 case VSF_SPI_DATASIZE_26:
874 return 26;
875#endif
876#ifdef VSF_SPI_DATASIZE_27
877 case VSF_SPI_DATASIZE_27:
878 return 27;
879#endif
880#ifdef VSF_SPI_DATASIZE_28
881 case VSF_SPI_DATASIZE_28:
882 return 28;
883#endif
884#ifdef VSF_SPI_DATASIZE_29
885 case VSF_SPI_DATASIZE_29:
886 return 29;
887#endif
888#ifdef VSF_SPI_DATASIZE_30
889 case VSF_SPI_DATASIZE_30:
890 return 30;
891#endif
892#ifdef VSF_SPI_DATASIZE_31
893 case VSF_SPI_DATASIZE_31:
894 return 31;
895#endif
896 case VSF_SPI_DATASIZE_32:
897 return 32;
898 default:
899 return 0;
900 }
901}
902# endif
903#endif
904
905#if VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE == ENABLD
906# if defined(VSF_SPI_DATASIZE_BIT_OFFSET) && defined(VSF_SPI_DATASIZE_VALUE_OFFSET)
907static inline vsf_spi_mode_t vsf_spi_data_bits_to_mode(uint8_t bits)
908{
909 return (vsf_spi_mode_t)((bits - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET);
910}
911# else
912static inline vsf_spi_mode_t vsf_spi_data_bits_to_mode(uint8_t bit)
913{
914 switch (bit) {
915#ifdef VSF_SPI_DATASIZE_4
916 case 4:
917 return VSF_SPI_DATASIZE_4;
918#endif
919#ifdef VSF_SPI_DATASIZE_5
920 case 5:
921 return VSF_SPI_DATASIZE_5;
922#endif
923#ifdef VSF_SPI_DATASIZE_6
924 case 6:
925 return VSF_SPI_DATASIZE_6;
926#endif
927#ifdef VSF_SPI_DATASIZE_7
928 case 7:
929 return VSF_SPI_DATASIZE_7;
930#endif
931 case 8:
932 return VSF_SPI_DATASIZE_8;
933#ifdef VSF_SPI_DATASIZE_9
934 case 9:
935 return VSF_SPI_DATASIZE_9;
936#endif
937#ifdef VSF_SPI_DATASIZE_10
938 case 10:
939 return VSF_SPI_DATASIZE_10;
940#endif
941#ifdef VSF_SPI_DATASIZE_11
942 case 11:
943 return VSF_SPI_DATASIZE_11;
944#endif
945#ifdef VSF_SPI_DATASIZE_12
946 case 12:
947 return VSF_SPI_DATASIZE_12;
948#endif
949#ifdef VSF_SPI_DATASIZE_13
950 case 13:
951 return VSF_SPI_DATASIZE_13;
952#endif
953#ifdef VSF_SPI_DATASIZE_14
954 case 14:
955 return VSF_SPI_DATASIZE_14;
956#endif
957#ifdef VSF_SPI_DATASIZE_15
958 case 15:
959 return VSF_SPI_DATASIZE_15;
960#endif
961 case 16:
962 return VSF_SPI_DATASIZE_16;
963#ifdef VSF_SPI_DATASIZE_17
964 case 17:
965 return VSF_SPI_DATASIZE_17;
966#endif
967#ifdef VSF_SPI_DATASIZE_18
968 case 18:
969 return VSF_SPI_DATASIZE_18;
970#endif
971#ifdef VSF_SPI_DATASIZE_19
972 case 19:
973 return VSF_SPI_DATASIZE_19;
974#endif
975#ifdef VSF_SPI_DATASIZE_20
976 case 20:
977 return VSF_SPI_DATASIZE_20;
978#endif
979#ifdef VSF_SPI_DATASIZE_21
980 case 21:
981 return VSF_SPI_DATASIZE_21;
982#endif
983#ifdef VSF_SPI_DATASIZE_22
984 case 22:
985 return VSF_SPI_DATASIZE_22;
986#endif
987#ifdef VSF_SPI_DATASIZE_23
988 case 23:
989 return VSF_SPI_DATASIZE_23;
990#endif
991#ifdef VSF_SPI_DATASIZE_24
992 case 24:
993 return VSF_SPI_DATASIZE_24;
994#endif
995#ifdef VSF_SPI_DATASIZE_25
996 case 25:
997 return VSF_SPI_DATASIZE_25;
998#endif
999#ifdef VSF_SPI_DATASIZE_26
1000 case 26:
1001 return VSF_SPI_DATASIZE_26;
1002#endif
1003#ifdef VSF_SPI_DATASIZE_27
1004 case 27:
1005 return VSF_SPI_DATASIZE_27;
1006#endif
1007#ifdef VSF_SPI_DATASIZE_28
1008 case 28:
1009 return VSF_SPI_DATASIZE_28;
1010#endif
1011#ifdef VSF_SPI_DATASIZE_29
1012 case 29:
1013 return VSF_SPI_DATASIZE_29;
1014#endif
1015#ifdef VSF_SPI_DATASIZE_30
1016 case 30:
1017 return VSF_SPI_DATASIZE_30;
1018#endif
1019#ifdef VSF_SPI_DATASIZE_31
1020 case 31:
1021 return VSF_SPI_DATASIZE_31;
1022#endif
1023 case 32:
1024 return VSF_SPI_DATASIZE_32;
1025 default:
1026 return (vsf_spi_mode_t)0;
1027 }
1028}
1029# endif
1030#endif
1031
1032#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES == ENABLD
1033static inline uint8_t vsf_spi_mode_to_data_bytes(vsf_spi_mode_t mode)
1034{
1035 int bits = (mode & VSF_SPI_DATASIZE_MASK);
1036 if (bits <= VSF_SPI_DATASIZE_8) {
1037 return 1;
1038 } else if (bits <= VSF_SPI_DATASIZE_16) {
1039 return 2;
1040 } else {
1041 return 4;
1042 }
1043}
1044#endif
1045
1046/*============================ MACROFIED FUNCTIONS ===========================*/
1047
1048#if VSF_SPI_CFG_FUNCTION_RENAME == ENABLED
1049# define __vsf_spi_t VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_t)
1050# define vsf_spi_init(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_init) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1051# define vsf_spi_enable(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_enable) ((__vsf_spi_t *)(__SPI))
1052# define vsf_spi_disable(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_disable) ((__vsf_spi_t *)(__SPI))
1053# define vsf_spi_irq_enable(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_irq_enable) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1054# define vsf_spi_irq_disable(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_irq_disable) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1055# define vsf_spi_status(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_status) ((__vsf_spi_t *)(__SPI))
1056# define vsf_spi_capability(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_capability) ((__vsf_spi_t *)(__SPI))
1057# define vsf_spi_cs_active(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cs_active) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1058# define vsf_spi_cs_inactive(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cs_inactive) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1059# define vsf_spi_fifo_transfer(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_fifo_transfer) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1060# define vsf_spi_request_transfer(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_request_transfer) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1061# define vsf_spi_cancel_transfer(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cancel_transfer) ((__vsf_spi_t *)(__SPI))
1062# define vsf_spi_get_transferred_count(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_get_transferred_count) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1063#endif
1064
1065#ifdef __cplusplus
1066}
1067#endif
1068
1069#endif /*__VSF_TEMPLATE_SPI_H__*/
1070
vsf_err_t
vsf_err_t
Definition __type.h:42
vsf_spi_mode_t
vsf_spi_mode_t
Definition spi.h:33
VSF_SPI_DATASIZE_31
@ VSF_SPI_DATASIZE_31
Definition spi.h:67
VSF_SPI_DATASIZE_28
@ VSF_SPI_DATASIZE_28
Definition spi.h:64
VSF_SPI_DATASIZE_6
@ VSF_SPI_DATASIZE_6
Definition spi.h:98
VSF_SPI_DATASIZE_17
@ VSF_SPI_DATASIZE_17
Definition spi.h:53
VSF_SPI_DATASIZE_9
@ VSF_SPI_DATASIZE_9
Definition spi.h:45
VSF_SPI_DATASIZE_18
@ VSF_SPI_DATASIZE_18
Definition spi.h:54
VSF_SPI_DATASIZE_11
@ VSF_SPI_DATASIZE_11
Definition spi.h:47
VSF_SPI_DATASIZE_20
@ VSF_SPI_DATASIZE_20
Definition spi.h:56
VSF_SPI_DATASIZE_21
@ VSF_SPI_DATASIZE_21
Definition spi.h:57
VSF_SPI_DATASIZE_27
@ VSF_SPI_DATASIZE_27
Definition spi.h:63
VSF_SPI_DATASIZE_14
@ VSF_SPI_DATASIZE_14
Definition spi.h:50
VSF_SPI_DATASIZE_BIT_OFFSET
@ VSF_SPI_DATASIZE_BIT_OFFSET
Definition spi.h:42
VSF_SPI_DATASIZE_26
@ VSF_SPI_DATASIZE_26
Definition spi.h:62
VSF_SPI_DATASIZE_13
@ VSF_SPI_DATASIZE_13
Definition spi.h:49
VSF_SPI_DATASIZE_7
@ VSF_SPI_DATASIZE_7
Definition spi.h:99
VSF_SPI_DATASIZE_5
@ VSF_SPI_DATASIZE_5
Definition spi.h:97
VSF_SPI_DATASIZE_12
@ VSF_SPI_DATASIZE_12
Definition spi.h:48
VSF_SPI_DATASIZE_22
@ VSF_SPI_DATASIZE_22
Definition spi.h:58
VSF_SPI_DATASIZE_24
@ VSF_SPI_DATASIZE_24
Definition spi.h:60
VSF_SPI_DATASIZE_4
@ VSF_SPI_DATASIZE_4
datasize is 8 bits
Definition spi.h:96
VSF_SPI_DATASIZE_29
@ VSF_SPI_DATASIZE_29
Definition spi.h:65
VSF_SPI_DATASIZE_25
@ VSF_SPI_DATASIZE_25
Definition spi.h:61
VSF_SPI_DATASIZE_30
@ VSF_SPI_DATASIZE_30
Definition spi.h:66
VSF_SPI_DATASIZE_19
@ VSF_SPI_DATASIZE_19
Definition spi.h:55
VSF_SPI_DATASIZE_23
@ VSF_SPI_DATASIZE_23
Definition spi.h:59
VSF_SPI_DATASIZE_10
@ VSF_SPI_DATASIZE_10
Definition spi.h:46
VSF_SPI_DATASIZE_15
@ VSF_SPI_DATASIZE_15
Definition spi.h:51
vsf_arch_prio_t
vsf_arch_prio_t
Definition cortex_a_generic.h:88
uint32_t
unsigned int uint32_t
Definition lvgl.h:43
uint8_t
unsigned char uint8_t
Definition lvgl.h:40
irq_mask
const i_spi_t vsf_spi_irq_mask_t irq_mask
Definition spi_interface.h:38
uint_fast8_t
unsigned char uint_fast8_t
Definition stdint.h:23
uint_fast32_t
unsigned int uint_fast32_t
Definition stdint.h:27
vsf_peripheral_capability_t
Definition vsf_template_hal_driver.h:203
vsf_peripheral_status_t
Definition vsf_template_hal_driver.h:196
vsf_spi_capability_t
Definition vsf_template_spi.h:495
vsf_spi_capability_t::support_software_cs
uint8_t support_software_cs
Definition vsf_template_spi.h:502
vsf_spi_capability_t::max_clock_hz
uint32_t max_clock_hz
Definition vsf_template_spi.h:505
vsf_spi_capability_t::cs_count
uint8_t cs_count
Definition vsf_template_spi.h:503
vsf_spi_capability_t::support_hardware_cs
uint8_t support_hardware_cs
Definition vsf_template_spi.h:501
vsf_spi_capability_t::min_clock_hz
uint32_t min_clock_hz
Definition vsf_template_spi.h:506
vsf_spi_capability_t::inherit
inherit(vsf_peripheral_capability_t) vsf_spi_irq_mask_t irq_mask
vsf_spi_cfg_t
spi configuration for api
Definition vsf_template_spi.h:525
vsf_spi_cfg_t::clock_hz
uint32_t clock_hz
Definition vsf_template_spi.h:527
vsf_spi_cfg_t::isr
vsf_spi_isr_t isr
Definition vsf_template_spi.h:528
vsf_spi_cfg_t::mode
vsf_spi_mode_t mode
spi working mode
Definition vsf_template_spi.h:526
vsf_spi_cfg_t::auto_cs_index
uint8_t auto_cs_index
spi auto chip select of pin when multiple cs are supported
Definition vsf_template_spi.h:529
vsf_spi_isr_t
spi isr for api
Definition vsf_template_spi.h:518
vsf_spi_isr_t::handler_fn
vsf_spi_isr_handler_t * handler_fn
Definition vsf_template_spi.h:519
vsf_spi_isr_t::target_ptr
void * target_ptr
Definition vsf_template_spi.h:520
vsf_spi_isr_t::prio
vsf_arch_prio_t prio
Definition vsf_template_spi.h:521
vsf_spi_op_t
Definition vsf_template_spi.h:533
vsf_spi_status_t
Definition vsf_template_spi.h:484
vsf_spi_t
Definition vsf_template_spi.h:541
vsf_spi_t::op
const vsf_spi_op_t * op
Definition vsf_template_spi.h:542
vsf_arch.h
fsm_rt_t
fsm_rt_t
Definition vsf_fsm.h:315
vsf_template_hal_driver.h
vsf_spi_cs_inactive
#define vsf_spi_cs_inactive(__SPI,...)
Definition vsf_template_spi.h:1058
VSF_SPI_IRQ_MASK_RX_CPL
@ VSF_SPI_IRQ_MASK_RX_CPL
For SPI transfers, send completion is definitely earlier than receive completion.
Definition vsf_template_spi.h:473
VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD
@ VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD
Definition vsf_template_spi.h:469
VSF_SPI_IRQ_ALL_BITS_MASK
@ VSF_SPI_IRQ_ALL_BITS_MASK
Definition vsf_template_spi.h:475
VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD
@ VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD
Definition vsf_template_spi.h:470
vsf_spi_get_transferred_count
#define vsf_spi_get_transferred_count(__SPI,...)
Definition vsf_template_spi.h:1062
vsf_spi_cs_active
#define vsf_spi_cs_active(__SPI,...)
Definition vsf_template_spi.h:1057
vsf_spi_isr_handler_t
void vsf_spi_isr_handler_t(void *target_ptr, vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Definition vsf_template_spi.h:513
vsf_spi_capability_t
struct vsf_spi_capability_t vsf_spi_capability_t
VSF_SPI_APIS
#define VSF_SPI_APIS(__prefix_name)
Definition vsf_template_spi.h:117
vsf_spi_status
#define vsf_spi_status(__SPI)
Definition vsf_template_spi.h:1055
vsf_spi_init
#define vsf_spi_init(__SPI,...)
Definition vsf_template_spi.h:1050
vsf_spi_irq_disable
#define vsf_spi_irq_disable(__SPI,...)
Definition vsf_template_spi.h:1054
vsf_spi_capability
#define vsf_spi_capability(__SPI)
Definition vsf_template_spi.h:1056
vsf_spi_irq_enable
#define vsf_spi_irq_enable(__SPI,...)
Definition vsf_template_spi.h:1053
vsf_spi_irq_mask_t
vsf_spi_irq_mask_t
Predefined VSF SPI interrupt that can be reimplemented in specific hal drivers.
Definition vsf_template_spi.h:454
VSF_SPI_IRQ_MASK_OVERFLOW_ERR
@ VSF_SPI_IRQ_MASK_OVERFLOW_ERR
Definition vsf_template_spi.h:463
VSF_SPI_IRQ_MASK_CPL
@ VSF_SPI_IRQ_MASK_CPL
Definition vsf_template_spi.h:461
VSF_SPI_IRQ_MASK_RX
@ VSF_SPI_IRQ_MASK_RX
Definition vsf_template_spi.h:457
VSF_SPI_IRQ_MASK_TX
@ VSF_SPI_IRQ_MASK_TX
Definition vsf_template_spi.h:456
VSF_SPI_IRQ_MASK_ERROR
@ VSF_SPI_IRQ_MASK_ERROR
Definition vsf_template_spi.h:464
VSF_SPI_IRQ_MASK_TX_CPL
@ VSF_SPI_IRQ_MASK_TX_CPL
Definition vsf_template_spi.h:460
vsf_spi_cancel_transfer
#define vsf_spi_cancel_transfer(__SPI)
Definition vsf_template_spi.h:1061
vsf_spi_request_transfer
#define vsf_spi_request_transfer(__SPI,...)
Definition vsf_template_spi.h:1060
vsf_spi_status_t
struct vsf_spi_status_t vsf_spi_status_t
vsf_spi_mode_t
vsf_spi_mode_t
Predefined VSF SPI modes that can be reimplemented in specific hal drivers.
Definition vsf_template_spi.h:187
VSF_SPI_CPHA_LOW
@ VSF_SPI_CPHA_LOW
SCK clock phase is low.
Definition vsf_template_spi.h:197
VSF_SPI_SLAVE
@ VSF_SPI_SLAVE
select slave mode
Definition vsf_template_spi.h:189
VSF_SPI_DATASIZE_16
@ VSF_SPI_DATASIZE_16
Definition vsf_template_spi.h:217
VSF_SPI_LSB_FIRST
@ VSF_SPI_LSB_FIRST
transfer LSB first
Definition vsf_template_spi.h:192
VSF_SPI_CPOL_HIGH
@ VSF_SPI_CPOL_HIGH
SCK clock polarity is high.
Definition vsf_template_spi.h:196
VSF_SPI_MODE_1
@ VSF_SPI_MODE_1
Definition vsf_template_spi.h:201
VSF_SPI_DATASIZE_8
@ VSF_SPI_DATASIZE_8
Definition vsf_template_spi.h:216
VSF_SPI_MASTER
@ VSF_SPI_MASTER
select master mode
Definition vsf_template_spi.h:188
VSF_SPI_CPHA_HIGH
@ VSF_SPI_CPHA_HIGH
SCK clock phase is high.
Definition vsf_template_spi.h:198
VSF_SPI_MSB_FIRST
@ VSF_SPI_MSB_FIRST
default enable MSB
Definition vsf_template_spi.h:191
VSF_SPI_DATASIZE_32
@ VSF_SPI_DATASIZE_32
Definition vsf_template_spi.h:218
VSF_SPI_CS_SOFTWARE_MODE
@ VSF_SPI_CS_SOFTWARE_MODE
SCK Chip Select by software(vsf_spi_cs_active/vsf_spi_cs_inactive)
Definition vsf_template_spi.h:206
VSF_SPI_MODE_0
@ VSF_SPI_MODE_0
Definition vsf_template_spi.h:200
VSF_SPI_CS_HARDWARE_MODE
@ VSF_SPI_CS_HARDWARE_MODE
Definition vsf_template_spi.h:209
VSF_SPI_MODE_3
@ VSF_SPI_MODE_3
Definition vsf_template_spi.h:203
VSF_SPI_CPOL_LOW
@ VSF_SPI_CPOL_LOW
SCK clock polarity is low.
Definition vsf_template_spi.h:195
VSF_SPI_MODE_2
@ VSF_SPI_MODE_2
Definition vsf_template_spi.h:202
vsf_spi_enable
#define vsf_spi_enable(__SPI)
Definition vsf_template_spi.h:1051
vsf_spi_disable
#define vsf_spi_disable(__SPI)
Definition vsf_template_spi.h:1052
vsf_spi_fifo_transfer
#define vsf_spi_fifo_transfer(__SPI,...)
Definition vsf_template_spi.h:1059
vsf_spi_fini
void vsf_spi_fini(vsf_spi_t *spi_ptr)
finalize a spi instance.
Definition spi_common.c:47
VSF_SPI_MODE_MASK
@ VSF_SPI_MODE_MASK
Definition vsf_template_spi.h:394
VSF_SPI_BIT_ORDER_MASK
@ VSF_SPI_BIT_ORDER_MASK
Definition vsf_template_spi.h:391
VSF_SPI_DIR_MODE_MASK
@ VSF_SPI_DIR_MODE_MASK
Definition vsf_template_spi.h:388
VSF_SPI_CS_MODE_MASK
@ VSF_SPI_CS_MODE_MASK
Definition vsf_template_spi.h:400
VSF_SPI_MODE_ALL_BITS_MASK
@ VSF_SPI_MODE_ALL_BITS_MASK
Definition vsf_template_spi.h:414
VSF_SPI_DATASIZE_MASK
@ VSF_SPI_DATASIZE_MASK
Definition vsf_template_spi.h:409
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