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vsf_template_spi.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __VSF_TEMPLATE_SPI_H__
19#define __VSF_TEMPLATE_SPI_H__
20
21/*============================ INCLUDES ======================================*/
22
23#include "./vsf_template_hal_driver.h"
24#include "hal/arch/vsf_arch.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*============================ MACROS ========================================*/
31
39#ifndef VSF_SPI_CFG_MULTI_CLASS
40# define VSF_SPI_CFG_MULTI_CLASS ENABLED
41#endif
42
50#if defined(VSF_HW_SPI_COUNT) && !defined(VSF_HW_SPI_MASK)
51# define VSF_HW_SPI_MASK VSF_HAL_COUNT_TO_MASK(VSF_HW_SPI_COUNT)
52#endif
53
61#if defined(VSF_HW_SPI_MASK) && !defined(VSF_HW_SPI_COUNT)
62# define VSF_HW_SPI_COUNT VSF_HAL_MASK_TO_COUNT(VSF_HW_SPI_MASK)
63#endif
64
73#ifndef VSF_SPI_CFG_PREFIX
74# if VSF_SPI_CFG_MULTI_CLASS == ENABLED
75# define VSF_SPI_CFG_PREFIX vsf
76# elif defined(VSF_HW_SPI_COUNT) && (VSF_HW_SPI_COUNT != 0)
77# define VSF_SPI_CFG_PREFIX vsf_hw
78# else
79# define VSF_SPI_CFG_PREFIX vsf
80# endif
81#endif
82
91#ifndef VSF_SPI_CFG_FUNCTION_RENAME
92# define VSF_SPI_CFG_FUNCTION_RENAME ENABLED
93#endif
94
103#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE
104# define VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE DISABLED
105#endif
106
116#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK
117# define VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK DISABLED
118#endif
119
129#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS
130# define VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS DISABLED
131#endif
132
145#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG
146# define VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG DISABLED
147#endif
148
158#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_CTRL
159# define VSF_SPI_CFG_REIMPLEMENT_TYPE_CTRL DISABLED
160#endif
161
172#ifndef VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY
173# define VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY DISABLED
174#endif
175
185#ifndef VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS
186# define VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS DISABLED
187#endif
188
198#ifndef VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE
199# define VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE DISABLED
200#endif
201
211#ifndef VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES
212# define VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES DISABLED
213#endif
214
224#ifndef VSF_SPI_CFG_INHERIT_HAL_CAPABILITY
225# define VSF_SPI_CFG_INHERIT_HAL_CAPABILITY ENABLED
226#endif
227
228/*============================ MACROFIED FUNCTIONS ===========================*/
229
238#define VSF_SPI_APIS(__prefix_name) \
239 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, init, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, vsf_spi_cfg_t *cfg_ptr) \
240 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, fini, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
241 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, get_configuration, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, vsf_spi_cfg_t *cfg_ptr) \
242 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, spi, enable, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
243 __VSF_HAL_TEMPLATE_API(__prefix_name, fsm_rt_t, spi, disable, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
244 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, irq_enable, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, vsf_spi_irq_mask_t irq_mask) \
245 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, irq_disable, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, vsf_spi_irq_mask_t irq_mask) \
246 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_spi_status_t, spi, status, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
247 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_spi_capability_t, spi, capability, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
248 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, cs_active, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, uint_fast8_t index) \
249 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, cs_inactive, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, uint_fast8_t index) \
250 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, fifo_transfer, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, void *out_buffer_ptr, uint_fast32_t *out_offset_ptr, void *in_buffer_ptr, uint_fast32_t *in_offset_ptr, uint_fast32_t cnt) \
251 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, request_transfer, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, void *out_buffer_ptr, void *in_buffer_ptr, uint_fast32_t count) \
252 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, cancel_transfer, VSF_MCONNECT(__prefix_name, _t) *spi_ptr) \
253 __VSF_HAL_TEMPLATE_API(__prefix_name, void, spi, get_transferred_count, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, uint_fast32_t * sent_count, uint_fast32_t *received_count) \
254 __VSF_HAL_TEMPLATE_API(__prefix_name, vsf_err_t, spi, ctrl, VSF_MCONNECT(__prefix_name, _t) *spi_ptr, vsf_spi_ctrl_t ctrl, void* param)
255
256
257/*============================ TYPES =========================================*/
258
259#if VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE == DISABLED
295typedef enum vsf_spi_mode_t {
296 // Direction control (bit 0)
297 VSF_SPI_MASTER = 0x00ul << 0,
298 VSF_SPI_SLAVE = 0x01ul << 0,
299
300 // Bit order control (bit 1)
301 VSF_SPI_MSB_FIRST = 0x00ul << 1,
302 VSF_SPI_LSB_FIRST = 0x01ul << 1,
303
304 // Clock polarity control (bit 2)
305 VSF_SPI_CPOL_LOW = 0x00ul << 2,
306 VSF_SPI_CPOL_HIGH = 0x01ul << 2,
307
308 // Clock phase control (bit 3)
309 VSF_SPI_CPHA_LOW = 0x00ul << 3,
310 VSF_SPI_CPHA_HIGH = 0x01ul << 3,
311
312 VSF_SPI_MODE_0 = VSF_SPI_CPOL_LOW | VSF_SPI_CPHA_LOW,
313 VSF_SPI_MODE_1 = VSF_SPI_CPOL_LOW | VSF_SPI_CPHA_HIGH,
314 VSF_SPI_MODE_2 = VSF_SPI_CPOL_HIGH | VSF_SPI_CPHA_LOW,
315 VSF_SPI_MODE_3 = VSF_SPI_CPOL_HIGH | VSF_SPI_CPHA_HIGH,
316
317 // Chip select control (bit 4)
318 // \~english Software controlled chip select. The user must manually call vsf_spi_cs_active() and vsf_spi_cs_inactive() to control the CS line.
319 // \~chinese 软件控制片选。用户必须手动调用 vsf_spi_cs_active() 和 vsf_spi_cs_inactive() 来控制片选线。
320 VSF_SPI_CS_SOFTWARE_MODE = 0x00ul << 4,
321 // \~english Hardware controlled chip select. The hardware automatically controls the CS line specified by `auto_cs_index` during a transfer.
322 // \~chinese 硬件控制片选。硬件在传输期间自动控制由 `auto_cs_index` 指定的片选线。
323 VSF_SPI_CS_HARDWARE_MODE = 0x01ul << 4,
324
325 // Data size control (bits 8-15)
326 VSF_SPI_DATASIZE_8 = 0x00ul << 8,
327 VSF_SPI_DATASIZE_16 = 0x01ul << 8,
328 VSF_SPI_DATASIZE_32 = 0x02ul << 8,
329 /*
332 VSF_SPI_DATASIZE_VALUE_OFFSET = 1,
333 VSF_SPI_DATASIZE_BIT_OFFSET = 8,
334 VSF_SPI_DATASIZE_4 = ( 4ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
335 VSF_SPI_DATASIZE_5 = ( 5ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
336 VSF_SPI_DATASIZE_6 = ( 6ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
337 VSF_SPI_DATASIZE_7 = ( 7ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
338 VSF_SPI_DATASIZE_8 = ( 8ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
339 VSF_SPI_DATASIZE_9 = ( 9ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
340 VSF_SPI_DATASIZE_10 = (10ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
341 VSF_SPI_DATASIZE_11 = (11ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
342 VSF_SPI_DATASIZE_12 = (12ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
343 VSF_SPI_DATASIZE_13 = (13ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
344 VSF_SPI_DATASIZE_14 = (14ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
345 VSF_SPI_DATASIZE_15 = (15ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
346 VSF_SPI_DATASIZE_16 = (16ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
347 VSF_SPI_DATASIZE_17 = (17ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
348 VSF_SPI_DATASIZE_18 = (18ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
349 VSF_SPI_DATASIZE_19 = (19ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
350 VSF_SPI_DATASIZE_20 = (20ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
351 VSF_SPI_DATASIZE_21 = (21ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
352 VSF_SPI_DATASIZE_22 = (22ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
353 VSF_SPI_DATASIZE_23 = (23ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
354 VSF_SPI_DATASIZE_24 = (24ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
355 VSF_SPI_DATASIZE_25 = (25ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
356 VSF_SPI_DATASIZE_26 = (26ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
357 VSF_SPI_DATASIZE_27 = (27ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
358 VSF_SPI_DATASIZE_28 = (28ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
359 VSF_SPI_DATASIZE_29 = (29ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
360 VSF_SPI_DATASIZE_30 = (30ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
361 VSF_SPI_DATASIZE_31 = (31ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
362 VSF_SPI_DATASIZE_32 = (32ul - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET,
363 #define VSF_SPI_DATASIZE_BIT_OFFSET VSF_SPI_DATASIZE_BIT_OFFSET
364 #define VSF_SPI_DATASIZE_VALUE_OFFSET VSF_SPI_DATASIZE_VALUE_OFFSET
365 #define VSF_SPI_DATASIZE_4 VSF_SPI_DATASIZE_4
366 #define VSF_SPI_DATASIZE_5 VSF_SPI_DATASIZE_5
367 #define VSF_SPI_DATASIZE_6 VSF_SPI_DATASIZE_6
368 #define VSF_SPI_DATASIZE_7 VSF_SPI_DATASIZE_7
369 #define VSF_SPI_DATASIZE_8 VSF_SPI_DATASIZE_8
370 #define VSF_SPI_DATASIZE_9 VSF_SPI_DATASIZE_9
371 #define VSF_SPI_DATASIZE_10 VSF_SPI_DATASIZE_10
372 #define VSF_SPI_DATASIZE_11 VSF_SPI_DATASIZE_11
373 #define VSF_SPI_DATASIZE_12 VSF_SPI_DATASIZE_12
374 #define VSF_SPI_DATASIZE_13 VSF_SPI_DATASIZE_13
375 #define VSF_SPI_DATASIZE_14 VSF_SPI_DATASIZE_14
376 #define VSF_SPI_DATASIZE_15 VSF_SPI_DATASIZE_15
377 #define VSF_SPI_DATASIZE_16 VSF_SPI_DATASIZE_16
378 #define VSF_SPI_DATASIZE_17 VSF_SPI_DATASIZE_17
379 #define VSF_SPI_DATASIZE_18 VSF_SPI_DATASIZE_18
380 #define VSF_SPI_DATASIZE_19 VSF_SPI_DATASIZE_19
381 #define VSF_SPI_DATASIZE_20 VSF_SPI_DATASIZE_20
382 #define VSF_SPI_DATASIZE_21 VSF_SPI_DATASIZE_21
383 #define VSF_SPI_DATASIZE_22 VSF_SPI_DATASIZE_22
384 #define VSF_SPI_DATASIZE_23 VSF_SPI_DATASIZE_23
385 #define VSF_SPI_DATASIZE_24 VSF_SPI_DATASIZE_24
386 #define VSF_SPI_DATASIZE_25 VSF_SPI_DATASIZE_25
387 #define VSF_SPI_DATASIZE_26 VSF_SPI_DATASIZE_26
388 #define VSF_SPI_DATASIZE_27 VSF_SPI_DATASIZE_27
389 #define VSF_SPI_DATASIZE_28 VSF_SPI_DATASIZE_28
390 #define VSF_SPI_DATASIZE_29 VSF_SPI_DATASIZE_29
391 #define VSF_SPI_DATASIZE_30 VSF_SPI_DATASIZE_30
392 #define VSF_SPI_DATASIZE_31 VSF_SPI_DATASIZE_31
393 #define VSF_SPI_DATASIZE_32 VSF_SPI_DATASIZE_32
394 #define VSF_SPI_DATASIZE_MASK ( VSF_SPI_DATASIZE_4 \
395 | VSF_SPI_DATASIZE_5 \
396 | VSF_SPI_DATASIZE_6 \
397 | VSF_SPI_DATASIZE_7 \
398 | VSF_SPI_DATASIZE_8 \
399 | VSF_SPI_DATASIZE_9 \
400 | VSF_SPI_DATASIZE_10 \
401 | VSF_SPI_DATASIZE_11 \
402 | VSF_SPI_DATASIZE_12 \
403 | VSF_SPI_DATASIZE_13 \
404 | VSF_SPI_DATASIZE_14 \
405 | VSF_SPI_DATASIZE_15 \
406 | VSF_SPI_DATASIZE_16 \
407 | VSF_SPI_DATASIZE_17 \
408 | VSF_SPI_DATASIZE_18 \
409 | VSF_SPI_DATASIZE_19 \
410 | VSF_SPI_DATASIZE_20 \
411 | VSF_SPI_DATASIZE_21 \
412 | VSF_SPI_DATASIZE_22 \
413 | VSF_SPI_DATASIZE_23 \
414 | VSF_SPI_DATASIZE_24 \
415 | VSF_SPI_DATASIZE_25 \
416 | VSF_SPI_DATASIZE_26 \
417 | VSF_SPI_DATASIZE_27 \
418 | VSF_SPI_DATASIZE_28 \
419 | VSF_SPI_DATASIZE_29 \
420 | VSF_SPI_DATASIZE_30 \
421 | VSF_SPI_DATASIZE_31 \
422 | VSF_SPI_DATASIZE_32 )
423 */
424
425 /*
428 VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX = (0x00ul << 16), // 2 line, full-duplex, standard spi
429 VSF_SPI_DATALINE_2_LINE_RX_ONLY = (0x01ul << 16), // 2 line, but rx only
430 VSF_SPI_DATALINE_2_LINE_TX_ONLY = (0x02ul << 16), // 2 line, but tx only
431 VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX = (0x03ul << 16), // 1 line, half-duplex
432 VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX = (0x04ul << 16), // 2 line, half-duplex, dual spi
433 VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX = (0x05ul << 16), // 4 line, half-duplex, quad spi
434 VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX = (0x06ul << 16), // 8 line, half-duplex, octal spi
435 #define VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX
436 #define VSF_SPI_DATALINE_2_LINE_RX_ONLY VSF_SPI_DATALINE_2_LINE_RX_ONLY
437 #define VSF_SPI_DATALINE_2_LINE_TX_ONLY VSF_SPI_DATALINE_2_LINE_TX_ONLY
438 #define VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX
439 #define VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX
440 #define VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX
441 #define VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX
442 #define VSF_SPI_DATALINE_MASK ( VSF_SPI_DATALINE_2_LINE_FULL_DUPLEX \
443 | VSF_SPI_DATALINE_1_LINE_HALF_DUPLEX \
444 | VSF_SPI_DATALINE_2_LINE_HALF_DUPLEX \
445 | VSF_SPI_DATALINE_4_LINE_HALF_DUPLEX \
446 | VSF_SPI_DATALINE_8_LINE_HALF_DUPLEX)
447 */
448
449 /*
452 VSF_SPI_MOTOROLA_MODE = (0x00ul << 20), //! \~english Motorola SPI: Standard 4-wire SPI protocol \~chinese 摩托罗拉 SPI：标准 4 线 SPI 协议
453 VSF_SPI_TI_MODE = (0x01ul << 20), //! \~english TI SSI: Chip select timing differs from Motorola SPI \~chinese TI SSI：片选时序与摩托罗拉 SPI 不同
454 #define VSF_SPI_MOTOROLA_MODE VSF_SPI_MOTOROLA_MODE
455 #define VSF_SPI_TI_MODE VSF_SPI_TI_MODE
456 #define VSF_SPI_MOTOROLA_TI_MASK (VSF_SPI_MOTOROLA_MODE | VSF_SPI_TI_MODE)
457 */
458
459 /*
461 // @brief Optional CRC calculation support for data integrity
462 // @note Hardware CRC calculation is platform-dependent
463 // @note When enabled, CRC is automatically calculated and verified
465 // @brief 可选的 CRC 数据完整性校验支持
466 // @note 硬件 CRC 计算依赖于平台
467 // @note 当使能时，CRC 将自动计算和验证
468 VSF_SPI_CRC_DISABLED = (0x00ul << 21), //! \~english CRC calculation disabled (no integrity check) \~chinese CRC 计算禁用（无完整性检查）
469 VSF_SPI_CRC_ENABLED = (0x01ul << 21), //! \~english CRC calculation enabled (hardware computes and verifies) \~chinese CRC 计算使能（硬件计算和验证）
470 #define VSF_SPI_CRC_DISABLED VSF_SPI_CRC_DISABLED
471 #define VSF_SPI_CRC_ENABLED VSF_SPI_CRC_ENABLED
472 #define VSF_SPI_CRC_MASK (VSF_SPI_CRC_DISABLED | VSF_SPI_CRC_ENABLED)
473 */
474
475 /*
478 VSF_SPI_CLOCK_PRESCALER_2 = (0x00ul << 22), //! \~english Divide system clock by 2 (highest frequency) \~chinese 系统时钟除以 2（最高频率）
479 VSF_SPI_CLOCK_PRESCALER_4 = (0x01ul << 22), //! \~english Divide system clock by 4 \~chinese 系统时钟除以 4
480 VSF_SPI_CLOCK_PRESCALER_8 = (0x02ul << 22), //! \~english Divide system clock by 8 \~chinese 系统时钟除以 8
481 VSF_SPI_CLOCK_PRESCALER_16 = (0x03ul << 22), //! \~english Divide system clock by 16 \~chinese 系统时钟除以 16
482 VSF_SPI_CLOCK_PRESCALER_32 = (0x04ul << 22), //! \~english Divide system clock by 32 \~chinese 系统时钟除以 32
483 VSF_SPI_CLOCK_PRESCALER_64 = (0x05ul << 22), //! \~english Divide system clock by 64 \~chinese 系统时钟除以 64
484 VSF_SPI_CLOCK_PRESCALER_128 = (0x06ul << 22), //! \~english Divide system clock by 128 \~chinese 系统时钟除以 128
485 VSF_SPI_CLOCK_PRESCALER_256 = (0x07ul << 22), //! \~english Divide system clock by 256 (lowest frequency) \~chinese 系统时钟除以 256（最低频率）
486 #define VSF_SPI_CLOCK_PRESCALER_2 VSF_SPI_CLOCK_PRESCALER_2
487 #define VSF_SPI_CLOCK_PRESCALER_4 VSF_SPI_CLOCK_PRESCALER_4
488 #define VSF_SPI_CLOCK_PRESCALER_8 VSF_SPI_CLOCK_PRESCALER_8
489 #define VSF_SPI_CLOCK_PRESCALER_16 VSF_SPI_CLOCK_PRESCALER_16
490 #define VSF_SPI_CLOCK_PRESCALER_32 VSF_SPI_CLOCK_PRESCALER_32
491 #define VSF_SPI_CLOCK_PRESCALER_64 VSF_SPI_CLOCK_PRESCALER_64
492 #define VSF_SPI_CLOCK_PRESCALER_128 VSF_SPI_CLOCK_PRESCALER_128
493 #define VSF_SPI_CLOCK_PRESCALER_256 VSF_SPI_CLOCK_PRESCALER_256
494 #define VSF_SPI_CLOCK_PRESCALER_MASK ( VSF_SPI_CLOCK_PRESCALER_2 \
495 | VSF_SPI_CLOCK_PRESCALER_4 \
496 | VSF_SPI_CLOCK_PRESCALER_8 \
497 | VSF_SPI_CLOCK_PRESCALER_16 \
498 | VSF_SPI_CLOCK_PRESCALER_32 \
499 | VSF_SPI_CLOCK_PRESCALER_64 \
500 | VSF_SPI_CLOCK_PRESCALER_128 \
501 | VSF_SPI_CLOCK_PRESCALER_256)
502 */
503} vsf_spi_mode_t;
504#endif
505
512enum {
521 VSF_SPI_DIR_MODE_MASK = VSF_SPI_MASTER
522 | VSF_SPI_SLAVE,
523
532 VSF_SPI_BIT_ORDER_MASK = VSF_SPI_MSB_FIRST
533 | VSF_SPI_LSB_FIRST,
534
543 VSF_SPI_MODE_MASK = VSF_SPI_MODE_0
544 | VSF_SPI_MODE_1
545 | VSF_SPI_MODE_2
546 | VSF_SPI_MODE_3,
547
552#ifndef VSF_SPI_CS_MODE_MASK
553 VSF_SPI_CS_MODE_MASK = VSF_SPI_CS_SOFTWARE_MODE
554 | VSF_SPI_CS_HARDWARE_MODE
559#ifdef VSF_SPI_CS_HARDWARE_INPUT_MODE
560 | VSF_SPI_CS_HARDWARE_INPUT_MODE
561#endif
562 ,
563#endif
564
569#ifndef VSF_SPI_DATASIZE_MASK
570 VSF_SPI_DATASIZE_MASK = VSF_SPI_DATASIZE_8
571 | VSF_SPI_DATASIZE_16
572 | VSF_SPI_DATASIZE_32,
573#endif
574
575#ifndef VSF_SPI_MODE_ALL_BITS_MASK
580 VSF_SPI_MODE_ALL_BITS_MASK = VSF_SPI_DIR_MODE_MASK
581 | VSF_SPI_BIT_ORDER_MASK
582 | VSF_SPI_MODE_MASK
583 | VSF_SPI_CS_MODE_MASK
584 | VSF_SPI_DATASIZE_MASK
585#ifdef VSF_SPI_DATALINE_MASK
586 | VSF_SPI_DATALINE_MASK
587#endif
588#ifdef VSF_SPI_MOTOROLA_TI_MASK
589 | VSF_SPI_MOTOROLA_TI_MASK
590#endif
591#ifdef VSF_SPI_CRC_MASK
592 | VSF_SPI_CRC_MASK
593#endif
594#ifdef VSF_SPI_CLOCK_PRESCALER_MASK
595 | VSF_SPI_CLOCK_PRESCALER_MASK
596#endif
597#endif
598};
599
600#if VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK == DISABLED
612typedef enum vsf_spi_irq_mask_t {
613 VSF_SPI_IRQ_MASK_TX = 0x01ul << 0,
614 VSF_SPI_IRQ_MASK_RX = 0x01ul << 1,
615 VSF_SPI_IRQ_MASK_TX_CPL = 0x01ul << 2,
616 VSF_SPI_IRQ_MASK_CPL = 0x01ul << 3,
617 VSF_SPI_IRQ_MASK_OVERFLOW_ERR = 0x01ul << 4,
618} vsf_spi_irq_mask_t;
619#endif
620
625enum {
626 VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD = VSF_SPI_IRQ_MASK_TX,
627 VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD = VSF_SPI_IRQ_MASK_RX,
628
633 VSF_SPI_IRQ_MASK_RX_CPL = VSF_SPI_IRQ_MASK_CPL,
634
635#ifndef VSF_SPI_IRQ_MASK_ERR
640 VSF_SPI_IRQ_MASK_ERR = VSF_SPI_IRQ_MASK_OVERFLOW_ERR,
641#endif
642
643
644#ifndef VSF_SPI_IRQ_ALL_BITS_MASK
649 VSF_SPI_IRQ_ALL_BITS_MASK = VSF_SPI_IRQ_MASK_TX
650 | VSF_SPI_IRQ_MASK_RX
651 | VSF_SPI_IRQ_MASK_TX_CPL
652 | VSF_SPI_IRQ_MASK_CPL
653 | VSF_SPI_IRQ_MASK_ERR,
654#endif
655};
656
657#if VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS == DISABLED
668typedef struct vsf_spi_status_t {
669 union {
670 inherit(vsf_peripheral_status_t)
671 struct {
672 uint32_t is_busy : 1;
674 };
675 };
676} vsf_spi_status_t;
677#endif
678
679#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY == DISABLED
688typedef struct vsf_spi_capability_t {
689#if VSF_SPI_CFG_INHERIT_HAL_CAPABILITY == ENABLED
690 inherit(vsf_peripheral_capability_t)
691#endif
692 vsf_spi_irq_mask_t irq_mask;
693
694 uint8_t support_hardware_cs : 1;
695 uint8_t support_software_cs : 1;
696 uint8_t cs_count : 6;
697
698 uint32_t max_clock_hz;
699 uint32_t min_clock_hz;
700} vsf_spi_capability_t;
701#endif
702
703#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG == DISABLED
710typedef struct vsf_spi_t vsf_spi_t;
723typedef void vsf_spi_isr_handler_t(void *target_ptr,
724 vsf_spi_t *spi_ptr,
725 vsf_spi_irq_mask_t irq_mask);
734typedef struct vsf_spi_isr_t {
735 vsf_spi_isr_handler_t *handler_fn;
736 void *target_ptr;
737 vsf_arch_prio_t prio;
738} vsf_spi_isr_t;
739
746typedef struct vsf_spi_cfg_t {
747 vsf_spi_mode_t mode;
748 uint32_t clock_hz;
749 vsf_spi_isr_t isr;
750 // \~english In hardware chip select mode (`VSF_SPI_CS_HARDWARE_MODE`), this specifies the hardware CS pin index (0 to cs_count-1) to be used for automatic chip select.
751 // \~chinese 在硬件片选模式 (`VSF_SPI_CS_HARDWARE_MODE`) 下，此成员指定用于自动片选的硬件 CS 引脚索引（0 到 cs_count-1）。在软件模式下，此成员被忽略。
752 uint8_t auto_cs_index;
753} vsf_spi_cfg_t;
754#endif
755
756
757#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CTRL == DISABLED
778typedef enum vsf_spi_ctrl_t {
779 __VSF_SPI_CTRL_DUMMY = 0,
780
781 /*
784 VSF_SPI_CTRL_REQUEST_PAUSE = (0x1ul << 0), //! \~english Request to pause SPI transfer \~chinese 请求暂停 SPI 传输
785 VSF_SPI_CTRL_REQUEST_RESUME = (0x1ul << 1), //! \~english Request to resume SPI transfer \~chinese 请求恢复 SPI 传输
786 #define VSF_SPI_CTRL_REQUEST_PAUSE VSF_SPI_CTRL_REQUEST_PAUSE
787 #define VSF_SPI_CTRL_REQUEST_RESUME VSF_SPI_CTRL_REQUEST_RESUME
788 */
789
790 /*
805
810 VSF_SPI_CTRL_QSPI_ENABLE = 0x00ul,
815 VSF_SPI_CTRL_QSPI_DISABLE = 0x01ul,
816 #define VSF_SPI_CTRL_QSPI_ENABLE VSF_SPI_CTRL_QSPI_ENABLE
817 #define VSF_SPI_CTRL_QSPI_DISABLE VSF_SPI_CTRL_QSPI_DISABLE
818
833
836 VSF_SPI_CTRL_QSPI_CMD_PHASE_ENABLE = 0x02ul,
839 VSF_SPI_CTRL_QSPI_CMD_PHASE_DISABLE = 0x03ul,
842 VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_SIZE = 0x04ul,
845 VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_SIZE = 0x05ul,
852 VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_LINE_MODE = 0x06ul,
859 VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_LINE_MODE = 0x07ul,
862 VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_VALUE = 0x08ul,
865 VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_VALUE = 0x09ul,
866 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_ENABLE VSF_SPI_CTRL_QSPI_CMD_PHASE_ENABLE
867 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_DISABLE VSF_SPI_CTRL_QSPI_CMD_PHASE_DISABLE
868 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_SIZE VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_SIZE
869 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_SIZE VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_SIZE
870 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_LINE_MODE VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_LINE_MODE
871 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_LINE_MODE VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_LINE_MODE
872 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_VALUE VSF_SPI_CTRL_QSPI_CMD_PHASE_SET_VALUE
873 #define VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_VALUE VSF_SPI_CTRL_QSPI_CMD_PHASE_GET_VALUE
874
883
886 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_ENABLE = 0x0Aul,
889 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_DISABLE = 0x0Bul,
892 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_SIZE = 0x0Cul,
895 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_SIZE = 0x0Dul,
902 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_LINE_MODE = 0x0Eul,
903
908 VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_LINE_MODE = 0x0Ful,
911 VSF_SPI_CTRL_QSPI_ADDRESS_SET = 0x10ul,
914 VSF_SPI_CTRL_QSPI_ADDRESS_GET = 0x11ul,
915 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_ENABLE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_ENABLE
916 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_DISABLE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_DISABLE
917 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_SIZE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_SIZE
918 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_SIZE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_SIZE
919 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_LINE_MODE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_SET_LINE_MODE
920 #define VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_LINE_MODE VSF_SPI_CTRL_QSPI_ADDRESS_PHASE_GET_LINE_MODE
921 #define VSF_SPI_CTRL_QSPI_ADDRESS_SET VSF_SPI_CTRL_QSPI_ADDRESS_SET
922 #define VSF_SPI_CTRL_QSPI_ADDRESS_GET VSF_SPI_CTRL_QSPI_ADDRESS_GET
923
932
935 VSF_SPI_CTRL_QSPI_DUMMY_PHASE_ENABLE = 0x18ul,
938 VSF_SPI_CTRL_QSPI_DUMMY_PHASE_DISABLE = 0x19ul,
941 VSF_SPI_CTRL_QSPI_DUMMY_PHASE_SET_CYCLES = 0x1Aul,
944 VSF_SPI_CTRL_QSPI_DUMMY_PHASE_GET_CYCLES = 0x1Bul,
945 #define VSF_SPI_CTRL_QSPI_DUMMY_PHASE_ENABLE VSF_SPI_CTRL_QSPI_DUMMY_PHASE_ENABLE
946 #define VSF_SPI_CTRL_QSPI_DUMMY_PHASE_DISABLE VSF_SPI_CTRL_QSPI_DUMMY_PHASE_DISABLE
947 #define VSF_SPI_CTRL_QSPI_DUMMY_PHASE_SET_CYCLES VSF_SPI_CTRL_QSPI_DUMMY_PHASE_SET_CYCLES
948 #define VSF_SPI_CTRL_QSPI_DUMMY_PHASE_GET_CYCLES VSF_SPI_CTRL_QSPI_DUMMY_PHASE_GET_CYCLES
949
962
965 VSF_SPI_CTRL_QSPI_DATA_PHASE_ENABLE = 0x12ul,
968 VSF_SPI_CTRL_QSPI_DATA_PHASE_DISABLE = 0x13ul,
971 VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_SIZE = 0x14ul,
974 VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_SIZE = 0x15ul,
975
982 VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_LINE_MODE = 0x16ul,
983
990 VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_LINE_MODE = 0x17ul,
991 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_ENABLE VSF_SPI_CTRL_QSPI_DATA_PHASE_ENABLE
992 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_DISABLE VSF_SPI_CTRL_QSPI_DATA_PHASE_DISABLE
993 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_SIZE VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_SIZE
994 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_SIZE VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_SIZE
995 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_LINE_MODE VSF_SPI_CTRL_QSPI_DATA_PHASE_SET_LINE_MODE
996 #define VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_LINE_MODE VSF_SPI_CTRL_QSPI_DATA_PHASE_GET_LINE_MODE
997
1002 VSF_SPI_CTRL_QSPI_TRANSFER_SET_MODE = 0x1Cul,
1005 VSF_SPI_CTRL_QSPI_TRANSFER_GET_MODE = 0x1Dul,
1006 #define VSF_SPI_CTRL_QSPI_TRANSFER_SET_MODE VSF_SPI_CTRL_QSPI_TRANSFER_SET_MODE
1007 #define VSF_SPI_CTRL_QSPI_TRANSFER_GET_MODE VSF_SPI_CTRL_QSPI_TRANSFER_GET_MODE
1008 */
1009} vsf_spi_ctrl_t;
1010#endif
1011
1018typedef struct vsf_spi_op_t {
1020# undef __VSF_HAL_TEMPLATE_API
1021# define __VSF_HAL_TEMPLATE_API VSF_HAL_TEMPLATE_API_FP
1023
1024 VSF_SPI_APIS(vsf_spi)
1025} vsf_spi_op_t;
1026
1027#if VSF_SPI_CFG_MULTI_CLASS == ENABLED
1034struct vsf_spi_t {
1035 const vsf_spi_op_t * op;
1036};
1037#endif
1038
1039/*============================ PROTOTYPES ====================================*/
1040
1057extern vsf_err_t vsf_spi_init(vsf_spi_t *spi_ptr, vsf_spi_cfg_t *cfg_ptr);
1058
1071extern void vsf_spi_fini(vsf_spi_t *spi_ptr);
1072
1090extern vsf_err_t vsf_spi_get_configuration(vsf_spi_t *spi_ptr, vsf_spi_cfg_t *cfg_ptr);
1091
1104extern fsm_rt_t vsf_spi_enable(vsf_spi_t *spi_ptr);
1105
1118extern fsm_rt_t vsf_spi_disable(vsf_spi_t *spi_ptr);
1119
1134extern void vsf_spi_irq_enable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask);
1135
1148extern void vsf_spi_irq_disable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask);
1149
1165extern vsf_err_t vsf_spi_cs_active(vsf_spi_t *spi_ptr, uint_fast8_t index);
1166
1182extern vsf_err_t vsf_spi_cs_inactive(vsf_spi_t *spi_ptr, uint_fast8_t index);
1183
1196extern vsf_spi_status_t vsf_spi_status(vsf_spi_t *spi_ptr);
1197
1210extern vsf_spi_capability_t vsf_spi_capability(vsf_spi_t *spi_ptr);
1211
1251extern void vsf_spi_fifo_transfer(vsf_spi_t *spi_ptr,
1252 void *out_buffer_ptr, uint_fast32_t* out_offset_ptr,
1253 void *in_buffer_ptr, uint_fast32_t* in_offset_ptr,
1254 uint_fast32_t count);
1255
1289extern vsf_err_t vsf_spi_request_transfer(vsf_spi_t *spi_ptr, void *out_buffer_ptr,
1290 void *in_buffer_ptr, uint_fast32_t count);
1291
1304extern vsf_err_t vsf_spi_cancel_transfer(vsf_spi_t *spi_ptr);
1305
1322extern void vsf_spi_get_transferred_count(vsf_spi_t *spi_ptr, uint_fast32_t *sent_count, uint_fast32_t *received_count);
1323
1346extern vsf_err_t vsf_spi_ctrl(vsf_spi_t *spi_ptr, vsf_spi_ctrl_t ctrl, void *param);
1347
1348
1349/*============================ INLINE FUNCTIONS ==============================*/
1350
1351#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS == DISABLED
1366# if defined(VSF_SPI_DATASIZE_BIT_OFFSET) && defined(VSF_SPI_DATASIZE_VALUE_OFFSET)
1367static inline uint8_t vsf_spi_mode_to_data_bits(vsf_spi_mode_t mode)
1368{
1369 int bits = (mode & VSF_SPI_DATASIZE_MASK) >> VSF_SPI_DATASIZE_BIT_OFFSET;
1370 return bits + VSF_SPI_DATASIZE_VALUE_OFFSET;
1371}
1372# else
1373static inline uint8_t vsf_spi_mode_to_data_bits(vsf_spi_mode_t mode)
1374{
1375 uint32_t m = mode & VSF_SPI_DATASIZE_MASK;
1376 switch(m) {
1377#ifdef VSF_SPI_DATASIZE_4
1378 case VSF_SPI_DATASIZE_4:
1379 return 4;
1380#endif
1381#ifdef VSF_SPI_DATASIZE_5
1382 case VSF_SPI_DATASIZE_5:
1383 return 5;
1384#endif
1385#ifdef VSF_SPI_DATASIZE_6
1386 case VSF_SPI_DATASIZE_6:
1387 return 6;
1388#endif
1389#ifdef VSF_SPI_DATASIZE_7
1390 case VSF_SPI_DATASIZE_7:
1391 return 7;
1392#endif
1393 case VSF_SPI_DATASIZE_8:
1394 return 8;
1395#ifdef VSF_SPI_DATASIZE_9
1396 case VSF_SPI_DATASIZE_9:
1397 return 9;
1398#endif
1399#ifdef VSF_SPI_DATASIZE_10
1400 case VSF_SPI_DATASIZE_10:
1401 return 10;
1402#endif
1403#ifdef VSF_SPI_DATASIZE_11
1404 case VSF_SPI_DATASIZE_11:
1405 return 11;
1406#endif
1407#ifdef VSF_SPI_DATASIZE_12
1408 case VSF_SPI_DATASIZE_12:
1409 return 12;
1410#endif
1411#ifdef VSF_SPI_DATASIZE_13
1412 case VSF_SPI_DATASIZE_13:
1413 return 13;
1414#endif
1415#ifdef VSF_SPI_DATASIZE_14
1416 case VSF_SPI_DATASIZE_14:
1417 return 14;
1418#endif
1419#ifdef VSF_SPI_DATASIZE_15
1420 case VSF_SPI_DATASIZE_15:
1421 return 15;
1422#endif
1423#ifdef VSF_SPI_DATASIZE_16
1424 case VSF_SPI_DATASIZE_16:
1425 return 16;
1426#endif
1427#ifdef VSF_SPI_DATASIZE_17
1428 case VSF_SPI_DATASIZE_17:
1429 return 17;
1430#endif
1431#ifdef VSF_SPI_DATASIZE_18
1432 case VSF_SPI_DATASIZE_18:
1433 return 18;
1434#endif
1435#ifdef VSF_SPI_DATASIZE_19
1436 case VSF_SPI_DATASIZE_19:
1437 return 19;
1438#endif
1439#ifdef VSF_SPI_DATASIZE_20
1440 case VSF_SPI_DATASIZE_20:
1441 return 20;
1442#endif
1443#ifdef VSF_SPI_DATASIZE_21
1444 case VSF_SPI_DATASIZE_21:
1445 return 21;
1446#endif
1447#ifdef VSF_SPI_DATASIZE_22
1448 case VSF_SPI_DATASIZE_22:
1449 return 22;
1450#endif
1451#ifdef VSF_SPI_DATASIZE_23
1452 case VSF_SPI_DATASIZE_23:
1453 return 23;
1454#endif
1455#ifdef VSF_SPI_DATASIZE_24
1456 case VSF_SPI_DATASIZE_24:
1457 return 24;
1458#endif
1459#ifdef VSF_SPI_DATASIZE_25
1460 case VSF_SPI_DATASIZE_25:
1461 return 25;
1462#endif
1463#ifdef VSF_SPI_DATASIZE_26
1464 case VSF_SPI_DATASIZE_26:
1465 return 26;
1466#endif
1467#ifdef VSF_SPI_DATASIZE_27
1468 case VSF_SPI_DATASIZE_27:
1469 return 27;
1470#endif
1471#ifdef VSF_SPI_DATASIZE_28
1472 case VSF_SPI_DATASIZE_28:
1473 return 28;
1474#endif
1475#ifdef VSF_SPI_DATASIZE_29
1476 case VSF_SPI_DATASIZE_29:
1477 return 29;
1478#endif
1479#ifdef VSF_SPI_DATASIZE_30
1480 case VSF_SPI_DATASIZE_30:
1481 return 30;
1482#endif
1483#ifdef VSF_SPI_DATASIZE_31
1484 case VSF_SPI_DATASIZE_31:
1485 return 31;
1486#endif
1487#ifdef VSF_SPI_DATASIZE_32
1488 case VSF_SPI_DATASIZE_32:
1489 return 32;
1490#endif
1491 default:
1492 return 0;
1493 }
1494}
1495# endif
1496#endif
1497
1498#if VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE == DISABLED
1513# if defined(VSF_SPI_DATASIZE_BIT_OFFSET) && defined(VSF_SPI_DATASIZE_VALUE_OFFSET)
1514static inline vsf_spi_mode_t vsf_spi_data_bits_to_mode(uint8_t data_bits)
1515{
1516 return (vsf_spi_mode_t)((data_bits - VSF_SPI_DATASIZE_VALUE_OFFSET) << VSF_SPI_DATASIZE_BIT_OFFSET);
1517}
1518# else
1519static inline vsf_spi_mode_t vsf_spi_data_bits_to_mode(uint8_t data_bits)
1520{
1521 switch (data_bits) {
1522#ifdef VSF_SPI_DATASIZE_4
1523 case 4:
1524 return VSF_SPI_DATASIZE_4;
1525#endif
1526#ifdef VSF_SPI_DATASIZE_5
1527 case 5:
1528 return VSF_SPI_DATASIZE_5;
1529#endif
1530#ifdef VSF_SPI_DATASIZE_6
1531 case 6:
1532 return VSF_SPI_DATASIZE_6;
1533#endif
1534#ifdef VSF_SPI_DATASIZE_7
1535 case 7:
1536 return VSF_SPI_DATASIZE_7;
1537#endif
1538 case 8:
1539 return VSF_SPI_DATASIZE_8;
1540#ifdef VSF_SPI_DATASIZE_9
1541 case 9:
1542 return VSF_SPI_DATASIZE_9;
1543#endif
1544#ifdef VSF_SPI_DATASIZE_10
1545 case 10:
1546 return VSF_SPI_DATASIZE_10;
1547#endif
1548#ifdef VSF_SPI_DATASIZE_11
1549 case 11:
1550 return VSF_SPI_DATASIZE_11;
1551#endif
1552#ifdef VSF_SPI_DATASIZE_12
1553 case 12:
1554 return VSF_SPI_DATASIZE_12;
1555#endif
1556#ifdef VSF_SPI_DATASIZE_13
1557 case 13:
1558 return VSF_SPI_DATASIZE_13;
1559#endif
1560#ifdef VSF_SPI_DATASIZE_14
1561 case 14:
1562 return VSF_SPI_DATASIZE_14;
1563#endif
1564#ifdef VSF_SPI_DATASIZE_15
1565 case 15:
1566 return VSF_SPI_DATASIZE_15;
1567#endif
1568#ifdef VSF_SPI_DATASIZE_16
1569 case 16:
1570 return VSF_SPI_DATASIZE_16;
1571#endif
1572#ifdef VSF_SPI_DATASIZE_17
1573 case 17:
1574 return VSF_SPI_DATASIZE_17;
1575#endif
1576#ifdef VSF_SPI_DATASIZE_18
1577 case 18:
1578 return VSF_SPI_DATASIZE_18;
1579#endif
1580#ifdef VSF_SPI_DATASIZE_19
1581 case 19:
1582 return VSF_SPI_DATASIZE_19;
1583#endif
1584#ifdef VSF_SPI_DATASIZE_20
1585 case 20:
1586 return VSF_SPI_DATASIZE_20;
1587#endif
1588#ifdef VSF_SPI_DATASIZE_21
1589 case 21:
1590 return VSF_SPI_DATASIZE_21;
1591#endif
1592#ifdef VSF_SPI_DATASIZE_22
1593 case 22:
1594 return VSF_SPI_DATASIZE_22;
1595#endif
1596#ifdef VSF_SPI_DATASIZE_23
1597 case 23:
1598 return VSF_SPI_DATASIZE_23;
1599#endif
1600#ifdef VSF_SPI_DATASIZE_24
1601 case 24:
1602 return VSF_SPI_DATASIZE_24;
1603#endif
1604#ifdef VSF_SPI_DATASIZE_25
1605 case 25:
1606 return VSF_SPI_DATASIZE_25;
1607#endif
1608#ifdef VSF_SPI_DATASIZE_26
1609 case 26:
1610 return VSF_SPI_DATASIZE_26;
1611#endif
1612#ifdef VSF_SPI_DATASIZE_27
1613 case 27:
1614 return VSF_SPI_DATASIZE_27;
1615#endif
1616#ifdef VSF_SPI_DATASIZE_28
1617 case 28:
1618 return VSF_SPI_DATASIZE_28;
1619#endif
1620#ifdef VSF_SPI_DATASIZE_29
1621 case 29:
1622 return VSF_SPI_DATASIZE_29;
1623#endif
1624#ifdef VSF_SPI_DATASIZE_30
1625 case 30:
1626 return VSF_SPI_DATASIZE_30;
1627#endif
1628#ifdef VSF_SPI_DATASIZE_31
1629 case 31:
1630 return VSF_SPI_DATASIZE_31;
1631#endif
1632#ifdef VSF_SPI_DATASIZE_32
1633 case 32:
1634 return VSF_SPI_DATASIZE_32;
1635#endif
1636 default:
1637 return (vsf_spi_mode_t)0;
1638 }
1639}
1640# endif
1641#endif
1642
1643#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES == DISABLED
1658static inline uint8_t vsf_spi_mode_to_data_bytes(vsf_spi_mode_t mode)
1659{
1660 uint8_t bits = vsf_spi_mode_to_data_bits(mode);
1661 if (bits == 0) {
1662 return 0; // Error: invalid data bits
1663 } else if (bits <= 8) {
1664 return 1;
1665 } else if (bits <= 16) {
1666 return 2;
1667 } else {
1668 return 4;
1669 }
1670}
1671#endif
1672
1673/*============================ MACROFIED FUNCTIONS ===========================*/
1674
1676#if VSF_SPI_CFG_FUNCTION_RENAME == ENABLED
1677# define __vsf_spi_t VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_t)
1678# define vsf_spi_init(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_init) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1679# define vsf_spi_fini(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_fini) ((__vsf_spi_t *)(__SPI))
1680# define vsf_spi_get_configuration(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_get_configuration) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1681# define vsf_spi_enable(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_enable) ((__vsf_spi_t *)(__SPI))
1682# define vsf_spi_disable(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_disable) ((__vsf_spi_t *)(__SPI))
1683# define vsf_spi_irq_enable(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_irq_enable) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1684# define vsf_spi_irq_disable(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_irq_disable) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1685# define vsf_spi_status(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_status) ((__vsf_spi_t *)(__SPI))
1686# define vsf_spi_capability(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_capability) ((__vsf_spi_t *)(__SPI))
1687# define vsf_spi_cs_active(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cs_active) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1688# define vsf_spi_cs_inactive(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cs_inactive) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1689# define vsf_spi_fifo_transfer(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_fifo_transfer) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1690# define vsf_spi_request_transfer(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_request_transfer) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1691# define vsf_spi_cancel_transfer(__SPI) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_cancel_transfer) ((__vsf_spi_t *)(__SPI))
1692# define vsf_spi_get_transferred_count(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_get_transferred_count)((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1693# define vsf_spi_ctrl(__SPI, ...) VSF_MCONNECT(VSF_SPI_CFG_PREFIX, _spi_ctrl) ((__vsf_spi_t *)(__SPI), ##__VA_ARGS__)
1694
1695# define vsf_qspi_t vsf_spi_t
1696# define vsf_qspi_mode_t vsf_spi_mode_t
1697# define vsf_qspi_irq_mask_t vsf_spi_irq_mask_t
1698# define vsf_qspi_status_t vsf_spi_status_t
1699# define vsf_qspi_capability_t vsf_spi_capability_t
1700# define vsf_qspi_isr_handler_t vsf_spi_isr_handler_t
1701# define vsf_qspi_isr_t vsf_spi_isr_t
1702# define vsf_qspi_cfg_t vsf_spi_cfg_t
1703# define vsf_qspi_ctrl_t vsf_spi_ctrl_t
1704
1719# define vsf_qspi_init(__SPI, __CFG_PTR) vsf_spi_init((__vsf_spi_t *)(__SPI), (__CFG_PTR))
1720
1733# define vsf_qspi_fini(__SPI) vsf_spi_fini((__vsf_spi_t *)(__SPI))
1734
1747# define vsf_qspi_enable(__SPI) vsf_spi_enable((__vsf_spi_t *)(__SPI))
1748
1761# define vsf_qspi_disable(__SPI) vsf_spi_disable((__vsf_spi_t *)(__SPI))
1762
1777# define vsf_qspi_irq_enable(__SPI, __IRQ_MASK) vsf_spi_irq_enable((__vsf_spi_t *)(__SPI), (__IRQ_MASK))
1778
1793# define vsf_qspi_irq_disable(__SPI, __IRQ_MASK) vsf_spi_irq_disable((__vsf_spi_t *)(__SPI), (__IRQ_MASK))
1794
1807# define vsf_qspi_status(__SPI) vsf_spi_status((__vsf_spi_t *)(__SPI))
1808
1821# define vsf_qspi_capability(__SPI) vsf_spi_capability((__vsf_spi_t *)(__SPI))
1822
1843# define vsf_qspi_fifo_write(__SPI, __OUT_BUFFER_PTR, __OUT_OFFSET_PTR, __COUNT) \
1844 vsf_spi_fifo_transfer((__vsf_spi_t *)(__SPI), (__OUT_BUFFER_PTR), (__OUT_OFFSET_PTR), NULL, NULL, (__COUNT))
1845
1866# define vsf_qspi_fifo_read(__SPI, __IN_BUFFER_PTR, __IN_OFFSET_PTR, __COUNT) \
1867 vsf_spi_fifo_transfer((__vsf_spi_t *)(__SPI), NULL, NULL, (__IN_BUFFER_PTR), (__IN_OFFSET_PTR), (__COUNT))
1868
1887# define vsf_qspi_request_tx(__SPI, __OUT_BUF, __CNT) vsf_spi_request_transfer((__vsf_spi_t *)(__SPI), (__OUT_BUF), NULL, (__CNT))
1888
1907# define vsf_qspi_request_rx(__SPI, __IN_BUF, __CNT) vsf_spi_request_transfer((__vsf_spi_t *)(__SPI), NULL, (__IN_BUF), (__CNT))
1908
1932# define vsf_qspi_cancel_transfer(__SPI) vsf_spi_cancel_transfer((__vsf_spi_t *)(__SPI))
1933
1950# define vsf_qspi_get_transferred_count(__SPI, __TX_CNT, __RX_CNT) \
1951 vsf_spi_get_transferred_count((__vsf_spi_t *)(__SPI), (__TX_CNT), (__RX_CNT))
1952
1969# define vsf_qspi_ctrl(__SPI, __CTRL, __PARAM) vsf_spi_ctrl((__vsf_spi_t *)(__SPI), (__CTRL), (__PARAM))
1970#endif
1972
1973#ifdef __cplusplus
1974}
1975#endif
1976
1977#endif /*__VSF_TEMPLATE_SPI_H__*/
1978
vsf_err_t
vsf_err_t
Definition __type.h:42
vsf_spi_mode_t
vsf_spi_mode_t
Definition spi.h:33
VSF_SPI_DATASIZE_31
@ VSF_SPI_DATASIZE_31
Definition spi.h:67
VSF_SPI_DATASIZE_28
@ VSF_SPI_DATASIZE_28
Definition spi.h:64
VSF_SPI_DATASIZE_6
@ VSF_SPI_DATASIZE_6
Definition spi.h:98
VSF_SPI_DATASIZE_17
@ VSF_SPI_DATASIZE_17
Definition spi.h:53
VSF_SPI_DATASIZE_9
@ VSF_SPI_DATASIZE_9
Definition spi.h:45
VSF_SPI_DATASIZE_18
@ VSF_SPI_DATASIZE_18
Definition spi.h:54
VSF_SPI_DATASIZE_11
@ VSF_SPI_DATASIZE_11
Definition spi.h:47
VSF_SPI_DATASIZE_20
@ VSF_SPI_DATASIZE_20
Definition spi.h:56
VSF_SPI_DATASIZE_21
@ VSF_SPI_DATASIZE_21
Definition spi.h:57
VSF_SPI_DATASIZE_27
@ VSF_SPI_DATASIZE_27
Definition spi.h:63
VSF_SPI_DATASIZE_14
@ VSF_SPI_DATASIZE_14
Definition spi.h:50
VSF_SPI_DATASIZE_BIT_OFFSET
@ VSF_SPI_DATASIZE_BIT_OFFSET
Definition spi.h:42
VSF_SPI_DATASIZE_26
@ VSF_SPI_DATASIZE_26
Definition spi.h:62
VSF_SPI_DATASIZE_13
@ VSF_SPI_DATASIZE_13
Definition spi.h:49
VSF_SPI_DATASIZE_7
@ VSF_SPI_DATASIZE_7
Definition spi.h:99
VSF_SPI_DATASIZE_5
@ VSF_SPI_DATASIZE_5
Definition spi.h:97
VSF_SPI_DATASIZE_12
@ VSF_SPI_DATASIZE_12
Definition spi.h:48
VSF_SPI_DATASIZE_22
@ VSF_SPI_DATASIZE_22
Definition spi.h:58
VSF_SPI_DATASIZE_24
@ VSF_SPI_DATASIZE_24
Definition spi.h:60
VSF_SPI_DATASIZE_4
@ VSF_SPI_DATASIZE_4
datasize is 8 bits
Definition spi.h:96
VSF_SPI_DATASIZE_29
@ VSF_SPI_DATASIZE_29
Definition spi.h:65
VSF_SPI_DATASIZE_25
@ VSF_SPI_DATASIZE_25
Definition spi.h:61
VSF_SPI_DATASIZE_30
@ VSF_SPI_DATASIZE_30
Definition spi.h:66
VSF_SPI_DATASIZE_19
@ VSF_SPI_DATASIZE_19
Definition spi.h:55
VSF_SPI_DATASIZE_23
@ VSF_SPI_DATASIZE_23
Definition spi.h:59
VSF_SPI_DATASIZE_10
@ VSF_SPI_DATASIZE_10
Definition spi.h:46
VSF_SPI_DATASIZE_15
@ VSF_SPI_DATASIZE_15
Definition spi.h:51
vsf_arch_prio_t
vsf_arch_prio_t
Definition cortex_a_generic.h:88
irq_mask
const i_spi_t vsf_spi_irq_mask_t irq_mask
Definition spi_interface.h:38
uint_fast8_t
unsigned char uint_fast8_t
Definition stdint.h:23
uint32_t
unsigned uint32_t
Definition stdint.h:9
uint_fast32_t
unsigned int uint_fast32_t
Definition stdint.h:27
uint8_t
unsigned char uint8_t
Definition stdint.h:5
vsf_peripheral_capability_t
Definition vsf_template_hal_driver.h:203
vsf_peripheral_status_t
Definition vsf_template_hal_driver.h:196
vsf_spi_capability_t
Predefined VSF SPI capability that can be reimplemented in specific HAL drivers. Even if the hardware...
Definition vsf_template_spi.h:688
vsf_spi_capability_t::support_software_cs
uint8_t support_software_cs
Hardware chip select support (1: supported, 0: not supported)
Definition vsf_template_spi.h:695
vsf_spi_capability_t::max_clock_hz
uint32_t max_clock_hz
Number of available chip select lines (0-63)
Definition vsf_template_spi.h:698
vsf_spi_capability_t::cs_count
uint8_t cs_count
Software chip select support (1: supported, 0: not supported)
Definition vsf_template_spi.h:696
vsf_spi_capability_t::irq_mask
vsf_spi_irq_mask_t irq_mask
Definition spi.h:128
vsf_spi_capability_t::support_hardware_cs
uint8_t support_hardware_cs
Supported interrupt masks for SPI operations.
Definition vsf_template_spi.h:694
vsf_spi_capability_t::min_clock_hz
uint32_t min_clock_hz
Maximum supported SPI clock frequency in Hz.
Definition vsf_template_spi.h:699
vsf_spi_capability_t::inherit
inherit(vsf_peripheral_capability_t) vsf_spi_irq_mask_t irq_mask
Inherit peripheral capabilities.
vsf_spi_cfg_t
Configuration structure for SPI.
Definition vsf_template_spi.h:746
vsf_spi_cfg_t::clock_hz
uint32_t clock_hz
SPI operating mode (master/slave, CPOL/CPHA, bit order, data size)
Definition vsf_template_spi.h:748
vsf_spi_cfg_t::isr
vsf_spi_isr_t isr
SPI clock frequency in Hz (must be between min_clock_hz and max_clock_hz)
Definition vsf_template_spi.h:749
vsf_spi_cfg_t::mode
vsf_spi_mode_t mode
Definition vsf_template_spi.h:747
vsf_spi_cfg_t::auto_cs_index
uint8_t auto_cs_index
Interrupt configuration (handler, target pointer, priority)
Definition vsf_template_spi.h:752
vsf_spi_isr_t
SPI interrupt service routine configuration structure.
Definition vsf_template_spi.h:734
vsf_spi_isr_t::handler_fn
vsf_spi_isr_handler_t * handler_fn
Definition vsf_template_spi.h:735
vsf_spi_isr_t::target_ptr
void * target_ptr
Interrupt handler function (NULL to disable interrupts)
Definition vsf_template_spi.h:736
vsf_spi_isr_t::prio
vsf_arch_prio_t prio
User context pointer passed to handler.
Definition vsf_template_spi.h:737
vsf_spi_op_t
SPI operation function pointer type, used for SPI Multi Class support.
Definition vsf_template_spi.h:1018
vsf_spi_status_t
Predefined VSF SPI status that can be reimplemented in specific HAL drivers. Even if the hardware doe...
Definition vsf_template_spi.h:668
vsf_spi_status_t::is_busy
uint32_t is_busy
Definition spi.h:118
vsf_spi_t
SPI instance structure, used for SPI Multi Class support, not needed in non Multi Class mode.
Definition vsf_template_spi.h:1034
vsf_spi_t::op
const vsf_spi_op_t * op
Definition vsf_template_spi.h:1035
vsf_spi_isr_handler_t
void vsf_spi_isr_handler_t(void *target_ptr, vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Definition spi.h:180
vsf_spi_irq_mask_t
vsf_spi_irq_mask_t
Definition spi.h:139
vsf_spi_mode_t
vsf_spi_mode_t
Definition spi.h:115
vsf_arch.h
fsm_rt_t
fsm_rt_t
Definition vsf_fsm.h:315
vsf_spi
vsf_spi_t vsf_spi[SPI_COUNT]
Definition vsf_spi.c:3
vsf_template_hal_driver.h
vsf_spi_fifo_transfer
void vsf_spi_fifo_transfer(vsf_spi_t *spi_ptr, void *out_buffer_ptr, uint_fast32_t *out_offset_ptr, void *in_buffer_ptr, uint_fast32_t *in_offset_ptr, uint_fast32_t count)
Perform FIFO-based data transfer on a SPI instance.
Definition spi_common.c:128
VSF_SPI_MODE_MASK
@ VSF_SPI_MODE_MASK
SPI mode mask for clock polarity and phase configuration.
Definition vsf_template_spi.h:543
VSF_SPI_BIT_ORDER_MASK
@ VSF_SPI_BIT_ORDER_MASK
SPI bit order mask for MSB/LSB first selection.
Definition vsf_template_spi.h:532
VSF_SPI_DIR_MODE_MASK
@ VSF_SPI_DIR_MODE_MASK
SPI direction mode mask for master/slave selection.
Definition vsf_template_spi.h:521
VSF_SPI_CS_MODE_MASK
@ VSF_SPI_CS_MODE_MASK
Definition vsf_template_spi.h:553
VSF_SPI_MODE_ALL_BITS_MASK
@ VSF_SPI_MODE_ALL_BITS_MASK
Definition vsf_template_spi.h:580
VSF_SPI_DATASIZE_MASK
@ VSF_SPI_DATASIZE_MASK
Definition vsf_template_spi.h:570
vsf_spi_isr_t
struct vsf_spi_isr_t vsf_spi_isr_t
SPI interrupt service routine configuration structure.
vsf_spi_isr_handler_t
void vsf_spi_isr_handler_t(void *target_ptr, vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
SPI interrupt handler type declaration.
Definition vsf_template_spi.h:723
vsf_spi_status
vsf_spi_status_t vsf_spi_status(vsf_spi_t *spi_ptr)
Get the current status of a SPI instance.
Definition spi_common.c:101
vsf_spi_request_transfer
vsf_err_t vsf_spi_request_transfer(vsf_spi_t *spi_ptr, void *out_buffer_ptr, void *in_buffer_ptr, uint_fast32_t count)
Request a SPI data transfer operation.
Definition spi_common.c:140
vsf_spi_cfg_t
struct vsf_spi_cfg_t vsf_spi_cfg_t
Configuration structure for SPI.
vsf_spi_capability_t
struct vsf_spi_capability_t vsf_spi_capability_t
Predefined VSF SPI capability that can be reimplemented in specific HAL drivers. Even if the hardware...
VSF_SPI_APIS
#define VSF_SPI_APIS(__prefix_name)
SPI API template, used to generate SPI type, specific prefix function declarations,...
Definition vsf_template_spi.h:238
vsf_spi_get_configuration
vsf_err_t vsf_spi_get_configuration(vsf_spi_t *spi_ptr, vsf_spi_cfg_t *cfg_ptr)
Get current configuration of a SPI instance.
Definition spi_common.c:55
VSF_SPI_IRQ_MASK_RX_CPL
@ VSF_SPI_IRQ_MASK_RX_CPL
Alias for VSF_SPI_IRQ_MASK_RX.
Definition vsf_template_spi.h:633
VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD
@ VSF_SPI_IRQ_MASK_TX_FIFO_THRESHOLD
Definition vsf_template_spi.h:626
VSF_SPI_IRQ_ALL_BITS_MASK
@ VSF_SPI_IRQ_ALL_BITS_MASK
Definition vsf_template_spi.h:649
VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD
@ VSF_SPI_IRQ_MASK_RX_FIFO_THRESHOLD
Alias for VSF_SPI_IRQ_MASK_TX.
Definition vsf_template_spi.h:627
VSF_SPI_IRQ_MASK_ERR
@ VSF_SPI_IRQ_MASK_ERR
Definition vsf_template_spi.h:640
vsf_spi_get_transferred_count
void vsf_spi_get_transferred_count(vsf_spi_t *spi_ptr, uint_fast32_t *sent_count, uint_fast32_t *received_count)
Get the number of data units transferred in the current or last SPI operation.
Definition spi_common.c:160
vsf_spi_cs_active
vsf_err_t vsf_spi_cs_active(vsf_spi_t *spi_ptr, uint_fast8_t index)
Activate (assert) a SPI chip select line.
Definition spi_common.c:110
vsf_spi_irq_mask_t
vsf_spi_irq_mask_t
Predefined VSF SPI interrupt masks that can be reimplemented in specific HAL drivers....
Definition vsf_template_spi.h:612
VSF_SPI_IRQ_MASK_OVERFLOW_ERR
@ VSF_SPI_IRQ_MASK_OVERFLOW_ERR
Transfer complete interrupt (triggers when both TX and RX are complete)
Definition vsf_template_spi.h:617
VSF_SPI_IRQ_MASK_CPL
@ VSF_SPI_IRQ_MASK_CPL
TX complete interrupt (triggers when all TX data has been sent)
Definition vsf_template_spi.h:616
VSF_SPI_IRQ_MASK_RX
@ VSF_SPI_IRQ_MASK_RX
TX FIFO threshold interrupt (triggers when TX FIFO level is below threshold)
Definition vsf_template_spi.h:614
VSF_SPI_IRQ_MASK_TX
@ VSF_SPI_IRQ_MASK_TX
Definition vsf_template_spi.h:613
VSF_SPI_IRQ_MASK_TX_CPL
@ VSF_SPI_IRQ_MASK_TX_CPL
RX FIFO threshold interrupt (triggers when RX FIFO level is above threshold)
Definition vsf_template_spi.h:615
vsf_spi_ctrl
vsf_err_t vsf_spi_ctrl(vsf_spi_t *spi_ptr, vsf_spi_ctrl_t ctrl, void *param)
Execute a control command on the SPI instance.
Definition spi_common.c:179
vsf_spi_enable
fsm_rt_t vsf_spi_enable(vsf_spi_t *spi_ptr)
Enable a SPI instance for operation.
Definition spi_common.c:65
vsf_spi_disable
fsm_rt_t vsf_spi_disable(vsf_spi_t *spi_ptr)
Disable a SPI instance from operation.
Definition spi_common.c:74
vsf_spi_status_t
struct vsf_spi_status_t vsf_spi_status_t
Predefined VSF SPI status that can be reimplemented in specific HAL drivers. Even if the hardware doe...
vsf_spi_mode_t
vsf_spi_mode_t
Predefined VSF SPI modes that can be reimplemented in specific HAL drivers.
Definition vsf_template_spi.h:295
VSF_SPI_CPHA_LOW
@ VSF_SPI_CPHA_LOW
Clock polarity: idle state is high.
Definition vsf_template_spi.h:309
VSF_SPI_SLAVE
@ VSF_SPI_SLAVE
Master mode (controller)
Definition vsf_template_spi.h:298
VSF_SPI_DATASIZE_16
@ VSF_SPI_DATASIZE_16
8-bit data transfer size
Definition vsf_template_spi.h:327
VSF_SPI_LSB_FIRST
@ VSF_SPI_LSB_FIRST
Most Significant Bit (MSB) first.
Definition vsf_template_spi.h:302
VSF_SPI_CPOL_HIGH
@ VSF_SPI_CPOL_HIGH
Clock polarity: idle state is low.
Definition vsf_template_spi.h:306
VSF_SPI_MODE_1
@ VSF_SPI_MODE_1
Mode 0: CPOL=0 (idle low), CPHA=0 (sample on first edge)
Definition vsf_template_spi.h:313
VSF_SPI_DATASIZE_8
@ VSF_SPI_DATASIZE_8
Definition vsf_template_spi.h:326
VSF_SPI_MASTER
@ VSF_SPI_MASTER
Definition vsf_template_spi.h:297
VSF_SPI_CPHA_HIGH
@ VSF_SPI_CPHA_HIGH
Clock phase: sample on first edge.
Definition vsf_template_spi.h:310
VSF_SPI_MSB_FIRST
@ VSF_SPI_MSB_FIRST
Slave mode (peripheral)
Definition vsf_template_spi.h:301
VSF_SPI_DATASIZE_32
@ VSF_SPI_DATASIZE_32
16-bit data transfer size
Definition vsf_template_spi.h:328
VSF_SPI_CS_SOFTWARE_MODE
@ VSF_SPI_CS_SOFTWARE_MODE
Mode 3: CPOL=1 (idle high), CPHA=1 (sample on second edge)
Definition vsf_template_spi.h:320
VSF_SPI_MODE_0
@ VSF_SPI_MODE_0
Clock phase: sample on second edge.
Definition vsf_template_spi.h:312
VSF_SPI_CS_HARDWARE_MODE
@ VSF_SPI_CS_HARDWARE_MODE
Definition vsf_template_spi.h:323
VSF_SPI_MODE_3
@ VSF_SPI_MODE_3
Mode 2: CPOL=1 (idle high), CPHA=0 (sample on first edge)
Definition vsf_template_spi.h:315
VSF_SPI_CPOL_LOW
@ VSF_SPI_CPOL_LOW
Least Significant Bit (LSB) first.
Definition vsf_template_spi.h:305
VSF_SPI_MODE_2
@ VSF_SPI_MODE_2
Mode 1: CPOL=0 (idle low), CPHA=1 (sample on second edge)
Definition vsf_template_spi.h:314
vsf_spi_irq_disable
void vsf_spi_irq_disable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Disable specific interrupts for a SPI instance.
Definition spi_common.c:92
vsf_spi_ctrl_t
vsf_spi_ctrl_t
Predefined VSF SPI control commands that can be reimplemented in specific HAL drivers.
Definition vsf_template_spi.h:778
__VSF_SPI_CTRL_DUMMY
@ __VSF_SPI_CTRL_DUMMY
Definition vsf_template_spi.h:779
vsf_spi_init
vsf_err_t vsf_spi_init(vsf_spi_t *spi_ptr, vsf_spi_cfg_t *cfg_ptr)
Initialize a SPI instance.
Definition spi_common.c:37
vsf_spi_irq_enable
void vsf_spi_irq_enable(vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Enable specific interrupts for a SPI instance.
Definition spi_common.c:83
vsf_spi_fini
void vsf_spi_fini(vsf_spi_t *spi_ptr)
Finalize (deinitialize) a SPI instance.
Definition spi_common.c:46
vsf_spi_cs_inactive
vsf_err_t vsf_spi_cs_inactive(vsf_spi_t *spi_ptr, uint_fast8_t index)
Deactivate (deassert) a SPI chip select line.
Definition spi_common.c:119
vsf_spi_cancel_transfer
vsf_err_t vsf_spi_cancel_transfer(vsf_spi_t *spi_ptr)
Cancel an ongoing SPI transfer operation.
Definition spi_common.c:151
vsf_spi_capability
vsf_spi_capability_t vsf_spi_capability(vsf_spi_t *spi_ptr)
Get the capabilities of a SPI instance.
Definition spi_common.c:170
Generated from commit: vsfteam/vsf@74aa6ce