VSF Documented
common.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __HAL_DRIVER_ARTERY_AT32F402_405_COMMON_H__
19#define __HAL_DRIVER_ARTERY_AT32F402_405_COMMON_H__
20
21/* \note __common.h should only be included by device.h */
22
23/*============================ INCLUDES ======================================*/
24
25#include "hal/vsf_hal_cfg.h"
26#include "hal/arch/vsf_arch.h"
27
28// CMSIS headers which will not be included in core_xxx.h
29// and arm_math.h CAN ONLY be included after core_xxx.h
30//#include "arm_math.h"
31
32/*============================ MACROS ========================================*/
33
34// CLK & RST REGION
35
36#define VSF_HW_REG_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH) \
37 (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
38#define VSF_HW_CLKRST_REGION VSF_HW_REG_REGION
39
40/*============================ MACROFIED FUNCTIONS ===========================*/
41
42#define vsf_hw_peripheral_clk_set vsf_hw_clkrst_region_set
43#define vsf_hw_peripheral_clk_get vsf_hw_clkrst_region_get
44
45#define vsf_hw_peripheral_rst_set vsf_hw_clkrst_region_set_bit
46#define vsf_hw_peripheral_rst_clear vsf_hw_clkrst_region_clear_bit
47#define vsf_hw_peripheral_rst_get vsf_hw_clkrst_region_get_bit
48
49#define vsf_hw_peripheral_enable vsf_hw_clkrst_region_set_bit
50#define vsf_hw_peripheral_disable vsf_hw_clkrst_region_clear_bit
51
52#define VSF_SYSTIMER_FREQ vsf_hw_clk_get_freq_hz(&VSF_HW_CLK_CPU)
53
54/*============================ TYPES =========================================*/
55
56typedef enum vsf_hw_peripheral_rst_t {
57 // CRM_AHBRST1
58#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
59 VSF_HW_RST_OTGHS = VSF_HW_CLKRST_REGION(0x4, 29, 1),// OTGHSRST
60#endif
61 VSF_HW_RST_DMA2 = VSF_HW_CLKRST_REGION(0x4, 24, 1),// DMA2RST
62 VSF_HW_RST_DMA1 = VSF_HW_CLKRST_REGION(0x4, 22, 1),// DMA1RST
63 VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x4, 12, 1),// CRCRST
64#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
65 VSF_HW_RST_GPIO5 = VSF_HW_CLKRST_REGION(0x4, 5, 1),// GPIOFRST
66 VSF_HW_RST_GPIOF = VSF_HW_RST_GPIO5,
67#endif
68#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
69 VSF_HW_RST_GPIO3 = VSF_HW_CLKRST_REGION(0x4, 3, 1),// GPIODRST
70 VSF_HW_RST_GPIOD = VSF_HW_RST_GPIO3,
71#endif
72#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
73 VSF_HW_RST_GPIO2 = VSF_HW_CLKRST_REGION(0x4, 2, 1),// GPIOCRST
74 VSF_HW_RST_GPIOC = VSF_HW_RST_GPIO2,
75#endif
76#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
77 VSF_HW_RST_GPIO1 = VSF_HW_CLKRST_REGION(0x4, 1, 1),// GPIOBRST
78 VSF_HW_RST_GPIOB = VSF_HW_RST_GPIO1,
79#endif
80#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
81 VSF_HW_RST_GPIO0 = VSF_HW_CLKRST_REGION(0x4, 0, 1),// GPIOARST
82 VSF_HW_RST_GPIOA = VSF_HW_RST_GPIO0,
83#endif
84
85 // CRM_AHBRST2
86#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
87 VSF_HW_RST_OTGFS1 = VSF_HW_CLKRST_REGION(0x5, 7, 1),// OTGFS1RST
88#endif
89
90 // CRM_AHBRST3
91 VSF_HW_RST_QSPI1 = VSF_HW_CLKRST_REGION(0x6, 1, 1),// QSPI1RST
92
93 // CRM_APB1RST
94#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
95 VSF_HW_RST_UART8 = VSF_HW_CLKRST_REGION(0x7, 31, 1),// UART8RST
96#endif
97#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
98 VSF_HW_RST_UART7 = VSF_HW_CLKRST_REGION(0x7, 30, 1),// UART7RST
99#endif
100 VSF_HW_RST_PWC = VSF_HW_CLKRST_REGION(0x7, 28, 1),// PWCRST
101 VSF_HW_RST_CAN1 = VSF_HW_CLKRST_REGION(0x7, 25, 1),// CAN1RST
102#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
103 VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x7, 23, 1),// I2C3RST
104#endif
105#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
106 VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x7, 22, 1),// I2C2RST
107#endif
108#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
109 VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x7, 21, 1),// I2C1RST
110#endif
111#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
112 VSF_HW_RST_USART5 = VSF_HW_CLKRST_REGION(0x7, 20, 1),// USART5RST
113#endif
114#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
115 VSF_HW_RST_USART4 = VSF_HW_CLKRST_REGION(0x7, 19, 1),// USART4RST
116#endif
117#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
118 VSF_HW_RST_USART3 = VSF_HW_CLKRST_REGION(0x7, 18, 1),// USART3RST
119#endif
120#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
121 VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x7, 17, 1),// USART2RST
122#endif
123#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
124 VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x7, 15, 1),// SPI3RST
125#endif
126#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
127 VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x7, 14, 1),// SPI2RST
128#endif
129 VSF_HW_RST_WWDT = VSF_HW_CLKRST_REGION(0x7, 11, 1),// WWDTRST
130 VSF_HW_RST_TMR14 = VSF_HW_CLKRST_REGION(0x7, 8, 1),// TMR14RST
131 VSF_HW_RST_TMR13 = VSF_HW_CLKRST_REGION(0x7, 7, 1),// TMR13RST
132 VSF_HW_RST_TMR7 = VSF_HW_CLKRST_REGION(0x7, 5, 1),// TMR7RST
133 VSF_HW_RST_TMR6 = VSF_HW_CLKRST_REGION(0x7, 4, 1),// TMR6RST
134 VSF_HW_RST_TMR4 = VSF_HW_CLKRST_REGION(0x7, 2, 1),// TMR4RST
135 VSF_HW_RST_TMR3 = VSF_HW_CLKRST_REGION(0x7, 1, 1),// TMR3RST
136 VSF_HW_RST_TMR2 = VSF_HW_CLKRST_REGION(0x7, 0, 1),// TMR2RST
137
138 // CRM_APB2RST
139 VSF_HW_RST_ACC = VSF_HW_CLKRST_REGION(0x8, 29, 1),// ACCRST
140 VSF_HW_RST_I2SF5 = VSF_HW_CLKRST_REGION(0x8, 20, 1),// I2SF5RST
141 VSF_HW_RST_TMR11 = VSF_HW_CLKRST_REGION(0x8, 18, 1),// TMR11RST
142 VSF_HW_RST_TMR10 = VSF_HW_CLKRST_REGION(0x8, 17, 1),// TMR10RST
143 VSF_HW_RST_TMR9 = VSF_HW_CLKRST_REGION(0x8, 16, 1),// TMR9RST
144 VSF_HW_RST_SCFG = VSF_HW_CLKRST_REGION(0x8, 14, 1),// SCFGRST
145#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
146 VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x8, 12, 1),// SPI1RST
147#endif
148 VSF_HW_RST_ADC = VSF_HW_CLKRST_REGION(0x8, 8, 1),// ADCRST
149#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
150 VSF_HW_RST_USART6 = VSF_HW_CLKRST_REGION(0x8, 5, 1),// USART6RST
151#endif
152#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
153 VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x8, 4, 1),// USART1RST
154#endif
155 VSF_HW_RST_TMR1 = VSF_HW_CLKRST_REGION(0x8, 0, 1),// TMR1RST
156} vsf_hw_peripheral_rst_t;
157
158typedef enum vsf_hw_peripheral_en_t {
159 // CRM_AHBEN1
160#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
161 VSF_HW_EN_OTGHS = VSF_HW_CLKRST_REGION(0xC, 29, 1),// OTGHSEN
162#endif
163 VSF_HW_EN_DMA2 = VSF_HW_CLKRST_REGION(0xC, 24, 1),// DMA2EN
164 VSF_HW_EN_DMA1 = VSF_HW_CLKRST_REGION(0xC, 22, 1),// DMA1EN
165 VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0xC, 12, 1),// CRCEN
166#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
167 VSF_HW_EN_GPIO5 = VSF_HW_CLKRST_REGION(0xC, 5, 1),// GPIOFEN
168 VSF_HW_EN_GPIOF = VSF_HW_EN_GPIO5,
169#endif
170#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
171 VSF_HW_EN_GPIO3 = VSF_HW_CLKRST_REGION(0xC, 3, 1),// GPIODEN
172 VSF_HW_EN_GPIOD = VSF_HW_EN_GPIO3,
173#endif
174#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
175 VSF_HW_EN_GPIO2 = VSF_HW_CLKRST_REGION(0xC, 2, 1),// GPIOCEN
176 VSF_HW_EN_GPIOC = VSF_HW_EN_GPIO2,
177#endif
178#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
179 VSF_HW_EN_GPIO1 = VSF_HW_CLKRST_REGION(0xC, 1, 1),// GPIOBEN
180 VSF_HW_EN_GPIOB = VSF_HW_EN_GPIO1,
181#endif
182#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
183 VSF_HW_EN_GPIO0 = VSF_HW_CLKRST_REGION(0xC, 0, 1),// GPIOAEN
184 VSF_HW_EN_GPIOA = VSF_HW_EN_GPIO0,
185#endif
186
187 // CRM_AHBEN2
188#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
189 VSF_HW_EN_OTGFS1 = VSF_HW_CLKRST_REGION(0xD, 7, 1),// OTGFS1EN
190#endif
191
192 // CRM_AHBEN3
193 VSF_HW_EN_QSPI1 = VSF_HW_CLKRST_REGION(0xE, 1, 1),// QSPI1EN
194
195 // CRM_APB1EN
196#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
197 VSF_HW_EN_UART8 = VSF_HW_CLKRST_REGION(0x10, 31, 1),// UART8EN
198#endif
199#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
200 VSF_HW_EN_UART7 = VSF_HW_CLKRST_REGION(0x10, 30, 1),// UART7EN
201#endif
202 VSF_HW_EN_PWC = VSF_HW_CLKRST_REGION(0x10, 28, 1),// PWCEN
203 VSF_HW_EN_CAN1 = VSF_HW_CLKRST_REGION(0x10, 25, 1),// CAN1EN
204#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
205 VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x10, 23, 1),// I2C3EN
206#endif
207#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
208 VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x10, 22, 1),// I2C2EN
209#endif
210#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
211 VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x10, 21, 1),// I2C1EN
212#endif
213#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
214 VSF_HW_EN_USART5 = VSF_HW_CLKRST_REGION(0x10, 20, 1),// USART5EN
215#endif
216#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
217 VSF_HW_EN_USART4 = VSF_HW_CLKRST_REGION(0x10, 19, 1),// USART4EN
218#endif
219#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
220 VSF_HW_EN_USART3 = VSF_HW_CLKRST_REGION(0x10, 18, 1),// USART3EN
221#endif
222#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
223 VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x10, 17, 1),// USART2EN
224#endif
225#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
226 VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x10, 15, 1),// SPI3EN
227#endif
228#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
229 VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x10, 14, 1),// SPI2EN
230#endif
231 VSF_HW_EN_WWDT = VSF_HW_CLKRST_REGION(0x10, 11, 1),// WWDTEN
232 VSF_HW_EN_TMR14 = VSF_HW_CLKRST_REGION(0x10, 8, 1),// TMR14EN
233 VSF_HW_EN_TMR13 = VSF_HW_CLKRST_REGION(0x10, 7, 1),// TMR13EN
234 VSF_HW_EN_TMR7 = VSF_HW_CLKRST_REGION(0x10, 5, 1),// TMR7EN
235 VSF_HW_EN_TMR6 = VSF_HW_CLKRST_REGION(0x10, 4, 1),// TMR6EN
236 VSF_HW_EN_TMR4 = VSF_HW_CLKRST_REGION(0x10, 2, 1),// TMR4EN
237 VSF_HW_EN_TMR3 = VSF_HW_CLKRST_REGION(0x10, 1, 1),// TMR3EN
238 VSF_HW_EN_TMR2 = VSF_HW_CLKRST_REGION(0x10, 0, 1),// TMR2EN
239
240 // CRM_APB2EN
241 VSF_HW_EN_ACC = VSF_HW_CLKRST_REGION(0x11, 29, 1),// ACCEN
242 VSF_HW_EN_I2SF5 = VSF_HW_CLKRST_REGION(0x11, 20, 1),// I2SF5EN
243 VSF_HW_EN_TMR11 = VSF_HW_CLKRST_REGION(0x11, 18, 1),// TMR11EN
244 VSF_HW_EN_TMR10 = VSF_HW_CLKRST_REGION(0x11, 17, 1),// TMR10EN
245 VSF_HW_EN_TMR9 = VSF_HW_CLKRST_REGION(0x11, 16, 1),// TMR9EN
246 VSF_HW_EN_SCFG = VSF_HW_CLKRST_REGION(0x11, 14, 1),// SCFGEN
247#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
248 VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x11, 12, 1),// SPI1EN
249#endif
250 VSF_HW_EN_ADC = VSF_HW_CLKRST_REGION(0x11, 8, 1),// ADCEN
251#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
252 VSF_HW_EN_USART6 = VSF_HW_CLKRST_REGION(0x11, 5, 1),// USART6EN
253#endif
254#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
255 VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x11, 4, 1),// USART1EN
256#endif
257 VSF_HW_EN_TMR1 = VSF_HW_CLKRST_REGION(0x11, 0, 1),// TMR1EN
258
259 // CRM_AHBLPEN1
260#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
261 VSF_HW_EN_OTGHSLP = VSF_HW_CLKRST_REGION(0x14, 29, 1),// OTGHSLPEN
262#endif
263 VSF_HW_EN_DMA2LP = VSF_HW_CLKRST_REGION(0x14, 24, 1),// DMA2LPEN
264 VSF_HW_EN_DMA1LP = VSF_HW_CLKRST_REGION(0x14, 22, 1),// DMA1LPEN
265 VSF_HW_EN_CRCLP = VSF_HW_CLKRST_REGION(0x14, 12, 1),// CRCLPEN
266#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
267 VSF_HW_EN_GPIO5LP = VSF_HW_CLKRST_REGION(0x14, 5, 1),// GPIOFLPEN
268 VSF_HW_EN_GPIOFLP = VSF_HW_EN_GPIO5LP,
269#endif
270#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
271 VSF_HW_EN_GPIO3LP = VSF_HW_CLKRST_REGION(0x14, 3, 1),// GPIODLPEN
272 VSF_HW_EN_GPIODLP = VSF_HW_EN_GPIO3LP,
273#endif
274#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
275 VSF_HW_EN_GPIO2LP = VSF_HW_CLKRST_REGION(0x14, 2, 1),// GPIOCLPEN
276 VSF_HW_EN_GPIOCLP = VSF_HW_EN_GPIO2LP,
277#endif
278#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
279 VSF_HW_EN_GPIO1LP = VSF_HW_CLKRST_REGION(0x14, 1, 1),// GPIOBLPEN
280 VSF_HW_EN_GPIOBLP = VSF_HW_EN_GPIO1LP,
281#endif
282#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
283 VSF_HW_EN_GPIO0LP = VSF_HW_CLKRST_REGION(0x14, 0, 1),// GPIOALPEN
284 VSF_HW_EN_GPIOALP = VSF_HW_EN_GPIO0LP,
285#endif
286
287 // CRM_AHBLPEN2
288#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
289 VSF_HW_EN_OTGFS1LP = VSF_HW_CLKRST_REGION(0x15, 7, 1),// OTGFS1LPEN
290#endif
291
292 // CRM_AHBLPEN3
293 VSF_HW_EN_QSPI1LP = VSF_HW_CLKRST_REGION(0x16, 1, 1),// QSPI1LPEN
294
295 // CRM_APB1LPEN
296#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
297 VSF_HW_EN_UART8LP = VSF_HW_CLKRST_REGION(0x18, 31, 1),// UART8LPEN
298#endif
299#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
300 VSF_HW_EN_UART7LP = VSF_HW_CLKRST_REGION(0x18, 30, 1),// UART7LPEN
301#endif
302 VSF_HW_EN_PWCLP = VSF_HW_CLKRST_REGION(0x18, 28, 1),// PWCLPEN
303 VSF_HW_EN_CAN1LP = VSF_HW_CLKRST_REGION(0x18, 25, 1),// CAN1LPEN
304#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
305 VSF_HW_EN_I2C3LP = VSF_HW_CLKRST_REGION(0x18, 23, 1),// I2C3LPEN
306#endif
307#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
308 VSF_HW_EN_I2C2LP = VSF_HW_CLKRST_REGION(0x18, 22, 1),// I2C2LPEN
309#endif
310#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
311 VSF_HW_EN_I2C1LP = VSF_HW_CLKRST_REGION(0x18, 21, 1),// I2C1LPEN
312#endif
313#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
314 VSF_HW_EN_USART5LP = VSF_HW_CLKRST_REGION(0x18, 20, 1),// USART5LPEN
315#endif
316#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
317 VSF_HW_EN_USART4LP = VSF_HW_CLKRST_REGION(0x18, 19, 1),// USART4LPEN
318#endif
319#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
320 VSF_HW_EN_USART3LP = VSF_HW_CLKRST_REGION(0x18, 18, 1),// USART3LPEN
321#endif
322#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
323 VSF_HW_EN_USART2LP = VSF_HW_CLKRST_REGION(0x18, 17, 1),// USART2LPEN
324#endif
325#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
326 VSF_HW_EN_SPI3LP = VSF_HW_CLKRST_REGION(0x18, 15, 1),// SPI3LPEN
327#endif
328#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
329 VSF_HW_EN_SPI2LP = VSF_HW_CLKRST_REGION(0x18, 14, 1),// SPI2LPEN
330#endif
331 VSF_HW_EN_WWDTLP = VSF_HW_CLKRST_REGION(0x18, 11, 1),// WWDTLPEN
332 VSF_HW_EN_TMR14LP = VSF_HW_CLKRST_REGION(0x18, 8, 1),// TMR14LPEN
333 VSF_HW_EN_TMR13LP = VSF_HW_CLKRST_REGION(0x18, 7, 1),// TMR13LPEN
334 VSF_HW_EN_TMR7LP = VSF_HW_CLKRST_REGION(0x18, 5, 1),// TMR7LPEN
335 VSF_HW_EN_TMR6LP = VSF_HW_CLKRST_REGION(0x18, 4, 1),// TMR6LPEN
336 VSF_HW_EN_TMR4LP = VSF_HW_CLKRST_REGION(0x18, 2, 1),// TMR4LPEN
337 VSF_HW_EN_TMR3LP = VSF_HW_CLKRST_REGION(0x18, 1, 1),// TMR3LPEN
338 VSF_HW_EN_TMR2LP = VSF_HW_CLKRST_REGION(0x18, 0, 1),// TMR2LPEN
339
340 // CRM_APB2LPEN
341 VSF_HW_EN_ACCLP = VSF_HW_CLKRST_REGION(0x19, 29, 1),// ACCLPEN
342 VSF_HW_EN_I2SF5LP = VSF_HW_CLKRST_REGION(0x19, 20, 1),// I2SF5LPEN
343 VSF_HW_EN_TMR11LP = VSF_HW_CLKRST_REGION(0x19, 18, 1),// TMR11LPEN
344 VSF_HW_EN_TMR10LP = VSF_HW_CLKRST_REGION(0x19, 17, 1),// TMR10LPEN
345 VSF_HW_EN_TMR9LP = VSF_HW_CLKRST_REGION(0x19, 16, 1),// TMR9LPEN
346 VSF_HW_EN_SCFGLP = VSF_HW_CLKRST_REGION(0x19, 14, 1),// SCFGLPEN
347#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
348 VSF_HW_EN_SPI1LP = VSF_HW_CLKRST_REGION(0x19, 12, 1),// SPI1LPEN
349#endif
350 VSF_HW_EN_ADCLP = VSF_HW_CLKRST_REGION(0x19, 8, 1),// ADCLPEN
351#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
352 VSF_HW_EN_USART6LP = VSF_HW_CLKRST_REGION(0x19, 5, 1),// USART6LPEN
353#endif
354#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
355 VSF_HW_EN_USART1LP = VSF_HW_CLKRST_REGION(0x19, 4, 1),// USART1LPEN
356#endif
357 VSF_HW_EN_TMR1LP = VSF_HW_CLKRST_REGION(0x19, 0, 1),// TMR1LPEN
358} vsf_hw_peripheral_en_t;
359
360typedef struct vsf_hw_clk_t vsf_hw_clk_t;
361
362/*============================ GLOBAL VARIABLES ==============================*/
363
364extern const vsf_hw_clk_t VSF_HW_CLK_HSE;
365#define VSF_HW_CLK_HEXT VSF_HW_CLK_HSE
366extern const vsf_hw_clk_t VSF_HW_CLK_HSI48;
367extern const vsf_hw_clk_t VSF_HW_CLK_HSI8;
368extern const vsf_hw_clk_t VSF_HW_CLK_HSI;
369#define VSF_HW_CLK_HICK VSF_HW_CLK_HSI
370extern const vsf_hw_clk_t VSF_HW_CLK_LSE;
371#define VSF_HW_CLK_LEXT VSF_HW_CLK_LSE
372extern const vsf_hw_clk_t VSF_HW_CLK_LSI;
373#define VSF_HW_CLK_LICK VSF_HW_CLK_LSI
374
375extern const vsf_hw_clk_t VSF_HW_CLK_PLL;
376extern const vsf_hw_clk_t VSF_HW_CLK_PLLP;
377extern const vsf_hw_clk_t VSF_HW_CLK_PLLU;
378
379extern const vsf_hw_clk_t VSF_HW_CLK_SYS;
380#define VSF_HW_CLK_SCLK VSF_HW_CLK_SYS
381extern const vsf_hw_clk_t VSF_HW_CLK_AHB;
382#define VSF_HW_CLK_HCLK VSF_HW_CLK_AHB
383#define VSF_HW_CLK_CPU VSF_HW_CLK_AHB
384
385extern const vsf_hw_clk_t VSF_HW_CLK_SYSTICK_EXT;
386extern const vsf_hw_clk_t VSF_HW_CLK_APB1;
387extern const vsf_hw_clk_t VSF_HW_CLK_APB2;
388
389#define VSF_HW_CLK_I2S1 VSF_HW_CLK_SYS
390#define VSF_HW_CLK_I2S2 VSF_HW_CLK_SYS
391#define VSF_HW_CLK_I2S3 VSF_HW_CLK_SYS
392
393#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
394# define VSF_HW_CLK_USART1 VSF_HW_CLK_APB2
395#endif
396#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
397# define VSF_HW_CLK_USART2 VSF_HW_CLK_APB1
398#endif
399#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
400# define VSF_HW_CLK_USART3 VSF_HW_CLK_APB1
401#endif
402#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
403# define VSF_HW_CLK_USART4 VSF_HW_CLK_APB1
404#endif
405#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
406# define VSF_HW_CLK_USART5 VSF_HW_CLK_APB1
407#endif
408#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
409# define VSF_HW_CLK_USART6 VSF_HW_CLK_APB2
410#endif
411#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
412# define VSF_HW_CLK_USART7 VSF_HW_CLK_APB1
413# define VSF_HW_CLK_UART7 VSF_HW_CLK_USART7
414#endif
415#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
416# define VSF_HW_CLK_USART8 VSF_HW_CLK_APB1
417# define VSF_HW_CLK_UART8 VSF_HW_CLK_USART8
418#endif
419
420#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
421# define VSF_HW_CLK_SPI1 VSF_HW_CLK_APB2
422#endif
423#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
424# define VSF_HW_CLK_SPI2 VSF_HW_CLK_APB1
425#endif
426#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
427# define VSF_HW_CLK_SPI3 VSF_HW_CLK_APB1
428#endif
429
430#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
431# define VSF_HW_CLK_I2C1 VSF_HW_CLK_APB1
432#endif
433#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
434# define VSF_HW_CLK_I2C2 VSF_HW_CLK_APB1
435#endif
436#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
437# define VSF_HW_CLK_I2C3 VSF_HW_CLK_APB1
438#endif
439
440/*============================ LOCAL VARIABLES ===============================*/
441/*============================ INCLUDES ======================================*/
442/*============================ PROTOTYPES ====================================*/
443
444extern void vsf_hw_clkrst_region_set(uint32_t region, uint_fast8_t value);
445extern uint_fast8_t vsf_hw_clkrst_region_get(uint32_t region);
446
447extern void vsf_hw_clkrst_region_set_bit(uint32_t region);
448extern void vsf_hw_clkrst_region_clear_bit(uint32_t region);
449extern uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region);
450
451extern const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk);
452extern uint32_t vsf_hw_clk_get_freq_hz(const vsf_hw_clk_t *clk);
453extern void vsf_hw_clk_enable(const vsf_hw_clk_t *clk);
454extern void vsf_hw_clk_disable(const vsf_hw_clk_t *clk);
455extern bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk);
456extern bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk);
457extern vsf_err_t vsf_hw_clk_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz);
458
459extern vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t mul, uint16_t div, uint32_t out_freq_hz);
460
461#endif
462/* EOF */
vsf_err_t
vsf_err_t
Definition __type.h:42
VSF_HW_CLK_SYS
const vsf_hw_clk_t VSF_HW_CLK_SYS
Definition driver.c:190
vsf_hw_peripheral_rst_t
vsf_hw_peripheral_rst_t
Definition common.h:56
VSF_HW_RST_TMR14
@ VSF_HW_RST_TMR14
Definition common.h:130
VSF_HW_RST_TMR7
@ VSF_HW_RST_TMR7
Definition common.h:132
VSF_HW_RST_TMR10
@ VSF_HW_RST_TMR10
Definition common.h:142
VSF_HW_RST_TMR4
@ VSF_HW_RST_TMR4
Definition common.h:134
VSF_HW_RST_QSPI1
@ VSF_HW_RST_QSPI1
Definition common.h:91
VSF_HW_RST_TMR3
@ VSF_HW_RST_TMR3
Definition common.h:135
VSF_HW_RST_DMA1
@ VSF_HW_RST_DMA1
Definition common.h:62
VSF_HW_RST_DMA2
@ VSF_HW_RST_DMA2
Definition common.h:61
VSF_HW_RST_ADC
@ VSF_HW_RST_ADC
Definition common.h:148
VSF_HW_RST_I2SF5
@ VSF_HW_RST_I2SF5
Definition common.h:140
VSF_HW_RST_TMR2
@ VSF_HW_RST_TMR2
Definition common.h:136
VSF_HW_RST_SCFG
@ VSF_HW_RST_SCFG
Definition common.h:144
VSF_HW_RST_TMR11
@ VSF_HW_RST_TMR11
Definition common.h:141
VSF_HW_RST_CRC
@ VSF_HW_RST_CRC
Definition common.h:63
VSF_HW_RST_TMR6
@ VSF_HW_RST_TMR6
Definition common.h:133
VSF_HW_RST_PWC
@ VSF_HW_RST_PWC
Definition common.h:100
VSF_HW_RST_WWDT
@ VSF_HW_RST_WWDT
Definition common.h:129
VSF_HW_RST_CAN1
@ VSF_HW_RST_CAN1
Definition common.h:101
VSF_HW_RST_TMR13
@ VSF_HW_RST_TMR13
Definition common.h:131
VSF_HW_RST_ACC
@ VSF_HW_RST_ACC
Definition common.h:139
VSF_HW_RST_TMR1
@ VSF_HW_RST_TMR1
Definition common.h:155
VSF_HW_RST_TMR9
@ VSF_HW_RST_TMR9
Definition common.h:143
VSF_HW_CLK_LSI
const vsf_hw_clk_t VSF_HW_CLK_LSI
Definition driver.c:127
VSF_HW_CLK_HSI48
const vsf_hw_clk_t VSF_HW_CLK_HSI48
Definition driver.c:94
VSF_HW_CLK_PLL
const vsf_hw_clk_t VSF_HW_CLK_PLL
Definition driver.c:152
VSF_HW_CLK_APB2
const vsf_hw_clk_t VSF_HW_CLK_APB2
Definition driver.c:230
vsf_hw_pll_config
vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t mul, uint16_t div, uint32_t out_freq_hz)
Definition driver.c:537
VSF_HW_CLK_HSI8
const vsf_hw_clk_t VSF_HW_CLK_HSI8
Definition driver.c:103
VSF_HW_CLK_AHB
const vsf_hw_clk_t VSF_HW_CLK_AHB
Definition driver.c:202
vsf_hw_clk_is_ready
bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk)
Definition driver.c:440
vsf_hw_clk_config
vsf_err_t vsf_hw_clk_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
Definition driver.c:453
VSF_HW_CLK_PLLU
const vsf_hw_clk_t VSF_HW_CLK_PLLU
Definition driver.c:177
VSF_HW_CLK_LSE
const vsf_hw_clk_t VSF_HW_CLK_LSE
Definition driver.c:119
vsf_hw_clk_disable
void vsf_hw_clk_disable(const vsf_hw_clk_t *clk)
Definition driver.c:424
VSF_HW_CLK_HSI
const vsf_hw_clk_t VSF_HW_CLK_HSI
Definition driver.c:113
vsf_hw_clk_get_freq_hz
uint32_t vsf_hw_clk_get_freq_hz(const vsf_hw_clk_t *clk)
Definition driver.c:370
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:158
VSF_HW_EN_PWCLP
@ VSF_HW_EN_PWCLP
Definition common.h:302
VSF_HW_EN_ADCLP
@ VSF_HW_EN_ADCLP
Definition common.h:350
VSF_HW_EN_TMR6
@ VSF_HW_EN_TMR6
Definition common.h:235
VSF_HW_EN_TMR7
@ VSF_HW_EN_TMR7
Definition common.h:234
VSF_HW_EN_ACC
@ VSF_HW_EN_ACC
Definition common.h:241
VSF_HW_EN_TMR11LP
@ VSF_HW_EN_TMR11LP
Definition common.h:343
VSF_HW_EN_WWDT
@ VSF_HW_EN_WWDT
Definition common.h:231
VSF_HW_EN_DMA2LP
@ VSF_HW_EN_DMA2LP
Definition common.h:263
VSF_HW_EN_TMR13LP
@ VSF_HW_EN_TMR13LP
Definition common.h:333
VSF_HW_EN_TMR4LP
@ VSF_HW_EN_TMR4LP
Definition common.h:336
VSF_HW_EN_CAN1LP
@ VSF_HW_EN_CAN1LP
Definition common.h:303
VSF_HW_EN_QSPI1
@ VSF_HW_EN_QSPI1
Definition common.h:193
VSF_HW_EN_DMA2
@ VSF_HW_EN_DMA2
Definition common.h:163
VSF_HW_EN_DMA1LP
@ VSF_HW_EN_DMA1LP
Definition common.h:264
VSF_HW_EN_TMR2
@ VSF_HW_EN_TMR2
Definition common.h:238
VSF_HW_EN_TMR2LP
@ VSF_HW_EN_TMR2LP
Definition common.h:338
VSF_HW_EN_TMR11
@ VSF_HW_EN_TMR11
Definition common.h:243
VSF_HW_EN_TMR1
@ VSF_HW_EN_TMR1
Definition common.h:257
VSF_HW_EN_TMR4
@ VSF_HW_EN_TMR4
Definition common.h:236
VSF_HW_EN_ADC
@ VSF_HW_EN_ADC
Definition common.h:250
VSF_HW_EN_TMR10
@ VSF_HW_EN_TMR10
Definition common.h:244
VSF_HW_EN_CRC
@ VSF_HW_EN_CRC
Definition common.h:165
VSF_HW_EN_QSPI1LP
@ VSF_HW_EN_QSPI1LP
Definition common.h:293
VSF_HW_EN_SCFG
@ VSF_HW_EN_SCFG
Definition common.h:246
VSF_HW_EN_TMR3
@ VSF_HW_EN_TMR3
Definition common.h:237
VSF_HW_EN_TMR14
@ VSF_HW_EN_TMR14
Definition common.h:232
VSF_HW_EN_I2SF5
@ VSF_HW_EN_I2SF5
Definition common.h:242
VSF_HW_EN_DMA1
@ VSF_HW_EN_DMA1
Definition common.h:164
VSF_HW_EN_TMR9
@ VSF_HW_EN_TMR9
Definition common.h:245
VSF_HW_EN_ACCLP
@ VSF_HW_EN_ACCLP
Definition common.h:341
VSF_HW_EN_SCFGLP
@ VSF_HW_EN_SCFGLP
Definition common.h:346
VSF_HW_EN_I2SF5LP
@ VSF_HW_EN_I2SF5LP
Definition common.h:342
VSF_HW_EN_TMR6LP
@ VSF_HW_EN_TMR6LP
Definition common.h:335
VSF_HW_EN_TMR7LP
@ VSF_HW_EN_TMR7LP
Definition common.h:334
VSF_HW_EN_PWC
@ VSF_HW_EN_PWC
Definition common.h:202
VSF_HW_EN_CRCLP
@ VSF_HW_EN_CRCLP
Definition common.h:265
VSF_HW_EN_TMR3LP
@ VSF_HW_EN_TMR3LP
Definition common.h:337
VSF_HW_EN_TMR10LP
@ VSF_HW_EN_TMR10LP
Definition common.h:344
VSF_HW_EN_TMR1LP
@ VSF_HW_EN_TMR1LP
Definition common.h:357
VSF_HW_EN_CAN1
@ VSF_HW_EN_CAN1
Definition common.h:203
VSF_HW_EN_TMR14LP
@ VSF_HW_EN_TMR14LP
Definition common.h:332
VSF_HW_EN_WWDTLP
@ VSF_HW_EN_WWDTLP
Definition common.h:331
VSF_HW_EN_TMR13
@ VSF_HW_EN_TMR13
Definition common.h:233
VSF_HW_EN_TMR9LP
@ VSF_HW_EN_TMR9LP
Definition common.h:345
VSF_HW_CLK_PLLP
const vsf_hw_clk_t VSF_HW_CLK_PLLP
Definition driver.c:166
vsf_hw_clkrst_region_get
uint_fast8_t vsf_hw_clkrst_region_get(uint32_t region)
Definition driver.c:270
vsf_hw_clk_is_enabled
bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk)
Definition driver.c:432
VSF_HW_CLK_HSE
const vsf_hw_clk_t VSF_HW_CLK_HSE
Definition driver.c:77
VSF_HW_CLKRST_REGION
#define VSF_HW_CLKRST_REGION
Definition common.h:38
VSF_HW_CLK_APB1
const vsf_hw_clk_t VSF_HW_CLK_APB1
Definition driver.c:221
vsf_hw_clkrst_region_set
void vsf_hw_clkrst_region_set(uint32_t region, uint_fast8_t value)
Definition driver.c:257
vsf_hw_clk_enable
void vsf_hw_clk_enable(const vsf_hw_clk_t *clk)
Definition driver.c:415
VSF_HW_CLK_SYSTICK_EXT
const vsf_hw_clk_t VSF_HW_CLK_SYSTICK_EXT
Definition driver.c:210
vsf_hw_clk_get_src
const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk)
Definition driver.c:332
VSF_HW_RST_UART7
@ VSF_HW_RST_UART7
Definition common.h:103
VSF_HW_RST_SPI2
@ VSF_HW_RST_SPI2
Definition common.h:117
VSF_HW_RST_GPIOA
@ VSF_HW_RST_GPIOA
Definition common.h:100
VSF_HW_RST_USART2
@ VSF_HW_RST_USART2
Definition common.h:114
VSF_HW_RST_I2C2
@ VSF_HW_RST_I2C2
Definition common.h:109
VSF_HW_RST_SPI1
@ VSF_HW_RST_SPI1
Definition common.h:118
VSF_HW_RST_GPIOF
@ VSF_HW_RST_GPIOF
Definition common.h:95
VSF_HW_RST_GPIOC
@ VSF_HW_RST_GPIOC
Definition common.h:98
VSF_HW_RST_I2C1
@ VSF_HW_RST_I2C1
Definition common.h:110
VSF_HW_RST_GPIOB
@ VSF_HW_RST_GPIOB
Definition common.h:99
VSF_HW_RST_USART1
@ VSF_HW_RST_USART1
Definition common.h:115
VSF_HW_RST_USART5
@ VSF_HW_RST_USART5
Definition common.h:155
VSF_HW_RST_GPIOD
@ VSF_HW_RST_GPIOD
Definition common.h:97
VSF_HW_RST_I2C3
@ VSF_HW_RST_I2C3
Definition common.h:108
VSF_HW_RST_SPI3
@ VSF_HW_RST_SPI3
Definition common.h:150
VSF_HW_EN_SPI2
@ VSF_HW_EN_SPI2
Definition common.h:243
VSF_HW_EN_UART7
@ VSF_HW_EN_UART7
Definition common.h:229
VSF_HW_EN_SPI1
@ VSF_HW_EN_SPI1
Definition common.h:244
VSF_HW_EN_USART2
@ VSF_HW_EN_USART2
Definition common.h:240
VSF_HW_EN_GPIOB
@ VSF_HW_EN_GPIOB
Definition common.h:225
VSF_HW_EN_GPIOC
@ VSF_HW_EN_GPIOC
Definition common.h:224
VSF_HW_EN_I2C1
@ VSF_HW_EN_I2C1
Definition common.h:236
VSF_HW_EN_SPI3
@ VSF_HW_EN_SPI3
Definition common.h:276
VSF_HW_EN_GPIOD
@ VSF_HW_EN_GPIOD
Definition common.h:223
VSF_HW_EN_USART5
@ VSF_HW_EN_USART5
Definition common.h:281
VSF_HW_EN_GPIOA
@ VSF_HW_EN_GPIOA
Definition common.h:226
VSF_HW_EN_USART1
@ VSF_HW_EN_USART1
Definition common.h:241
VSF_HW_EN_I2C2
@ VSF_HW_EN_I2C2
Definition common.h:235
VSF_HW_EN_I2C3
@ VSF_HW_EN_I2C3
Definition common.h:234
VSF_HW_EN_GPIOF
@ VSF_HW_EN_GPIOF
Definition common.h:221
VSF_HW_RST_USART3
@ VSF_HW_RST_USART3
Definition common.h:156
VSF_HW_RST_GPIO3
@ VSF_HW_RST_GPIO3
Definition common.h:117
VSF_HW_RST_USART4
@ VSF_HW_RST_USART4
Definition common.h:157
VSF_HW_RST_USART6
@ VSF_HW_RST_USART6
Definition common.h:196
VSF_HW_RST_GPIO5
@ VSF_HW_RST_GPIO5
Definition common.h:119
VSF_HW_RST_GPIO1
@ VSF_HW_RST_GPIO1
Definition common.h:115
VSF_HW_RST_GPIO2
@ VSF_HW_RST_GPIO2
Definition common.h:116
VSF_HW_RST_GPIO0
@ VSF_HW_RST_GPIO0
Definition common.h:114
VSF_HW_EN_GPIOCLP
@ VSF_HW_EN_GPIOCLP
Definition common.h:981
VSF_HW_EN_GPIOFLP
@ VSF_HW_EN_GPIOFLP
Definition common.h:987
VSF_HW_EN_GPIODLP
@ VSF_HW_EN_GPIODLP
Definition common.h:983
VSF_HW_EN_GPIOALP
@ VSF_HW_EN_GPIOALP
Definition common.h:977
VSF_HW_EN_GPIOBLP
@ VSF_HW_EN_GPIOBLP
Definition common.h:979
VSF_HW_RST_OTGHS
@ VSF_HW_RST_OTGHS
Definition common.h:59
VSF_HW_RST_UART8
@ VSF_HW_RST_UART8
Definition common.h:104
VSF_HW_EN_USART3
@ VSF_HW_EN_USART3
Definition common.h:229
VSF_HW_EN_UART8
@ VSF_HW_EN_UART8
Definition common.h:220
VSF_HW_EN_OTGHS
@ VSF_HW_EN_OTGHS
Definition common.h:170
VSF_HW_EN_USART6
@ VSF_HW_EN_USART6
Definition common.h:81
vsf_hw_clkrst_region_clear_bit
void vsf_hw_clkrst_region_clear_bit(uint32_t region)
Definition driver.c:290
vsf_hw_clkrst_region_set_bit
void vsf_hw_clkrst_region_set_bit(uint32_t region)
Definition driver.c:278
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:131
vsf_hw_clkrst_region_get_bit
uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region)
Definition driver.c:302
uint16_t
unsigned short uint16_t
Definition stdint.h:7
uint_fast8_t
unsigned char uint_fast8_t
Definition stdint.h:23
uint32_t
unsigned uint32_t
Definition stdint.h:9
vsf_hw_clk_t
Definition driver.c:44
vsf_hw_clk_t::prescaler
uint32_t prescaler
Definition driver.c:64
vsf_hw_clk_t::clksrc
const vsf_hw_clk_t * clksrc
Definition driver.c:60
div
div_t div(int numer, int denom)
vsf_arch.h
value
vk_av_control_value_t value
Definition vsf_audio.h:171
vsf_hal_cfg.h
Generated from commit: vsfteam/vsf@3f091ef