VSF Documented
common.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __HAL_DRIVER_ARTERY_AT32F402_405_COMMON_H__
19#define __HAL_DRIVER_ARTERY_AT32F402_405_COMMON_H__
20
21/* \note __common.h should only be included by device.h */
22
23/*============================ INCLUDES ======================================*/
24
25#include "hal/vsf_hal_cfg.h"
26#include "hal/arch/vsf_arch.h"
27
28// CMSIS headers which will not be included in core_xxx.h
29// and arm_math.h CAN ONLY be included after core_xxx.h
30//#include "arm_math.h"
31
32/*============================ MACROS ========================================*/
33
34// CLK & RST REGION
35
36#define VSF_HW_REG_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH) \
37 (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
38#define VSF_HW_CLKRST_REGION VSF_HW_REG_REGION
39
40/*============================ MACROFIED FUNCTIONS ===========================*/
41
42#define vsf_hw_peripheral_clk_set vsf_hw_clkrst_region_set
43#define vsf_hw_peripheral_clk_get vsf_hw_clkrst_region_get
44
45#define vsf_hw_peripheral_rst_set vsf_hw_clkrst_region_set_bit
46#define vsf_hw_peripheral_rst_clear vsf_hw_clkrst_region_clear_bit
47#define vsf_hw_peripheral_rst_get vsf_hw_clkrst_region_get_bit
48
49#define vsf_hw_peripheral_enable vsf_hw_clkrst_region_set_bit
50#define vsf_hw_peripheral_disable vsf_hw_clkrst_region_clear_bit
51
52#define VSF_SYSTIMER_FREQ vsf_hw_clk_get_freq_hz(&VSF_HW_CLK_CPU)
53
54/*============================ TYPES =========================================*/
55
57 // CRM_AHBRST1
58#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
59 VSF_HW_RST_OTGHS = VSF_HW_CLKRST_REGION(0x4, 29, 1),// OTGHSRST
60#endif
61 VSF_HW_RST_DMA2 = VSF_HW_CLKRST_REGION(0x4, 24, 1),// DMA2RST
62 VSF_HW_RST_DMA1 = VSF_HW_CLKRST_REGION(0x4, 22, 1),// DMA1RST
63 VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x4, 12, 1),// CRCRST
64#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
65 VSF_HW_RST_GPIO5 = VSF_HW_CLKRST_REGION(0x4, 5, 1),// GPIOFRST
67#endif
68#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
69 VSF_HW_RST_GPIO3 = VSF_HW_CLKRST_REGION(0x4, 3, 1),// GPIODRST
71#endif
72#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
73 VSF_HW_RST_GPIO2 = VSF_HW_CLKRST_REGION(0x4, 2, 1),// GPIOCRST
75#endif
76#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
77 VSF_HW_RST_GPIO1 = VSF_HW_CLKRST_REGION(0x4, 1, 1),// GPIOBRST
79#endif
80#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
81 VSF_HW_RST_GPIO0 = VSF_HW_CLKRST_REGION(0x4, 0, 1),// GPIOARST
83#endif
84
85 // CRM_AHBRST2
86#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
87 VSF_HW_RST_USBOTG0 = VSF_HW_CLKRST_REGION(0x5, 7, 1),// OTGFS1RST
88 VSF_HW_RST_OTGFS1 = VSF_HW_RST_USBOTG0,
89#endif
90
91 // CRM_AHBRST3
92 VSF_HW_RST_QSPI1 = VSF_HW_CLKRST_REGION(0x6, 1, 1),// QSPI1RST
93
94 // CRM_APB1RST
95#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
96 VSF_HW_RST_UART8 = VSF_HW_CLKRST_REGION(0x7, 31, 1),// UART8RST
97#endif
98#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
99 VSF_HW_RST_UART7 = VSF_HW_CLKRST_REGION(0x7, 30, 1),// UART7RST
100#endif
101 VSF_HW_RST_PWC = VSF_HW_CLKRST_REGION(0x7, 28, 1),// PWCRST
102 VSF_HW_RST_CAN1 = VSF_HW_CLKRST_REGION(0x7, 25, 1),// CAN1RST
103#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
104 VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x7, 23, 1),// I2C3RST
105#endif
106#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
107 VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x7, 22, 1),// I2C2RST
108#endif
109#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
110 VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x7, 21, 1),// I2C1RST
111#endif
112#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
113 VSF_HW_RST_USART5 = VSF_HW_CLKRST_REGION(0x7, 20, 1),// USART5RST
114#endif
115#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
116 VSF_HW_RST_USART4 = VSF_HW_CLKRST_REGION(0x7, 19, 1),// USART4RST
117#endif
118#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
119 VSF_HW_RST_USART3 = VSF_HW_CLKRST_REGION(0x7, 18, 1),// USART3RST
120#endif
121#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
122 VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x7, 17, 1),// USART2RST
123#endif
124#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
125 VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x7, 15, 1),// SPI3RST
126#endif
127#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
128 VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x7, 14, 1),// SPI2RST
129#endif
130 VSF_HW_RST_WWDT = VSF_HW_CLKRST_REGION(0x7, 11, 1),// WWDTRST
131 VSF_HW_RST_TMR14 = VSF_HW_CLKRST_REGION(0x7, 8, 1),// TMR14RST
132 VSF_HW_RST_TMR13 = VSF_HW_CLKRST_REGION(0x7, 7, 1),// TMR13RST
133 VSF_HW_RST_TMR7 = VSF_HW_CLKRST_REGION(0x7, 5, 1),// TMR7RST
134 VSF_HW_RST_TMR6 = VSF_HW_CLKRST_REGION(0x7, 4, 1),// TMR6RST
135 VSF_HW_RST_TMR4 = VSF_HW_CLKRST_REGION(0x7, 2, 1),// TMR4RST
136 VSF_HW_RST_TMR3 = VSF_HW_CLKRST_REGION(0x7, 1, 1),// TMR3RST
137 VSF_HW_RST_TMR2 = VSF_HW_CLKRST_REGION(0x7, 0, 1),// TMR2RST
138
139 // CRM_APB2RST
140 VSF_HW_RST_ACC = VSF_HW_CLKRST_REGION(0x8, 29, 1),// ACCRST
141 VSF_HW_RST_I2SF5 = VSF_HW_CLKRST_REGION(0x8, 20, 1),// I2SF5RST
142 VSF_HW_RST_TMR11 = VSF_HW_CLKRST_REGION(0x8, 18, 1),// TMR11RST
143 VSF_HW_RST_TMR10 = VSF_HW_CLKRST_REGION(0x8, 17, 1),// TMR10RST
144 VSF_HW_RST_TMR9 = VSF_HW_CLKRST_REGION(0x8, 16, 1),// TMR9RST
145 VSF_HW_RST_SCFG = VSF_HW_CLKRST_REGION(0x8, 14, 1),// SCFGRST
146#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
147 VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x8, 12, 1),// SPI1RST
148#endif
150#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
151 VSF_HW_RST_USART6 = VSF_HW_CLKRST_REGION(0x8, 5, 1),// USART6RST
152#endif
153#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
154 VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x8, 4, 1),// USART1RST
155#endif
156 VSF_HW_RST_TMR1 = VSF_HW_CLKRST_REGION(0x8, 0, 1),// TMR1RST
158
160 // CRM_AHBEN1
161#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
162 VSF_HW_EN_OTGHS = VSF_HW_CLKRST_REGION(0xC, 29, 1),// OTGHSEN
163#endif
164 VSF_HW_EN_DMA2 = VSF_HW_CLKRST_REGION(0xC, 24, 1),// DMA2EN
165 VSF_HW_EN_DMA1 = VSF_HW_CLKRST_REGION(0xC, 22, 1),// DMA1EN
166 VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0xC, 12, 1),// CRCEN
167#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
168 VSF_HW_EN_GPIO5 = VSF_HW_CLKRST_REGION(0xC, 5, 1),// GPIOFEN
169 VSF_HW_EN_GPIOF = VSF_HW_EN_GPIO5,
170#endif
171#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
172 VSF_HW_EN_GPIO3 = VSF_HW_CLKRST_REGION(0xC, 3, 1),// GPIODEN
173 VSF_HW_EN_GPIOD = VSF_HW_EN_GPIO3,
174#endif
175#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
176 VSF_HW_EN_GPIO2 = VSF_HW_CLKRST_REGION(0xC, 2, 1),// GPIOCEN
177 VSF_HW_EN_GPIOC = VSF_HW_EN_GPIO2,
178#endif
179#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
180 VSF_HW_EN_GPIO1 = VSF_HW_CLKRST_REGION(0xC, 1, 1),// GPIOBEN
181 VSF_HW_EN_GPIOB = VSF_HW_EN_GPIO1,
182#endif
183#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
184 VSF_HW_EN_GPIO0 = VSF_HW_CLKRST_REGION(0xC, 0, 1),// GPIOAEN
185 VSF_HW_EN_GPIOA = VSF_HW_EN_GPIO0,
186#endif
187
188 // CRM_AHBEN2
189#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
190 VSF_HW_EN_USBOTG0 = VSF_HW_CLKRST_REGION(0xD, 7, 1),// OTGFS1EN
191 VSF_HW_EN_OTGFS1 = VSF_HW_EN_USBOTG0,
192#endif
193
194 // CRM_AHBEN3
195 VSF_HW_EN_QSPI1 = VSF_HW_CLKRST_REGION(0xE, 1, 1),// QSPI1EN
196
197 // CRM_APB1EN
198#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
199 VSF_HW_EN_UART8 = VSF_HW_CLKRST_REGION(0x10, 31, 1),// UART8EN
200#endif
201#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
202 VSF_HW_EN_UART7 = VSF_HW_CLKRST_REGION(0x10, 30, 1),// UART7EN
203#endif
204 VSF_HW_EN_PWC = VSF_HW_CLKRST_REGION(0x10, 28, 1),// PWCEN
205 VSF_HW_EN_CAN1 = VSF_HW_CLKRST_REGION(0x10, 25, 1),// CAN1EN
206#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
207 VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x10, 23, 1),// I2C3EN
208#endif
209#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
210 VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x10, 22, 1),// I2C2EN
211#endif
212#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
213 VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x10, 21, 1),// I2C1EN
214#endif
215#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
216 VSF_HW_EN_USART5 = VSF_HW_CLKRST_REGION(0x10, 20, 1),// USART5EN
217#endif
218#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
219 VSF_HW_EN_USART4 = VSF_HW_CLKRST_REGION(0x10, 19, 1),// USART4EN
220#endif
221#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
222 VSF_HW_EN_USART3 = VSF_HW_CLKRST_REGION(0x10, 18, 1),// USART3EN
223#endif
224#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
225 VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x10, 17, 1),// USART2EN
226#endif
227#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
228 VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x10, 15, 1),// SPI3EN
229#endif
230#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
231 VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x10, 14, 1),// SPI2EN
232#endif
233 VSF_HW_EN_WWDT = VSF_HW_CLKRST_REGION(0x10, 11, 1),// WWDTEN
234 VSF_HW_EN_TMR14 = VSF_HW_CLKRST_REGION(0x10, 8, 1),// TMR14EN
235 VSF_HW_EN_TMR13 = VSF_HW_CLKRST_REGION(0x10, 7, 1),// TMR13EN
236 VSF_HW_EN_TMR7 = VSF_HW_CLKRST_REGION(0x10, 5, 1),// TMR7EN
237 VSF_HW_EN_TMR6 = VSF_HW_CLKRST_REGION(0x10, 4, 1),// TMR6EN
238 VSF_HW_EN_TMR4 = VSF_HW_CLKRST_REGION(0x10, 2, 1),// TMR4EN
239 VSF_HW_EN_TMR3 = VSF_HW_CLKRST_REGION(0x10, 1, 1),// TMR3EN
240 VSF_HW_EN_TMR2 = VSF_HW_CLKRST_REGION(0x10, 0, 1),// TMR2EN
241
242 // CRM_APB2EN
243 VSF_HW_EN_ACC = VSF_HW_CLKRST_REGION(0x11, 29, 1),// ACCEN
244 VSF_HW_EN_I2SF5 = VSF_HW_CLKRST_REGION(0x11, 20, 1),// I2SF5EN
245 VSF_HW_EN_TMR11 = VSF_HW_CLKRST_REGION(0x11, 18, 1),// TMR11EN
246 VSF_HW_EN_TMR10 = VSF_HW_CLKRST_REGION(0x11, 17, 1),// TMR10EN
247 VSF_HW_EN_TMR9 = VSF_HW_CLKRST_REGION(0x11, 16, 1),// TMR9EN
248 VSF_HW_EN_SCFG = VSF_HW_CLKRST_REGION(0x11, 14, 1),// SCFGEN
249#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
250 VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x11, 12, 1),// SPI1EN
251#endif
252 VSF_HW_EN_ADC = VSF_HW_CLKRST_REGION(0x11, 8, 1),// ADCEN
253#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
254 VSF_HW_EN_USART6 = VSF_HW_CLKRST_REGION(0x11, 5, 1),// USART6EN
255#endif
256#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
257 VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x11, 4, 1),// USART1EN
258#endif
259 VSF_HW_EN_TMR1 = VSF_HW_CLKRST_REGION(0x11, 0, 1),// TMR1EN
260
261 // CRM_AHBLPEN1
262#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 1))
263 VSF_HW_EN_OTGHSLP = VSF_HW_CLKRST_REGION(0x14, 29, 1),// OTGHSLPEN
264#endif
265 VSF_HW_EN_DMA2LP = VSF_HW_CLKRST_REGION(0x14, 24, 1),// DMA2LPEN
266 VSF_HW_EN_DMA1LP = VSF_HW_CLKRST_REGION(0x14, 22, 1),// DMA1LPEN
267 VSF_HW_EN_CRCLP = VSF_HW_CLKRST_REGION(0x14, 12, 1),// CRCLPEN
268#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 5))
269 VSF_HW_EN_GPIO5LP = VSF_HW_CLKRST_REGION(0x14, 5, 1),// GPIOFLPEN
270 VSF_HW_EN_GPIOFLP = VSF_HW_EN_GPIO5LP,
271#endif
272#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 3))
273 VSF_HW_EN_GPIO3LP = VSF_HW_CLKRST_REGION(0x14, 3, 1),// GPIODLPEN
274 VSF_HW_EN_GPIODLP = VSF_HW_EN_GPIO3LP,
275#endif
276#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 2))
277 VSF_HW_EN_GPIO2LP = VSF_HW_CLKRST_REGION(0x14, 2, 1),// GPIOCLPEN
278 VSF_HW_EN_GPIOCLP = VSF_HW_EN_GPIO2LP,
279#endif
280#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 1))
281 VSF_HW_EN_GPIO1LP = VSF_HW_CLKRST_REGION(0x14, 1, 1),// GPIOBLPEN
282 VSF_HW_EN_GPIOBLP = VSF_HW_EN_GPIO1LP,
283#endif
284#if defined(VSF_HW_GPIO_PORT_MASK) && (VSF_HW_GPIO_PORT_MASK & (1 << 0))
285 VSF_HW_EN_GPIO0LP = VSF_HW_CLKRST_REGION(0x14, 0, 1),// GPIOALPEN
286 VSF_HW_EN_GPIOALP = VSF_HW_EN_GPIO0LP,
287#endif
288
289 // CRM_AHBLPEN2
290#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
291 VSF_HW_EN_USBOTG0LP = VSF_HW_CLKRST_REGION(0x15, 7, 1),// OTGFS1LPEN
292 VSF_HW_EN_OTGFS1LP = VSF_HW_EN_USBOTG0LP,
293#endif
294
295 // CRM_AHBLPEN3
296 VSF_HW_EN_QSPI1LP = VSF_HW_CLKRST_REGION(0x16, 1, 1),// QSPI1LPEN
297
298 // CRM_APB1LPEN
299#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
300 VSF_HW_EN_UART8LP = VSF_HW_CLKRST_REGION(0x18, 31, 1),// UART8LPEN
301#endif
302#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
303 VSF_HW_EN_UART7LP = VSF_HW_CLKRST_REGION(0x18, 30, 1),// UART7LPEN
304#endif
305 VSF_HW_EN_PWCLP = VSF_HW_CLKRST_REGION(0x18, 28, 1),// PWCLPEN
306 VSF_HW_EN_CAN1LP = VSF_HW_CLKRST_REGION(0x18, 25, 1),// CAN1LPEN
307#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
308 VSF_HW_EN_I2C3LP = VSF_HW_CLKRST_REGION(0x18, 23, 1),// I2C3LPEN
309#endif
310#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
311 VSF_HW_EN_I2C2LP = VSF_HW_CLKRST_REGION(0x18, 22, 1),// I2C2LPEN
312#endif
313#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
314 VSF_HW_EN_I2C1LP = VSF_HW_CLKRST_REGION(0x18, 21, 1),// I2C1LPEN
315#endif
316#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
317 VSF_HW_EN_USART5LP = VSF_HW_CLKRST_REGION(0x18, 20, 1),// USART5LPEN
318#endif
319#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
320 VSF_HW_EN_USART4LP = VSF_HW_CLKRST_REGION(0x18, 19, 1),// USART4LPEN
321#endif
322#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
323 VSF_HW_EN_USART3LP = VSF_HW_CLKRST_REGION(0x18, 18, 1),// USART3LPEN
324#endif
325#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
326 VSF_HW_EN_USART2LP = VSF_HW_CLKRST_REGION(0x18, 17, 1),// USART2LPEN
327#endif
328#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
329 VSF_HW_EN_SPI3LP = VSF_HW_CLKRST_REGION(0x18, 15, 1),// SPI3LPEN
330#endif
331#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
332 VSF_HW_EN_SPI2LP = VSF_HW_CLKRST_REGION(0x18, 14, 1),// SPI2LPEN
333#endif
334 VSF_HW_EN_WWDTLP = VSF_HW_CLKRST_REGION(0x18, 11, 1),// WWDTLPEN
335 VSF_HW_EN_TMR14LP = VSF_HW_CLKRST_REGION(0x18, 8, 1),// TMR14LPEN
336 VSF_HW_EN_TMR13LP = VSF_HW_CLKRST_REGION(0x18, 7, 1),// TMR13LPEN
337 VSF_HW_EN_TMR7LP = VSF_HW_CLKRST_REGION(0x18, 5, 1),// TMR7LPEN
338 VSF_HW_EN_TMR6LP = VSF_HW_CLKRST_REGION(0x18, 4, 1),// TMR6LPEN
339 VSF_HW_EN_TMR4LP = VSF_HW_CLKRST_REGION(0x18, 2, 1),// TMR4LPEN
340 VSF_HW_EN_TMR3LP = VSF_HW_CLKRST_REGION(0x18, 1, 1),// TMR3LPEN
341 VSF_HW_EN_TMR2LP = VSF_HW_CLKRST_REGION(0x18, 0, 1),// TMR2LPEN
342
343 // CRM_APB2LPEN
344 VSF_HW_EN_ACCLP = VSF_HW_CLKRST_REGION(0x19, 29, 1),// ACCLPEN
345 VSF_HW_EN_I2SF5LP = VSF_HW_CLKRST_REGION(0x19, 20, 1),// I2SF5LPEN
346 VSF_HW_EN_TMR11LP = VSF_HW_CLKRST_REGION(0x19, 18, 1),// TMR11LPEN
347 VSF_HW_EN_TMR10LP = VSF_HW_CLKRST_REGION(0x19, 17, 1),// TMR10LPEN
348 VSF_HW_EN_TMR9LP = VSF_HW_CLKRST_REGION(0x19, 16, 1),// TMR9LPEN
349 VSF_HW_EN_SCFGLP = VSF_HW_CLKRST_REGION(0x19, 14, 1),// SCFGLPEN
350#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
351 VSF_HW_EN_SPI1LP = VSF_HW_CLKRST_REGION(0x19, 12, 1),// SPI1LPEN
352#endif
353 VSF_HW_EN_ADCLP = VSF_HW_CLKRST_REGION(0x19, 8, 1),// ADCLPEN
354#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
355 VSF_HW_EN_USART6LP = VSF_HW_CLKRST_REGION(0x19, 5, 1),// USART6LPEN
356#endif
357#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
358 VSF_HW_EN_USART1LP = VSF_HW_CLKRST_REGION(0x19, 4, 1),// USART1LPEN
359#endif
360 VSF_HW_EN_TMR1LP = VSF_HW_CLKRST_REGION(0x19, 0, 1),// TMR1LPEN
362
364
365/*============================ GLOBAL VARIABLES ==============================*/
366
367extern const vsf_hw_clk_t VSF_HW_CLK_HSE;
368#define VSF_HW_CLK_HEXT VSF_HW_CLK_HSE
369extern const vsf_hw_clk_t VSF_HW_CLK_HSI48;
370extern const vsf_hw_clk_t VSF_HW_CLK_HSI8;
371extern const vsf_hw_clk_t VSF_HW_CLK_HSI;
372#define VSF_HW_CLK_HICK VSF_HW_CLK_HSI
373extern const vsf_hw_clk_t VSF_HW_CLK_LSE;
374#define VSF_HW_CLK_LEXT VSF_HW_CLK_LSE
375extern const vsf_hw_clk_t VSF_HW_CLK_LSI;
376#define VSF_HW_CLK_LICK VSF_HW_CLK_LSI
377
378extern const vsf_hw_clk_t VSF_HW_CLK_PLL;
379extern const vsf_hw_clk_t VSF_HW_CLK_PLLP;
380extern const vsf_hw_clk_t VSF_HW_CLK_PLLU;
381
382extern const vsf_hw_clk_t VSF_HW_CLK_SYS;
383#define VSF_HW_CLK_SCLK VSF_HW_CLK_SYS
384extern const vsf_hw_clk_t VSF_HW_CLK_AHB;
385#define VSF_HW_CLK_HCLK VSF_HW_CLK_AHB
386#define VSF_HW_CLK_CPU VSF_HW_CLK_AHB
387
389extern const vsf_hw_clk_t VSF_HW_CLK_APB1;
390extern const vsf_hw_clk_t VSF_HW_CLK_APB2;
391
392#define VSF_HW_CLK_I2S1 VSF_HW_CLK_SYS
393#define VSF_HW_CLK_I2S2 VSF_HW_CLK_SYS
394#define VSF_HW_CLK_I2S3 VSF_HW_CLK_SYS
395
396#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 1))
397# define VSF_HW_CLK_USART1 VSF_HW_CLK_APB2
398#endif
399#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 2))
400# define VSF_HW_CLK_USART2 VSF_HW_CLK_APB1
401#endif
402#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 3))
403# define VSF_HW_CLK_USART3 VSF_HW_CLK_APB1
404#endif
405#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 4))
406# define VSF_HW_CLK_USART4 VSF_HW_CLK_APB1
407#endif
408#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 5))
409# define VSF_HW_CLK_USART5 VSF_HW_CLK_APB1
410#endif
411#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 6))
412# define VSF_HW_CLK_USART6 VSF_HW_CLK_APB2
413#endif
414#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 7))
415# define VSF_HW_CLK_USART7 VSF_HW_CLK_APB1
416# define VSF_HW_CLK_UART7 VSF_HW_CLK_USART7
417#endif
418#if defined(VSF_HW_USART_MASK) && (VSF_HW_USART_MASK & (1 << 8))
419# define VSF_HW_CLK_USART8 VSF_HW_CLK_APB1
420# define VSF_HW_CLK_UART8 VSF_HW_CLK_USART8
421#endif
422
423#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 1))
424# define VSF_HW_CLK_SPI1 VSF_HW_CLK_APB2
425#endif
426#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 2))
427# define VSF_HW_CLK_SPI2 VSF_HW_CLK_APB1
428#endif
429#if defined(VSF_HW_SPI_MASK) && (VSF_HW_SPI_MASK & (1 << 3))
430# define VSF_HW_CLK_SPI3 VSF_HW_CLK_APB1
431#endif
432
433#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 1))
434# define VSF_HW_CLK_I2C1 VSF_HW_CLK_APB1
435#endif
436#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 2))
437# define VSF_HW_CLK_I2C2 VSF_HW_CLK_APB1
438#endif
439#if defined(VSF_HW_I2C_MASK) && (VSF_HW_I2C_MASK & (1 << 3))
440# define VSF_HW_CLK_I2C3 VSF_HW_CLK_APB1
441#endif
442
443#if defined(VSF_HW_USB_OTG_MASK) && (VSF_HW_USB_OTG_MASK & (1 << 0))
444extern const vsf_hw_clk_t VSF_HW_CLK_USBOTG0;
445# define VSF_HW_CLK_OTGFS1 VSF_HW_CLK_USBOTG0
446#endif
447
448/*============================ LOCAL VARIABLES ===============================*/
449/*============================ INCLUDES ======================================*/
450/*============================ PROTOTYPES ====================================*/
451
454
455extern void vsf_hw_clkrst_region_set_bit(uint32_t region);
456extern void vsf_hw_clkrst_region_clear_bit(uint32_t region);
458
459extern void vsf_hw_update_flash_latency(uint32_t sys_clk_hz);
460
461extern const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk);
463extern void vsf_hw_clk_enable(const vsf_hw_clk_t *clk);
464extern void vsf_hw_clk_disable(const vsf_hw_clk_t *clk);
465extern bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk);
466extern bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk);
468
469extern vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t mul, uint16_t div, uint32_t out_freq_hz);
470
471#endif
472/* EOF */
vsf_err_t
Definition __type.h:42
const vsf_hw_clk_t VSF_HW_CLK_SYS
Definition driver.c:185
vsf_hw_peripheral_rst_t
Definition common.h:56
@ VSF_HW_RST_TMR14
Definition common.h:131
@ VSF_HW_RST_TMR7
Definition common.h:133
@ VSF_HW_RST_TMR10
Definition common.h:143
@ VSF_HW_RST_TMR4
Definition common.h:135
@ VSF_HW_RST_QSPI1
Definition common.h:92
@ VSF_HW_RST_TMR3
Definition common.h:136
@ VSF_HW_RST_DMA2
Definition common.h:61
@ VSF_HW_RST_ADC
Definition common.h:149
@ VSF_HW_RST_I2SF5
Definition common.h:141
@ VSF_HW_RST_TMR2
Definition common.h:137
@ VSF_HW_RST_SCFG
Definition common.h:145
@ VSF_HW_RST_TMR11
Definition common.h:142
@ VSF_HW_RST_CRC
Definition common.h:63
@ VSF_HW_RST_TMR6
Definition common.h:134
@ VSF_HW_RST_PWC
Definition common.h:101
@ VSF_HW_RST_WWDT
Definition common.h:130
@ VSF_HW_RST_CAN1
Definition common.h:102
@ VSF_HW_RST_TMR13
Definition common.h:132
@ VSF_HW_RST_ACC
Definition common.h:140
@ VSF_HW_RST_TMR1
Definition common.h:156
@ VSF_HW_RST_TMR9
Definition common.h:144
const vsf_hw_clk_t VSF_HW_CLK_LSI
Definition driver.c:125
const vsf_hw_clk_t VSF_HW_CLK_HSI48
Definition driver.c:92
const vsf_hw_clk_t VSF_HW_CLK_PLL
Definition driver.c:149
const vsf_hw_clk_t VSF_HW_CLK_APB2
Definition driver.c:225
vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t mul, uint16_t div, uint32_t out_freq_hz)
Definition driver.c:530
const vsf_hw_clk_t VSF_HW_CLK_HSI8
Definition driver.c:101
const vsf_hw_clk_t VSF_HW_CLK_AHB
Definition driver.c:196
bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk)
Definition driver.c:436
vsf_err_t vsf_hw_clk_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
Definition driver.c:449
const vsf_hw_clk_t VSF_HW_CLK_PLLU
Definition driver.c:172
const vsf_hw_clk_t VSF_HW_CLK_LSE
Definition driver.c:117
void vsf_hw_clk_disable(const vsf_hw_clk_t *clk)
Definition driver.c:420
const vsf_hw_clk_t VSF_HW_CLK_HSI
Definition driver.c:111
uint32_t vsf_hw_clk_get_freq_hz(const vsf_hw_clk_t *clk)
Definition driver.c:366
vsf_hw_peripheral_en_t
Definition common.h:159
@ VSF_HW_EN_PWCLP
Definition common.h:305
@ VSF_HW_EN_ADCLP
Definition common.h:353
@ VSF_HW_EN_TMR6
Definition common.h:237
@ VSF_HW_EN_TMR7
Definition common.h:236
@ VSF_HW_EN_ACC
Definition common.h:243
@ VSF_HW_EN_TMR11LP
Definition common.h:346
@ VSF_HW_EN_WWDT
Definition common.h:233
@ VSF_HW_EN_DMA2LP
Definition common.h:265
@ VSF_HW_EN_TMR13LP
Definition common.h:336
@ VSF_HW_EN_TMR4LP
Definition common.h:339
@ VSF_HW_EN_CAN1LP
Definition common.h:306
@ VSF_HW_EN_QSPI1
Definition common.h:195
@ VSF_HW_EN_DMA2
Definition common.h:164
@ VSF_HW_EN_DMA1LP
Definition common.h:266
@ VSF_HW_EN_TMR2
Definition common.h:240
@ VSF_HW_EN_TMR2LP
Definition common.h:341
@ VSF_HW_EN_TMR11
Definition common.h:245
@ VSF_HW_EN_TMR1
Definition common.h:259
@ VSF_HW_EN_TMR4
Definition common.h:238
@ VSF_HW_EN_ADC
Definition common.h:252
@ VSF_HW_EN_TMR10
Definition common.h:246
@ VSF_HW_EN_CRC
Definition common.h:166
@ VSF_HW_EN_QSPI1LP
Definition common.h:296
@ VSF_HW_EN_SCFG
Definition common.h:248
@ VSF_HW_EN_TMR3
Definition common.h:239
@ VSF_HW_EN_TMR14
Definition common.h:234
@ VSF_HW_EN_I2SF5
Definition common.h:244
@ VSF_HW_EN_DMA1
Definition common.h:165
@ VSF_HW_EN_TMR9
Definition common.h:247
@ VSF_HW_EN_ACCLP
Definition common.h:344
@ VSF_HW_EN_SCFGLP
Definition common.h:349
@ VSF_HW_EN_I2SF5LP
Definition common.h:345
@ VSF_HW_EN_TMR6LP
Definition common.h:338
@ VSF_HW_EN_TMR7LP
Definition common.h:337
@ VSF_HW_EN_PWC
Definition common.h:204
@ VSF_HW_EN_CRCLP
Definition common.h:267
@ VSF_HW_EN_TMR3LP
Definition common.h:340
@ VSF_HW_EN_TMR10LP
Definition common.h:347
@ VSF_HW_EN_TMR1LP
Definition common.h:360
@ VSF_HW_EN_CAN1
Definition common.h:205
@ VSF_HW_EN_TMR14LP
Definition common.h:335
@ VSF_HW_EN_WWDTLP
Definition common.h:334
@ VSF_HW_EN_TMR13
Definition common.h:235
@ VSF_HW_EN_TMR9LP
Definition common.h:348
void vsf_hw_update_flash_latency(uint32_t sys_clk_hz)
Definition driver.c:312
const vsf_hw_clk_t VSF_HW_CLK_PLLP
Definition driver.c:162
uint_fast8_t vsf_hw_clkrst_region_get(uint32_t region)
Definition driver.c:267
bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk)
Definition driver.c:428
const vsf_hw_clk_t VSF_HW_CLK_HSE
Definition driver.c:76
const vsf_hw_clk_t VSF_HW_CLK_APB1
Definition driver.c:216
void vsf_hw_clkrst_region_set(uint32_t region, uint_fast8_t value)
Definition driver.c:254
void vsf_hw_clk_enable(const vsf_hw_clk_t *clk)
Definition driver.c:411
const vsf_hw_clk_t VSF_HW_CLK_SYSTICK_EXT
Definition driver.c:205
const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk)
Definition driver.c:328
@ VSF_HW_RST_DMA1
Definition common.h:63
@ VSF_HW_RST_UART7
Definition common.h:103
@ VSF_HW_RST_SPI2
Definition common.h:117
@ VSF_HW_RST_GPIOA
Definition common.h:100
@ VSF_HW_RST_USART2
Definition common.h:114
@ VSF_HW_RST_I2C2
Definition common.h:109
@ VSF_HW_RST_SPI1
Definition common.h:118
@ VSF_HW_RST_GPIOF
Definition common.h:95
@ VSF_HW_RST_GPIOC
Definition common.h:98
@ VSF_HW_RST_I2C1
Definition common.h:110
@ VSF_HW_RST_GPIOB
Definition common.h:99
@ VSF_HW_RST_USART1
Definition common.h:115
@ VSF_HW_RST_USART5
Definition common.h:155
@ VSF_HW_RST_GPIOD
Definition common.h:97
@ VSF_HW_RST_I2C3
Definition common.h:108
@ VSF_HW_RST_SPI3
Definition common.h:150
#define VSF_HW_CLKRST_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH)
Definition common.h:32
@ VSF_HW_EN_SPI2
Definition common.h:243
@ VSF_HW_EN_UART7
Definition common.h:229
@ VSF_HW_EN_SPI1
Definition common.h:244
@ VSF_HW_EN_USART2
Definition common.h:240
@ VSF_HW_EN_GPIOB
Definition common.h:225
@ VSF_HW_EN_GPIOC
Definition common.h:224
@ VSF_HW_EN_I2C1
Definition common.h:236
@ VSF_HW_EN_SPI3
Definition common.h:276
@ VSF_HW_EN_GPIOD
Definition common.h:223
@ VSF_HW_EN_USART5
Definition common.h:281
@ VSF_HW_EN_GPIOA
Definition common.h:226
@ VSF_HW_EN_USART1
Definition common.h:241
@ VSF_HW_EN_I2C2
Definition common.h:235
@ VSF_HW_EN_I2C3
Definition common.h:234
@ VSF_HW_EN_GPIOF
Definition common.h:221
@ VSF_HW_RST_USART3
Definition common.h:156
@ VSF_HW_RST_GPIO3
Definition common.h:117
@ VSF_HW_RST_USART4
Definition common.h:157
@ VSF_HW_RST_USART6
Definition common.h:196
@ VSF_HW_RST_GPIO5
Definition common.h:119
@ VSF_HW_RST_GPIO1
Definition common.h:115
@ VSF_HW_RST_GPIO2
Definition common.h:116
@ VSF_HW_RST_GPIO0
Definition common.h:114
@ VSF_HW_EN_GPIOCLP
Definition common.h:981
@ VSF_HW_EN_GPIOFLP
Definition common.h:987
@ VSF_HW_EN_GPIODLP
Definition common.h:983
@ VSF_HW_EN_GPIOALP
Definition common.h:977
@ VSF_HW_EN_GPIOBLP
Definition common.h:979
@ VSF_HW_RST_OTGHS
Definition common.h:59
@ VSF_HW_RST_UART8
Definition common.h:104
@ VSF_HW_EN_USART3
Definition common.h:229
@ VSF_HW_EN_UART8
Definition common.h:220
@ VSF_HW_EN_OTGHS
Definition common.h:170
@ VSF_HW_EN_USART6
Definition common.h:81
void vsf_hw_clkrst_region_clear_bit(uint32_t region)
Definition driver.c:287
void vsf_hw_clkrst_region_set_bit(uint32_t region)
Definition driver.c:275
vsf_hw_peripheral_en_t
Definition common.h:131
uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region)
Definition driver.c:299
unsigned short uint16_t
Definition stdint.h:7
unsigned char uint_fast8_t
Definition stdint.h:23
unsigned uint32_t
Definition stdint.h:9
Definition driver.c:44
uint32_t prescaler
Definition driver.c:64
const vsf_hw_clk_t * clksrc
Definition driver.c:60
div_t div(int numer, int denom)
vk_av_control_value_t value
Definition vsf_audio.h:171
Generated from commit: vsfteam/vsf@8634e61