VSF Documented
Macros | Typedefs | Enumerations | Functions | Variables
common.h File Reference
#include "hal/vsf_hal_cfg.h"
#include "hal/arch/vsf_arch.h"

Go to the source code of this file.

Macros

#define VSF_HW_REG_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH)    (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
 
#define VSF_HW_CLKRST_REGION   VSF_HW_REG_REGION
 
#define vsf_hw_peripheral_clk_set   vsf_hw_clkrst_region_set
 
#define vsf_hw_peripheral_clk_get   vsf_hw_clkrst_region_get
 
#define vsf_hw_peripheral_rst_set   vsf_hw_clkrst_region_set_bit
 
#define vsf_hw_peripheral_rst_clear   vsf_hw_clkrst_region_clear_bit
 
#define vsf_hw_peripheral_rst_get   vsf_hw_clkrst_region_get_bit
 
#define vsf_hw_peripheral_enable   vsf_hw_clkrst_region_set_bit
 
#define vsf_hw_peripheral_disable   vsf_hw_clkrst_region_clear_bit
 
#define VSF_SYSTIMER_FREQ   vsf_hw_clk_get_freq_hz(&VSF_HW_CLK_SYSTICK)
 
#define VSF_HW_CLK_AHB1   VSF_HW_CLK_SYSBUS
 
#define VSF_HW_CLK_AHB2   VSF_HW_CLK_SYSBUS
 
#define VSF_HW_CLK_AHB5   VSF_HW_CLK_SYSBUS
 
#define VSF_HW_CLK_AHB6   VSF_HW_CLK_AXI
 
#define VSF_HW_CLK_AHB9   VSF_HW_CLK_SYSBUS
 
#define VSF_HW_CLK_SDMMC1_BUS   VSF_HW_CLK_AHB6
 
#define VSF_HW_CLK_SDMMC2_BUS   VSF_HW_CLK_AHB1
 
#define VSF_HW_CLK_USART3_4   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_USART5_6_7_8   VSF_HW_CLK_APB2
 
#define VSF_HW_CLK_UART9_10_11_12   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_UART13_14_15   VSF_HW_CLK_APB2
 
#define VSF_HW_CLK_USART1   VSF_HW_CLK_USART1_2
 
#define VSF_HW_CLK_USART2   VSF_HW_CLK_USART1_2
 
#define VSF_HW_CLK_USART3   VSF_HW_CLK_USART3_4
 
#define VSF_HW_CLK_USART4   VSF_HW_CLK_USART3_4
 
#define VSF_HW_CLK_USART5   VSF_HW_CLK_USART5_6_7_8
 
#define VSF_HW_CLK_USART6   VSF_HW_CLK_USART5_6_7_8
 
#define VSF_HW_CLK_USART7   VSF_HW_CLK_USART5_6_7_8
 
#define VSF_HW_CLK_USART8   VSF_HW_CLK_USART5_6_7_8
 
#define VSF_HW_CLK_UART9   VSF_HW_CLK_UART9_10_11_12
 
#define VSF_HW_CLK_UART10   VSF_HW_CLK_UART9_10_11_12
 
#define VSF_HW_CLK_UART11   VSF_HW_CLK_UART9_10_11_12
 
#define VSF_HW_CLK_UART12   VSF_HW_CLK_UART9_10_11_12
 
#define VSF_HW_CLK_UART13   VSF_HW_CLK_UART13_14_15
 
#define VSF_HW_CLK_UART14   VSF_HW_CLK_UART13_14_15
 
#define VSF_HW_CLK_UART15   VSF_HW_CLK_UART13_14_15
 
#define VSF_HW_CLK_SPI1_2   VSF_HW_CLK_APB2
 
#define VSF_HW_CLK_SPI3   VSF_HW_CLK_APB1
 
#define VSF_HW_CLK_SPI4_5_6_7   VSF_HW_CLK_APB5
 
#define VSF_HW_CLK_SPI1   VSF_HW_CLK_SPI1_2
 
#define VSF_HW_CLK_SPI2   VSF_HW_CLK_SPI1_2
 
#define VSF_HW_CLK_SPI4   VSF_HW_CLK_SPI4_5_6_7
 
#define VSF_HW_CLK_SPI5   VSF_HW_CLK_SPI4_5_6_7
 
#define VSF_HW_CLK_SPI6   VSF_HW_CLK_SPI4_5_6_7
 
#define VSF_HW_CLK_SPI7   VSF_HW_CLK_SPI4_5_6_7
 

Typedefs

typedef enum vsf_hw_peripheral_rst_t vsf_hw_peripheral_rst_t
 
typedef enum vsf_hw_peripheral_en_t vsf_hw_peripheral_en_t
 
typedef struct vsf_hw_clk_t vsf_hw_clk_t
 
typedef struct vsf_hw_pwr_domain_t vsf_hw_pwr_domain_t
 
typedef struct vsf_hw_pwr_t vsf_hw_pwr_t
 

Enumerations

enum  vsf_hw_peripheral_rst_t {
  VSF_HW_RST_JPEGD = VSF_HW_CLKRST_REGION(0x54, 28, 1) ,
  VSF_HW_RST_JPEGE = VSF_HW_CLKRST_REGION(0x54, 20, 1) ,
  VSF_HW_RST_DMAMUX2 = VSF_HW_CLKRST_REGION(0x54, 16, 1) ,
  VSF_HW_RST_MDMA = VSF_HW_CLKRST_REGION(0x54, 12, 1) ,
  VSF_HW_RST_SDMMC1 = VSF_HW_CLKRST_REGION(0x54, 9, 1) ,
  VSF_HW_RST_SDHOST1 = VSF_HW_CLKRST_REGION(0x54, 8, 1) ,
  VSF_HW_RST_ECCM1 = VSF_HW_CLKRST_REGION(0x54, 4, 1) ,
  VSF_HW_RST_OTPC = VSF_HW_CLKRST_REGION(0x54, 0, 1) ,
  VSF_HW_RST_DSICFG = VSF_HW_CLKRST_REGION(0x55, 29, 1) ,
  VSF_HW_RST_DSI = VSF_HW_CLKRST_REGION(0x55, 28, 1) ,
  VSF_HW_RST_LCD = VSF_HW_CLKRST_REGION(0x55, 24, 1) ,
  VSF_HW_RST_DVP1 = VSF_HW_CLKRST_REGION(0x55, 16, 1) ,
  VSF_HW_RST_DVP2 = VSF_HW_CLKRST_REGION(0x55, 8, 1) ,
  VSF_HW_RST_WWDG1 = VSF_HW_CLKRST_REGION(0x55, 0, 1) ,
  VSF_HW_RST_GPU = VSF_HW_CLKRST_REGION(0x56, 0, 1) ,
  VSF_HW_RST_XSPI1 = VSF_HW_CLKRST_REGION(0x57, 28, 1) ,
  VSF_HW_RST_XSPI2 = VSF_HW_CLKRST_REGION(0x57, 24, 1) ,
  VSF_HW_RST_FEMCCFG = VSF_HW_CLKRST_REGION(0x57, 21, 1) ,
  VSF_HW_RST_FEMC = VSF_HW_CLKRST_REGION(0x57, 20, 1) ,
  VSF_HW_RST_SDRAM = VSF_HW_CLKRST_REGION(0x57, 16, 1) ,
  VSF_HW_RST_SDMMC2 = VSF_HW_CLKRST_REGION(0x19, 29, 1) ,
  VSF_HW_RST_SDHOST2 = VSF_HW_CLKRST_REGION(0x19, 28, 1) ,
  VSF_HW_RST_USB2WRAP = VSF_HW_CLKRST_REGION(0x19, 22, 1) ,
  VSF_HW_RST_USB2POR = VSF_HW_CLKRST_REGION(0x19, 21, 1) ,
  VSF_HW_RST_USB2 = VSF_HW_CLKRST_REGION(0x19, 20, 1) ,
  VSF_HW_RST_DMAMUX1 = VSF_HW_CLKRST_REGION(0x19, 16, 1) ,
  VSF_HW_RST_ADC1 = VSF_HW_CLKRST_REGION(0x19, 0, 1) ,
  VSF_HW_RST_ETH2 = VSF_HW_CLKRST_REGION(0x1A, 0, 1) ,
  VSF_HW_RST_ECCMAC = VSF_HW_CLKRST_REGION(0x1B, 24, 1) ,
  VSF_HW_RST_DMA1 = VSF_HW_CLKRST_REGION(0x1B, 16, 1) ,
  VSF_HW_RST_DMA2 = VSF_HW_CLKRST_REGION(0x1B, 8, 1) ,
  VSF_HW_RST_DMA3 = VSF_HW_CLKRST_REGION(0x1B, 0, 1) ,
  VSF_HW_RST_ADC2 = VSF_HW_CLKRST_REGION(0x1C, 16, 1) ,
  VSF_HW_RST_ADC3 = VSF_HW_CLKRST_REGION(0x1C, 0, 1) ,
  VSF_HW_RST_DAC56 = VSF_HW_CLKRST_REGION(0x2D, 25, 1) ,
  VSF_HW_RST_DAC34 = VSF_HW_CLKRST_REGION(0x2D, 24, 1) ,
  VSF_HW_RST_USB1WRAP = VSF_HW_CLKRST_REGION(0x2D, 22, 1) ,
  VSF_HW_RST_USB1POR = VSF_HW_CLKRST_REGION(0x2D, 21, 1) ,
  VSF_HW_RST_USB1 = VSF_HW_CLKRST_REGION(0x2D, 20, 1) ,
  VSF_HW_RST_ETH1 = VSF_HW_CLKRST_REGION(0x2D, 16, 1) ,
  VSF_HW_RST_ECCM2 = VSF_HW_CLKRST_REGION(0x2D, 12, 1) ,
  VSF_HW_RST_CORDIC = VSF_HW_CLKRST_REGION(0x2D, 8, 1) ,
  VSF_HW_RST_SDPU = VSF_HW_CLKRST_REGION(0x2D, 4, 1) ,
  VSF_HW_RST_FMAC = VSF_HW_CLKRST_REGION(0x2D, 0, 1) ,
  VSF_HW_RST_GPIOA = VSF_HW_CLKRST_REGION(0x3B, 28, 1) ,
  VSF_HW_RST_GPIOB = VSF_HW_CLKRST_REGION(0x3B, 24, 1) ,
  VSF_HW_RST_GPIOC = VSF_HW_CLKRST_REGION(0x3B, 20, 1) ,
  VSF_HW_RST_GPIOD = VSF_HW_CLKRST_REGION(0x3B, 16, 1) ,
  VSF_HW_RST_GPIOE = VSF_HW_CLKRST_REGION(0x3B, 12, 1) ,
  VSF_HW_RST_GPIOF = VSF_HW_CLKRST_REGION(0x3B, 8, 1) ,
  VSF_HW_RST_GPIOG = VSF_HW_CLKRST_REGION(0x3B, 4, 1) ,
  VSF_HW_RST_GPIOH = VSF_HW_CLKRST_REGION(0x3B, 0, 1) ,
  VSF_HW_RST_GPIOI = VSF_HW_CLKRST_REGION(0x3C, 28, 1) ,
  VSF_HW_RST_GPIOJ = VSF_HW_CLKRST_REGION(0x3C, 24, 1) ,
  VSF_HW_RST_GPIOK = VSF_HW_CLKRST_REGION(0x3C, 20, 1) ,
  VSF_HW_RST_ECCM3 = VSF_HW_CLKRST_REGION(0x3C, 16, 1) ,
  VSF_HW_RST_PWR = VSF_HW_CLKRST_REGION(0x3C, 12, 1) ,
  VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x3C, 8, 1) ,
  VSF_HW_RST_SEMA4 = VSF_HW_CLKRST_REGION(0x3C, 4, 1) ,
  VSF_HW_RST_AFIO = VSF_HW_CLKRST_REGION(0x3C, 0, 1) ,
  VSF_HW_RST_ESC = VSF_HW_CLKRST_REGION(0x0C, 0, 1) ,
  VSF_HW_RST_BTIM1 = VSF_HW_CLKRST_REGION(0x25, 28, 1) ,
  VSF_HW_RST_BTIM2 = VSF_HW_CLKRST_REGION(0x25, 24, 1) ,
  VSF_HW_RST_BTIM3 = VSF_HW_CLKRST_REGION(0x25, 20, 1) ,
  VSF_HW_RST_BTIM4 = VSF_HW_CLKRST_REGION(0x25, 16, 1) ,
  VSF_HW_RST_GTIMB1 = VSF_HW_CLKRST_REGION(0x25, 12, 1) ,
  VSF_HW_RST_GTIMB2 = VSF_HW_CLKRST_REGION(0x25, 8, 1) ,
  VSF_HW_RST_GTIMB3 = VSF_HW_CLKRST_REGION(0x25, 4, 1) ,
  VSF_HW_RST_GTIMA4 = VSF_HW_CLKRST_REGION(0x25, 0, 1) ,
  VSF_HW_RST_GTIMA5 = VSF_HW_CLKRST_REGION(0x26, 28, 1) ,
  VSF_HW_RST_GTIMA6 = VSF_HW_CLKRST_REGION(0x26, 24, 1) ,
  VSF_HW_RST_GTIMA7 = VSF_HW_CLKRST_REGION(0x26, 20, 1) ,
  VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x26, 16, 1) ,
  VSF_HW_RST_DAC12 = VSF_HW_CLKRST_REGION(0x26, 12, 1) ,
  VSF_HW_RST_WWDG2 = VSF_HW_CLKRST_REGION(0x26, 4, 1) ,
  VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x27, 28, 1) ,
  VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x27, 24, 1) ,
  VSF_HW_RST_USART3 = VSF_HW_CLKRST_REGION(0x27, 20, 1) ,
  VSF_HW_RST_USART4 = VSF_HW_CLKRST_REGION(0x27, 16, 1) ,
  VSF_HW_RST_UART9 = VSF_HW_CLKRST_REGION(0x27, 12, 1) ,
  VSF_HW_RST_UART10 = VSF_HW_CLKRST_REGION(0x27, 8, 1) ,
  VSF_HW_RST_UART11 = VSF_HW_CLKRST_REGION(0x27, 4, 1) ,
  VSF_HW_RST_UART12 = VSF_HW_CLKRST_REGION(0x27, 0, 1) ,
  VSF_HW_RST_I2S3 = VSF_HW_CLKRST_REGION(0x28, 28, 1) ,
  VSF_HW_RST_I2S4 = VSF_HW_CLKRST_REGION(0x28, 24, 1) ,
  VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x28, 20, 1) ,
  VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x28, 16, 1) ,
  VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x28, 12, 1) ,
  VSF_HW_RST_FDCAN1 = VSF_HW_CLKRST_REGION(0x29, 28, 1) ,
  VSF_HW_RST_FDCAN2 = VSF_HW_CLKRST_REGION(0x29, 24, 1) ,
  VSF_HW_RST_FDCAN5 = VSF_HW_CLKRST_REGION(0x29, 20, 1) ,
  VSF_HW_RST_FDCAN6 = VSF_HW_CLKRST_REGION(0x29, 16, 1) ,
  VSF_HW_RST_CAHI = VSF_HW_CLKRST_REGION(0x29, 4, 1) ,
  VSF_HW_RST_CAHD = VSF_HW_CLKRST_REGION(0x29, 0, 1) ,
  VSF_HW_RST_ATIM1 = VSF_HW_CLKRST_REGION(0x35, 28, 1) ,
  VSF_HW_RST_ATIM2 = VSF_HW_CLKRST_REGION(0x35, 24, 1) ,
  VSF_HW_RST_GTIMA1 = VSF_HW_CLKRST_REGION(0x35, 20, 1) ,
  VSF_HW_RST_GTIMA2 = VSF_HW_CLKRST_REGION(0x35, 16, 1) ,
  VSF_HW_RST_GTIMA3 = VSF_HW_CLKRST_REGION(0x35, 12, 1) ,
  VSF_HW_RST_SHRTIM1 = VSF_HW_CLKRST_REGION(0x35, 8, 1) ,
  VSF_HW_RST_SHRTIM2 = VSF_HW_CLKRST_REGION(0x35, 4, 1) ,
  VSF_HW_RST_I2S1 = VSF_HW_CLKRST_REGION(0x36, 28, 1) ,
  VSF_HW_RST_I2S2 = VSF_HW_CLKRST_REGION(0x36, 24, 1) ,
  VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x36, 20, 1) ,
  VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x36, 16, 1) ,
  VSF_HW_RST_DSMU = VSF_HW_CLKRST_REGION(0x36, 12, 1) ,
  VSF_HW_RST_I2C4 = VSF_HW_CLKRST_REGION(0x36, 8, 1) ,
  VSF_HW_RST_I2C5 = VSF_HW_CLKRST_REGION(0x36, 4, 1) ,
  VSF_HW_RST_I2C6 = VSF_HW_CLKRST_REGION(0x36, 0, 1) ,
  VSF_HW_RST_USART5 = VSF_HW_CLKRST_REGION(0x37, 28, 1) ,
  VSF_HW_RST_USART6 = VSF_HW_CLKRST_REGION(0x37, 24, 1) ,
  VSF_HW_RST_USART7 = VSF_HW_CLKRST_REGION(0x37, 20, 1) ,
  VSF_HW_RST_USART8 = VSF_HW_CLKRST_REGION(0x37, 16, 1) ,
  VSF_HW_RST_UART13 = VSF_HW_CLKRST_REGION(0x37, 12, 1) ,
  VSF_HW_RST_UART14 = VSF_HW_CLKRST_REGION(0x37, 8, 1) ,
  VSF_HW_RST_UART15 = VSF_HW_CLKRST_REGION(0x37, 4, 1) ,
  VSF_HW_RST_FDCAN3 = VSF_HW_CLKRST_REGION(0x38, 28, 1) ,
  VSF_HW_RST_FDCAN4 = VSF_HW_CLKRST_REGION(0x38, 24, 1) ,
  VSF_HW_RST_FDCAN7 = VSF_HW_CLKRST_REGION(0x38, 20, 1) ,
  VSF_HW_RST_FDCAN8 = VSF_HW_CLKRST_REGION(0x38, 16, 1) ,
  VSF_HW_RST_ATIM3 = VSF_HW_CLKRST_REGION(0x41, 28, 1) ,
  VSF_HW_RST_ATIM4 = VSF_HW_CLKRST_REGION(0x41, 24, 1) ,
  VSF_HW_RST_SPI4 = VSF_HW_CLKRST_REGION(0x41, 12, 1) ,
  VSF_HW_RST_SPI5 = VSF_HW_CLKRST_REGION(0x41, 8, 1) ,
  VSF_HW_RST_SPI6 = VSF_HW_CLKRST_REGION(0x41, 4, 1) ,
  VSF_HW_RST_SPI7 = VSF_HW_CLKRST_REGION(0x41, 0, 1) ,
  VSF_HW_RST_I2C7 = VSF_HW_CLKRST_REGION(0x42, 28, 1) ,
  VSF_HW_RST_I2C8 = VSF_HW_CLKRST_REGION(0x42, 24, 1) ,
  VSF_HW_RST_I2C9 = VSF_HW_CLKRST_REGION(0x42, 20, 1) ,
  VSF_HW_RST_I2C10 = VSF_HW_CLKRST_REGION(0x42, 16, 1) ,
  VSF_HW_RST_LPTIM1 = VSF_HW_CLKRST_REGION(0x47, 28, 1) ,
  VSF_HW_RST_LPTIM2 = VSF_HW_CLKRST_REGION(0x47, 24, 1) ,
  VSF_HW_RST_LPTIM3 = VSF_HW_CLKRST_REGION(0x47, 20, 1) ,
  VSF_HW_RST_LPTIM4 = VSF_HW_CLKRST_REGION(0x47, 16, 1) ,
  VSF_HW_RST_LPTIM5 = VSF_HW_CLKRST_REGION(0x47, 12, 1) ,
  VSF_HW_RST_LPUART1 = VSF_HW_CLKRST_REGION(0x47, 8, 1) ,
  VSF_HW_RST_LPUART2 = VSF_HW_CLKRST_REGION(0x47, 4, 1) ,
  VSF_HW_RST_COMP = VSF_HW_CLKRST_REGION(0x48, 28, 1)
}
 
enum  vsf_hw_peripheral_en_t
 

Functions

void vsf_hw_clkrst_region_set (uint32_t region, uint_fast8_t value)
 
uint_fast8_t vsf_hw_clkrst_region_get (uint32_t region)
 
void vsf_hw_clkrst_region_set_bit (uint32_t region)
 
void vsf_hw_clkrst_region_clear_bit (uint32_t region)
 
uint_fast8_t vsf_hw_clkrst_region_get_bit (uint32_t region)
 
const vsf_hw_clk_t * vsf_hw_clk_get_src (const vsf_hw_clk_t *clk)
 
uint32_t vsf_hw_clk_get_freq_hz (const vsf_hw_clk_t *clk)
 
void vsf_hw_clk_enable (const vsf_hw_clk_t *clk)
 
void vsf_hw_clk_disable (const vsf_hw_clk_t *clk)
 
bool vsf_hw_clk_is_enabled (const vsf_hw_clk_t *clk)
 
bool vsf_hw_clk_is_ready (const vsf_hw_clk_t *clk)
 
vsf_err_t vsf_hw_clk_config (const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
 
vsf_err_t vsf_hw_pll_config (const vsf_hw_clk_t *clk, uint32_t out_freq_hz)
 configure frequency range of pll input/output clocks
 
void vsf_hw_power_domain_enable (const vsf_hw_pwr_domain_t *domain)
 
void vsf_hw_power_domain_disable (const vsf_hw_pwr_domain_t *domain)
 
bool vsf_hw_power_domain_is_ready (const vsf_hw_pwr_domain_t *domain)
 
void vsf_hw_power_enable (const vsf_hw_pwr_t *pwr)
 
void vsf_hw_power_disable (const vsf_hw_pwr_t *pwr)
 

Variables

const vsf_hw_clk_t VSF_HW_CLK_HSE
 
const vsf_hw_clk_t VSF_HW_CLK_HSE_CG
 
const vsf_hw_clk_t VSF_HW_CLK_HSE_KER_CG
 
const vsf_hw_clk_t VSF_HW_CLK_LSE
 
const vsf_hw_clk_t VSF_HW_CLK_HSI
 
const vsf_hw_clk_t VSF_HW_CLK_HSI_CG
 
const vsf_hw_clk_t VSF_HW_CLK_HSI_KER_CG
 
const vsf_hw_clk_t VSF_HW_CLK_MSI
 
const vsf_hw_clk_t VSF_HW_CLK_MSI_CG
 
const vsf_hw_clk_t VSF_HW_CLK_MSI_KER_CG
 
const vsf_hw_clk_t VSF_HW_CLK_LSI
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1A
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1B
 
const vsf_hw_clk_t VSF_HW_CLK_PLL1C
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2A
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2B
 
const vsf_hw_clk_t VSF_HW_CLK_PLL2C
 
const vsf_hw_clk_t VSF_HW_CLK_PLL3
 
const vsf_hw_clk_t VSF_HW_CLK_PLL3A
 
const vsf_hw_clk_t VSF_HW_CLK_PLL3B
 
const vsf_hw_clk_t VSF_HW_CLK_PLL3C
 
const vsf_hw_clk_t VSF_HW_CLK_SHRPLL
 
const vsf_hw_clk_t VSF_HW_CLK_AXISYS
 
const vsf_hw_clk_t VSF_HW_CLK_AXIHYP
 
const vsf_hw_clk_t VSF_HW_CLK_SYS
 
const vsf_hw_clk_t VSF_HW_CLK_SYSBUS
 
const vsf_hw_clk_t VSF_HW_CLK_CPU
 
const vsf_hw_clk_t VSF_HW_CLK_SYSTICK
 
const vsf_hw_clk_t VSF_HW_CLK_AXI
 
const vsf_hw_clk_t VSF_HW_CLK_APB1
 
const vsf_hw_clk_t VSF_HW_CLK_APB2
 
const vsf_hw_clk_t VSF_HW_CLK_APB5
 
const vsf_hw_clk_t VSF_HW_CLK_APB6
 
const vsf_hw_clk_t VSF_HW_CLK_PERI
 
const vsf_hw_clk_t VSF_HW_CLK_SDRAM
 
const vsf_hw_clk_t VSF_HW_CLK_SDMMC1
 
const vsf_hw_clk_t VSF_HW_CLK_SDMMC2
 
const vsf_hw_clk_t VSF_HW_CLK_USART1_2
 
const vsf_hw_clk_t VSF_HW_CLK_USBREF
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS1
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS2
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_GRC
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_ESC
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_MDMA
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHRA
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR2
 
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR1
 
const vsf_hw_pwr_t VSF_HW_PWR_GPU
 
const vsf_hw_pwr_t VSF_HW_PWR_LCDC
 
const vsf_hw_pwr_t VSF_HW_PWR_JPEG
 
const vsf_hw_pwr_t VSF_HW_PWR_DSI
 
const vsf_hw_pwr_t VSF_HW_PWR_DVP
 
const vsf_hw_pwr_t VSF_HW_PWR_ETH2
 
const vsf_hw_pwr_t VSF_HW_PWR_USB2
 
const vsf_hw_pwr_t VSF_HW_PWR_SDMMC2
 
const vsf_hw_pwr_t VSF_HW_PWR_ETH1
 
const vsf_hw_pwr_t VSF_HW_PWR_USB1
 
const vsf_hw_pwr_t VSF_HW_PWR_SDMMC1
 
const vsf_hw_pwr_t VSF_HW_PWR_FMAC
 
const vsf_hw_pwr_t VSF_HW_PWR_ESC
 

Macro Definition Documentation

◆ VSF_HW_REG_REGION

#define VSF_HW_REG_REGION (   __WORD_OFFSET,
  __BIT_OFFSET,
  __BIT_LENGTH 
)     (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))

◆ VSF_HW_CLKRST_REGION

#define VSF_HW_CLKRST_REGION   VSF_HW_REG_REGION

◆ vsf_hw_peripheral_clk_set

#define vsf_hw_peripheral_clk_set   vsf_hw_clkrst_region_set

◆ vsf_hw_peripheral_clk_get

#define vsf_hw_peripheral_clk_get   vsf_hw_clkrst_region_get

◆ vsf_hw_peripheral_rst_set

#define vsf_hw_peripheral_rst_set   vsf_hw_clkrst_region_set_bit

◆ vsf_hw_peripheral_rst_clear

#define vsf_hw_peripheral_rst_clear   vsf_hw_clkrst_region_clear_bit

◆ vsf_hw_peripheral_rst_get

#define vsf_hw_peripheral_rst_get   vsf_hw_clkrst_region_get_bit

◆ vsf_hw_peripheral_enable

#define vsf_hw_peripheral_enable   vsf_hw_clkrst_region_set_bit

◆ vsf_hw_peripheral_disable

#define vsf_hw_peripheral_disable   vsf_hw_clkrst_region_clear_bit

◆ VSF_SYSTIMER_FREQ

#define VSF_SYSTIMER_FREQ   vsf_hw_clk_get_freq_hz(&VSF_HW_CLK_SYSTICK)

◆ VSF_HW_CLK_AHB1

#define VSF_HW_CLK_AHB1   VSF_HW_CLK_SYSBUS

◆ VSF_HW_CLK_AHB2

#define VSF_HW_CLK_AHB2   VSF_HW_CLK_SYSBUS

◆ VSF_HW_CLK_AHB5

#define VSF_HW_CLK_AHB5   VSF_HW_CLK_SYSBUS

◆ VSF_HW_CLK_AHB6

#define VSF_HW_CLK_AHB6   VSF_HW_CLK_AXI

◆ VSF_HW_CLK_AHB9

#define VSF_HW_CLK_AHB9   VSF_HW_CLK_SYSBUS

◆ VSF_HW_CLK_SDMMC1_BUS

#define VSF_HW_CLK_SDMMC1_BUS   VSF_HW_CLK_AHB6

◆ VSF_HW_CLK_SDMMC2_BUS

#define VSF_HW_CLK_SDMMC2_BUS   VSF_HW_CLK_AHB1

◆ VSF_HW_CLK_USART3_4

#define VSF_HW_CLK_USART3_4   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_USART5_6_7_8

#define VSF_HW_CLK_USART5_6_7_8   VSF_HW_CLK_APB2

◆ VSF_HW_CLK_UART9_10_11_12

#define VSF_HW_CLK_UART9_10_11_12   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_UART13_14_15

#define VSF_HW_CLK_UART13_14_15   VSF_HW_CLK_APB2

◆ VSF_HW_CLK_USART1

#define VSF_HW_CLK_USART1   VSF_HW_CLK_USART1_2

◆ VSF_HW_CLK_USART2

#define VSF_HW_CLK_USART2   VSF_HW_CLK_USART1_2

◆ VSF_HW_CLK_USART3

#define VSF_HW_CLK_USART3   VSF_HW_CLK_USART3_4

◆ VSF_HW_CLK_USART4

#define VSF_HW_CLK_USART4   VSF_HW_CLK_USART3_4

◆ VSF_HW_CLK_USART5

#define VSF_HW_CLK_USART5   VSF_HW_CLK_USART5_6_7_8

◆ VSF_HW_CLK_USART6

#define VSF_HW_CLK_USART6   VSF_HW_CLK_USART5_6_7_8

◆ VSF_HW_CLK_USART7

#define VSF_HW_CLK_USART7   VSF_HW_CLK_USART5_6_7_8

◆ VSF_HW_CLK_USART8

#define VSF_HW_CLK_USART8   VSF_HW_CLK_USART5_6_7_8

◆ VSF_HW_CLK_UART9

#define VSF_HW_CLK_UART9   VSF_HW_CLK_UART9_10_11_12

◆ VSF_HW_CLK_UART10

#define VSF_HW_CLK_UART10   VSF_HW_CLK_UART9_10_11_12

◆ VSF_HW_CLK_UART11

#define VSF_HW_CLK_UART11   VSF_HW_CLK_UART9_10_11_12

◆ VSF_HW_CLK_UART12

#define VSF_HW_CLK_UART12   VSF_HW_CLK_UART9_10_11_12

◆ VSF_HW_CLK_UART13

#define VSF_HW_CLK_UART13   VSF_HW_CLK_UART13_14_15

◆ VSF_HW_CLK_UART14

#define VSF_HW_CLK_UART14   VSF_HW_CLK_UART13_14_15

◆ VSF_HW_CLK_UART15

#define VSF_HW_CLK_UART15   VSF_HW_CLK_UART13_14_15

◆ VSF_HW_CLK_SPI1_2

#define VSF_HW_CLK_SPI1_2   VSF_HW_CLK_APB2

◆ VSF_HW_CLK_SPI3

#define VSF_HW_CLK_SPI3   VSF_HW_CLK_APB1

◆ VSF_HW_CLK_SPI4_5_6_7

#define VSF_HW_CLK_SPI4_5_6_7   VSF_HW_CLK_APB5

◆ VSF_HW_CLK_SPI1

#define VSF_HW_CLK_SPI1   VSF_HW_CLK_SPI1_2

◆ VSF_HW_CLK_SPI2

#define VSF_HW_CLK_SPI2   VSF_HW_CLK_SPI1_2

◆ VSF_HW_CLK_SPI4

#define VSF_HW_CLK_SPI4   VSF_HW_CLK_SPI4_5_6_7

◆ VSF_HW_CLK_SPI5

#define VSF_HW_CLK_SPI5   VSF_HW_CLK_SPI4_5_6_7

◆ VSF_HW_CLK_SPI6

#define VSF_HW_CLK_SPI6   VSF_HW_CLK_SPI4_5_6_7

◆ VSF_HW_CLK_SPI7

#define VSF_HW_CLK_SPI7   VSF_HW_CLK_SPI4_5_6_7

Typedef Documentation

◆ vsf_hw_peripheral_rst_t

typedef enum vsf_hw_peripheral_rst_t vsf_hw_peripheral_rst_t

◆ vsf_hw_peripheral_en_t

typedef enum vsf_hw_peripheral_en_t vsf_hw_peripheral_en_t

◆ vsf_hw_clk_t

typedef struct vsf_hw_clk_t vsf_hw_clk_t

◆ vsf_hw_pwr_domain_t

typedef struct vsf_hw_pwr_domain_t vsf_hw_pwr_domain_t

◆ vsf_hw_pwr_t

typedef struct vsf_hw_pwr_t vsf_hw_pwr_t

Enumeration Type Documentation

◆ vsf_hw_peripheral_rst_t

enum vsf_hw_peripheral_rst_t
Enumerator
VSF_HW_RST_JPEGD 
VSF_HW_RST_JPEGE 
VSF_HW_RST_DMAMUX2 
VSF_HW_RST_MDMA 
VSF_HW_RST_SDMMC1 
VSF_HW_RST_SDHOST1 
VSF_HW_RST_ECCM1 
VSF_HW_RST_OTPC 
VSF_HW_RST_DSICFG 
VSF_HW_RST_DSI 
VSF_HW_RST_LCD 
VSF_HW_RST_DVP1 
VSF_HW_RST_DVP2 
VSF_HW_RST_WWDG1 
VSF_HW_RST_GPU 
VSF_HW_RST_XSPI1 
VSF_HW_RST_XSPI2 
VSF_HW_RST_FEMCCFG 
VSF_HW_RST_FEMC 
VSF_HW_RST_SDRAM 
VSF_HW_RST_SDMMC2 
VSF_HW_RST_SDHOST2 
VSF_HW_RST_USB2WRAP 
VSF_HW_RST_USB2POR 
VSF_HW_RST_USB2 
VSF_HW_RST_DMAMUX1 
VSF_HW_RST_ADC1 
VSF_HW_RST_ETH2 
VSF_HW_RST_ECCMAC 
VSF_HW_RST_DMA1 
VSF_HW_RST_DMA2 
VSF_HW_RST_DMA3 
VSF_HW_RST_ADC2 
VSF_HW_RST_ADC3 
VSF_HW_RST_DAC56 
VSF_HW_RST_DAC34 
VSF_HW_RST_USB1WRAP 
VSF_HW_RST_USB1POR 
VSF_HW_RST_USB1 
VSF_HW_RST_ETH1 
VSF_HW_RST_ECCM2 
VSF_HW_RST_CORDIC 
VSF_HW_RST_SDPU 
VSF_HW_RST_FMAC 
VSF_HW_RST_GPIOA 
VSF_HW_RST_GPIOB 
VSF_HW_RST_GPIOC 
VSF_HW_RST_GPIOD 
VSF_HW_RST_GPIOE 
VSF_HW_RST_GPIOF 
VSF_HW_RST_GPIOG 
VSF_HW_RST_GPIOH 
VSF_HW_RST_GPIOI 
VSF_HW_RST_GPIOJ 
VSF_HW_RST_GPIOK 
VSF_HW_RST_ECCM3 
VSF_HW_RST_PWR 
VSF_HW_RST_CRC 
VSF_HW_RST_SEMA4 
VSF_HW_RST_AFIO 
VSF_HW_RST_ESC 
VSF_HW_RST_BTIM1 
VSF_HW_RST_BTIM2 
VSF_HW_RST_BTIM3 
VSF_HW_RST_BTIM4 
VSF_HW_RST_GTIMB1 
VSF_HW_RST_GTIMB2 
VSF_HW_RST_GTIMB3 
VSF_HW_RST_GTIMA4 
VSF_HW_RST_GTIMA5 
VSF_HW_RST_GTIMA6 
VSF_HW_RST_GTIMA7 
VSF_HW_RST_SPI3 
VSF_HW_RST_DAC12 
VSF_HW_RST_WWDG2 
VSF_HW_RST_USART1 
VSF_HW_RST_USART2 
VSF_HW_RST_USART3 
VSF_HW_RST_USART4 
VSF_HW_RST_UART9 
VSF_HW_RST_UART10 
VSF_HW_RST_UART11 
VSF_HW_RST_UART12 
VSF_HW_RST_I2S3 
VSF_HW_RST_I2S4 
VSF_HW_RST_I2C1 
VSF_HW_RST_I2C2 
VSF_HW_RST_I2C3 
VSF_HW_RST_FDCAN1 
VSF_HW_RST_FDCAN2 
VSF_HW_RST_FDCAN5 
VSF_HW_RST_FDCAN6 
VSF_HW_RST_CAHI 
VSF_HW_RST_CAHD 
VSF_HW_RST_ATIM1 
VSF_HW_RST_ATIM2 
VSF_HW_RST_GTIMA1 
VSF_HW_RST_GTIMA2 
VSF_HW_RST_GTIMA3 
VSF_HW_RST_SHRTIM1 
VSF_HW_RST_SHRTIM2 
VSF_HW_RST_I2S1 
VSF_HW_RST_I2S2 
VSF_HW_RST_SPI1 
VSF_HW_RST_SPI2 
VSF_HW_RST_DSMU 
VSF_HW_RST_I2C4 
VSF_HW_RST_I2C5 
VSF_HW_RST_I2C6 
VSF_HW_RST_USART5 
VSF_HW_RST_USART6 
VSF_HW_RST_USART7 
VSF_HW_RST_USART8 
VSF_HW_RST_UART13 
VSF_HW_RST_UART14 
VSF_HW_RST_UART15 
VSF_HW_RST_FDCAN3 
VSF_HW_RST_FDCAN4 
VSF_HW_RST_FDCAN7 
VSF_HW_RST_FDCAN8 
VSF_HW_RST_ATIM3 
VSF_HW_RST_ATIM4 
VSF_HW_RST_SPI4 
VSF_HW_RST_SPI5 
VSF_HW_RST_SPI6 
VSF_HW_RST_SPI7 
VSF_HW_RST_I2C7 
VSF_HW_RST_I2C8 
VSF_HW_RST_I2C9 
VSF_HW_RST_I2C10 
VSF_HW_RST_LPTIM1 
VSF_HW_RST_LPTIM2 
VSF_HW_RST_LPTIM3 
VSF_HW_RST_LPTIM4 
VSF_HW_RST_LPTIM5 
VSF_HW_RST_LPUART1 
VSF_HW_RST_LPUART2 
VSF_HW_RST_COMP 

◆ vsf_hw_peripheral_en_t

enum vsf_hw_peripheral_en_t

Function Documentation

◆ vsf_hw_clkrst_region_set()

void vsf_hw_clkrst_region_set ( uint32_t  region,
uint_fast8_t  value 
)
extern

◆ vsf_hw_clkrst_region_get()

uint_fast8_t vsf_hw_clkrst_region_get ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_set_bit()

void vsf_hw_clkrst_region_set_bit ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_clear_bit()

void vsf_hw_clkrst_region_clear_bit ( uint32_t  region)
extern

◆ vsf_hw_clkrst_region_get_bit()

uint_fast8_t vsf_hw_clkrst_region_get_bit ( uint32_t  region)
extern

◆ vsf_hw_clk_get_src()

const vsf_hw_clk_t * vsf_hw_clk_get_src ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_get_freq_hz()

uint32_t vsf_hw_clk_get_freq_hz ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_enable()

void vsf_hw_clk_enable ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_disable()

void vsf_hw_clk_disable ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_is_enabled()

bool vsf_hw_clk_is_enabled ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_is_ready()

bool vsf_hw_clk_is_ready ( const vsf_hw_clk_t *  clk)
extern

◆ vsf_hw_clk_config()

vsf_err_t vsf_hw_clk_config ( const vsf_hw_clk_t *  clk,
const vsf_hw_clk_t *  clksrc,
uint16_t  prescaler,
uint32_t  freq_hz 
)
extern

◆ vsf_hw_pll_config()

vsf_err_t vsf_hw_pll_config ( const vsf_hw_clk_t *  clk,
uint32_t  out_freq_hz 
)
extern

configure frequency range of pll input/output clocks

Parameters
[in]clka pointer to PLL clock VSF_HW_CLK_PLL1 VSF_HW_CLK_PLL2 VSF_HW_CLK_PLL3
[in]out_freq_hzPLL output frequency in Hz

◆ vsf_hw_power_domain_enable()

void vsf_hw_power_domain_enable ( const vsf_hw_pwr_domain_t *  domain)
extern

◆ vsf_hw_power_domain_disable()

void vsf_hw_power_domain_disable ( const vsf_hw_pwr_domain_t *  domain)
extern

◆ vsf_hw_power_domain_is_ready()

bool vsf_hw_power_domain_is_ready ( const vsf_hw_pwr_domain_t *  domain)
extern

◆ vsf_hw_power_enable()

void vsf_hw_power_enable ( const vsf_hw_pwr_t *  pwr)
extern

◆ vsf_hw_power_disable()

void vsf_hw_power_disable ( const vsf_hw_pwr_t *  pwr)
extern

Variable Documentation

◆ VSF_HW_CLK_HSE

const vsf_hw_clk_t VSF_HW_CLK_HSE
extern

◆ VSF_HW_CLK_HSE_CG

const vsf_hw_clk_t VSF_HW_CLK_HSE_CG
extern

◆ VSF_HW_CLK_HSE_KER_CG

const vsf_hw_clk_t VSF_HW_CLK_HSE_KER_CG
extern

◆ VSF_HW_CLK_LSE

const vsf_hw_clk_t VSF_HW_CLK_LSE
extern

◆ VSF_HW_CLK_HSI

const vsf_hw_clk_t VSF_HW_CLK_HSI
extern

◆ VSF_HW_CLK_HSI_CG

const vsf_hw_clk_t VSF_HW_CLK_HSI_CG
extern

◆ VSF_HW_CLK_HSI_KER_CG

const vsf_hw_clk_t VSF_HW_CLK_HSI_KER_CG
extern

◆ VSF_HW_CLK_MSI

const vsf_hw_clk_t VSF_HW_CLK_MSI
extern

◆ VSF_HW_CLK_MSI_CG

const vsf_hw_clk_t VSF_HW_CLK_MSI_CG
extern

◆ VSF_HW_CLK_MSI_KER_CG

const vsf_hw_clk_t VSF_HW_CLK_MSI_KER_CG
extern

◆ VSF_HW_CLK_LSI

const vsf_hw_clk_t VSF_HW_CLK_LSI
extern

◆ VSF_HW_CLK_PLL1

const vsf_hw_clk_t VSF_HW_CLK_PLL1
extern

◆ VSF_HW_CLK_PLL1A

const vsf_hw_clk_t VSF_HW_CLK_PLL1A
extern

◆ VSF_HW_CLK_PLL1B

const vsf_hw_clk_t VSF_HW_CLK_PLL1B
extern

◆ VSF_HW_CLK_PLL1C

const vsf_hw_clk_t VSF_HW_CLK_PLL1C
extern

◆ VSF_HW_CLK_PLL2

const vsf_hw_clk_t VSF_HW_CLK_PLL2
extern

◆ VSF_HW_CLK_PLL2A

const vsf_hw_clk_t VSF_HW_CLK_PLL2A
extern

◆ VSF_HW_CLK_PLL2B

const vsf_hw_clk_t VSF_HW_CLK_PLL2B
extern

◆ VSF_HW_CLK_PLL2C

const vsf_hw_clk_t VSF_HW_CLK_PLL2C
extern

◆ VSF_HW_CLK_PLL3

const vsf_hw_clk_t VSF_HW_CLK_PLL3
extern

◆ VSF_HW_CLK_PLL3A

const vsf_hw_clk_t VSF_HW_CLK_PLL3A
extern

◆ VSF_HW_CLK_PLL3B

const vsf_hw_clk_t VSF_HW_CLK_PLL3B
extern

◆ VSF_HW_CLK_PLL3C

const vsf_hw_clk_t VSF_HW_CLK_PLL3C
extern

◆ VSF_HW_CLK_SHRPLL

const vsf_hw_clk_t VSF_HW_CLK_SHRPLL
extern

◆ VSF_HW_CLK_AXISYS

const vsf_hw_clk_t VSF_HW_CLK_AXISYS
extern

◆ VSF_HW_CLK_AXIHYP

const vsf_hw_clk_t VSF_HW_CLK_AXIHYP
extern

◆ VSF_HW_CLK_SYS

const vsf_hw_clk_t VSF_HW_CLK_SYS
extern

◆ VSF_HW_CLK_SYSBUS

const vsf_hw_clk_t VSF_HW_CLK_SYSBUS
extern

◆ VSF_HW_CLK_CPU

const vsf_hw_clk_t VSF_HW_CLK_CPU
extern

◆ VSF_HW_CLK_SYSTICK

const vsf_hw_clk_t VSF_HW_CLK_SYSTICK
extern

◆ VSF_HW_CLK_AXI

const vsf_hw_clk_t VSF_HW_CLK_AXI
extern

◆ VSF_HW_CLK_APB1

const vsf_hw_clk_t VSF_HW_CLK_APB1
extern

◆ VSF_HW_CLK_APB2

const vsf_hw_clk_t VSF_HW_CLK_APB2
extern

◆ VSF_HW_CLK_APB5

const vsf_hw_clk_t VSF_HW_CLK_APB5
extern

◆ VSF_HW_CLK_APB6

const vsf_hw_clk_t VSF_HW_CLK_APB6
extern

◆ VSF_HW_CLK_PERI

const vsf_hw_clk_t VSF_HW_CLK_PERI
extern

◆ VSF_HW_CLK_SDRAM

const vsf_hw_clk_t VSF_HW_CLK_SDRAM
extern

◆ VSF_HW_CLK_SDMMC1

const vsf_hw_clk_t VSF_HW_CLK_SDMMC1
extern

◆ VSF_HW_CLK_SDMMC2

const vsf_hw_clk_t VSF_HW_CLK_SDMMC2
extern

◆ VSF_HW_CLK_USART1_2

const vsf_hw_clk_t VSF_HW_CLK_USART1_2
extern

◆ VSF_HW_CLK_USBREF

const vsf_hw_clk_t VSF_HW_CLK_USBREF
extern

◆ VSF_HW_PWR_DOMAIN_HCS1

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS1
extern

◆ VSF_HW_PWR_DOMAIN_HCS2

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS2
extern

◆ VSF_HW_PWR_DOMAIN_GRC

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_GRC
extern

◆ VSF_HW_PWR_DOMAIN_ESC

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_ESC
extern

◆ VSF_HW_PWR_DOMAIN_MDMA

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_MDMA
extern

◆ VSF_HW_PWR_DOMAIN_SHRA

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHRA
extern

◆ VSF_HW_PWR_DOMAIN_SHR2

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR2
extern

◆ VSF_HW_PWR_DOMAIN_SHR1

const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR1
extern

◆ VSF_HW_PWR_GPU

const vsf_hw_pwr_t VSF_HW_PWR_GPU
extern

◆ VSF_HW_PWR_LCDC

const vsf_hw_pwr_t VSF_HW_PWR_LCDC
extern

◆ VSF_HW_PWR_JPEG

const vsf_hw_pwr_t VSF_HW_PWR_JPEG
extern

◆ VSF_HW_PWR_DSI

const vsf_hw_pwr_t VSF_HW_PWR_DSI
extern

◆ VSF_HW_PWR_DVP

const vsf_hw_pwr_t VSF_HW_PWR_DVP
extern

◆ VSF_HW_PWR_ETH2

const vsf_hw_pwr_t VSF_HW_PWR_ETH2
extern

◆ VSF_HW_PWR_USB2

const vsf_hw_pwr_t VSF_HW_PWR_USB2
extern

◆ VSF_HW_PWR_SDMMC2

const vsf_hw_pwr_t VSF_HW_PWR_SDMMC2
extern

◆ VSF_HW_PWR_ETH1

const vsf_hw_pwr_t VSF_HW_PWR_ETH1
extern

◆ VSF_HW_PWR_USB1

const vsf_hw_pwr_t VSF_HW_PWR_USB1
extern

◆ VSF_HW_PWR_SDMMC1

const vsf_hw_pwr_t VSF_HW_PWR_SDMMC1
extern

◆ VSF_HW_PWR_FMAC

const vsf_hw_pwr_t VSF_HW_PWR_FMAC
extern

◆ VSF_HW_PWR_ESC

const vsf_hw_pwr_t VSF_HW_PWR_ESC
extern
Generated from commit: vsfteam/vsf@cfd571b