VSF Documented
common.h
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1/*****************************************************************************
2 * Copyright(C)2009-2022 by VSF Team *
3 * *
4 * Licensed under the Apache License, Version 2.0 (the "License"); *
5 * you may not use this file except in compliance with the License. *
6 * You may obtain a copy of the License at *
7 * *
8 * http://www.apache.org/licenses/LICENSE-2.0 *
9 * *
10 * Unless required by applicable law or agreed to in writing, software *
11 * distributed under the License is distributed on an "AS IS" BASIS, *
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
13 * See the License for the specific language governing permissions and *
14 * limitations under the License. *
15 * *
16 ****************************************************************************/
17
18#ifndef __HAL_DRIVER_NATIONS_N32H76X_N32H78X_COMMON_H__
19#define __HAL_DRIVER_NATIONS_N32H76X_N32H78X_COMMON_H__
20
21/* \note common.h should only be included by device.h */
22
23/*============================ INCLUDES ======================================*/
24
25#include "hal/vsf_hal_cfg.h"
26#include "hal/arch/vsf_arch.h"
27
28/*============================ MACROS ========================================*/
29
30// CLK & RST REGION
31
32#define VSF_HW_REG_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH) \
33 (((__WORD_OFFSET) << 16) | ((__BIT_LENGTH) << 8) | ((__BIT_OFFSET) << 0))
34#define VSF_HW_CLKRST_REGION VSF_HW_REG_REGION
35
36/*============================ MACROFIED FUNCTIONS ===========================*/
37
38#define vsf_hw_peripheral_clk_set vsf_hw_clkrst_region_set
39#define vsf_hw_peripheral_clk_get vsf_hw_clkrst_region_get
40
41#define vsf_hw_peripheral_rst_set vsf_hw_clkrst_region_set_bit
42#define vsf_hw_peripheral_rst_clear vsf_hw_clkrst_region_clear_bit
43#define vsf_hw_peripheral_rst_get vsf_hw_clkrst_region_get_bit
44
45#define vsf_hw_peripheral_enable vsf_hw_clkrst_region_set_bit
46#define vsf_hw_peripheral_disable vsf_hw_clkrst_region_clear_bit
47
48#define VSF_SYSTIMER_FREQ vsf_hw_clk_get_freq_hz(&VSF_HW_CLK_SYSTICK)
49
50/*============================ TYPES =========================================*/
51
52typedef enum vsf_hw_peripheral_rst_t {
53 // AXI
54 // RCC.AXIRST1
55 VSF_HW_RST_JPEGD = VSF_HW_CLKRST_REGION(0x54, 28, 1),// JPEGDRST
56 VSF_HW_RST_JPEGE = VSF_HW_CLKRST_REGION(0x54, 20, 1),// JPEGERST
57 VSF_HW_RST_DMAMUX2 = VSF_HW_CLKRST_REGION(0x54, 16, 1),// DMAMUX2RST
58 VSF_HW_RST_MDMA = VSF_HW_CLKRST_REGION(0x54, 12, 1),// MDMARST
59 VSF_HW_RST_SDMMC1 = VSF_HW_CLKRST_REGION(0x54, 9, 1),// SDMMC1RST
60 VSF_HW_RST_SDHOST1 = VSF_HW_CLKRST_REGION(0x54, 8, 1),// SDHOST1RST
61 VSF_HW_RST_ECCM1 = VSF_HW_CLKRST_REGION(0x54, 4, 1),// ECCM1RST
62 VSF_HW_RST_OTPC = VSF_HW_CLKRST_REGION(0x54, 0, 1),// OTPCRST
63 // RCC.AXIRST2
64 VSF_HW_RST_DSICFG = VSF_HW_CLKRST_REGION(0x55, 29, 1),// DSICFGRST
65 VSF_HW_RST_DSI = VSF_HW_CLKRST_REGION(0x55, 28, 1),// DSIRST
66 VSF_HW_RST_LCD = VSF_HW_CLKRST_REGION(0x55, 24, 1),// LCDRST
67 VSF_HW_RST_DVP1 = VSF_HW_CLKRST_REGION(0x55, 16, 1),// DVP1RST
68 VSF_HW_RST_DVP2 = VSF_HW_CLKRST_REGION(0x55, 8, 1),// DVP2RST
69 VSF_HW_RST_WWDG1 = VSF_HW_CLKRST_REGION(0x55, 0, 1),// WWDG1RST
70 // RCC.AXIRST3
71 VSF_HW_RST_GPU = VSF_HW_CLKRST_REGION(0x56, 0, 1),// GPURST
72 // RCC.AXIRST4
73 VSF_HW_RST_XSPI1 = VSF_HW_CLKRST_REGION(0x57, 28, 1),// XSPI1RST
74 VSF_HW_RST_XSPI2 = VSF_HW_CLKRST_REGION(0x57, 24, 1),// XSPI2RST
75 VSF_HW_RST_FEMCCFG = VSF_HW_CLKRST_REGION(0x57, 21, 1),// FEMCCFGRST
76 VSF_HW_RST_FEMC = VSF_HW_CLKRST_REGION(0x57, 20, 1),// FEMCRST
77 VSF_HW_RST_SDRAM = VSF_HW_CLKRST_REGION(0x57, 16, 1),// SDRAMRST
78
79 // AHB1
80 //RCC.AHB1RST1
81 VSF_HW_RST_SDMMC2 = VSF_HW_CLKRST_REGION(0x19, 29, 1),// SDMMC2RST
82 VSF_HW_RST_SDHOST2 = VSF_HW_CLKRST_REGION(0x19, 28, 1),// SDHOST2RST
83 VSF_HW_RST_USB2WRAP = VSF_HW_CLKRST_REGION(0x19, 22, 1),// USB2WRAPRST
84 VSF_HW_RST_USB2POR = VSF_HW_CLKRST_REGION(0x19, 21, 1),// USB2PORRST
85 VSF_HW_RST_USB2 = VSF_HW_CLKRST_REGION(0x19, 20, 1),// USB2RST
86 VSF_HW_RST_DMAMUX1 = VSF_HW_CLKRST_REGION(0x19, 16, 1),// DMAMUX1RST
87 VSF_HW_RST_ADC1 = VSF_HW_CLKRST_REGION(0x19, 0, 1),// ADC1RST
88 //RCC.AHB1RST2
89 VSF_HW_RST_ETH2 = VSF_HW_CLKRST_REGION(0x1A, 0, 1),// ETH2RST
90 //RCC.AHB1RST3
91 VSF_HW_RST_ECCMAC = VSF_HW_CLKRST_REGION(0x1B, 24, 1),// ECCMACRST
92 VSF_HW_RST_DMA1 = VSF_HW_CLKRST_REGION(0x1B, 16, 1),// DMA1RST
93 VSF_HW_RST_DMA2 = VSF_HW_CLKRST_REGION(0x1B, 8, 1),// DMA2RST
94 VSF_HW_RST_DMA3 = VSF_HW_CLKRST_REGION(0x1B, 0, 1),// DMA3RST
95 //RCC.AHB1RST4
96 VSF_HW_RST_ADC2 = VSF_HW_CLKRST_REGION(0x1C, 16, 1),// ADC2RST
97 VSF_HW_RST_ADC3 = VSF_HW_CLKRST_REGION(0x1C, 0, 1),// ADC3RST
98
99 // AHB2
100 // RCC.AHB2RST1
101 VSF_HW_RST_DAC56 = VSF_HW_CLKRST_REGION(0x2D, 25, 1),// DAC56RST
102 VSF_HW_RST_DAC34 = VSF_HW_CLKRST_REGION(0x2D, 24, 1),// DAC34RST
103 VSF_HW_RST_USB1WRAP = VSF_HW_CLKRST_REGION(0x2D, 22, 1),// USB1WRAPRST
104 VSF_HW_RST_USB1POR = VSF_HW_CLKRST_REGION(0x2D, 21, 1),// USB1PORRST
105 VSF_HW_RST_USB1 = VSF_HW_CLKRST_REGION(0x2D, 20, 1),// USB1RST
106 VSF_HW_RST_ETH1 = VSF_HW_CLKRST_REGION(0x2D, 16, 1),// ETH1RST
107 VSF_HW_RST_ECCM2 = VSF_HW_CLKRST_REGION(0x2D, 12, 1),// ECCM2RST
108 VSF_HW_RST_CORDIC = VSF_HW_CLKRST_REGION(0x2D, 8, 1),// CORDICRST
109 VSF_HW_RST_SDPU = VSF_HW_CLKRST_REGION(0x2D, 4, 1),// SDPURST
110 VSF_HW_RST_FMAC = VSF_HW_CLKRST_REGION(0x2D, 0, 1),// FMACRST
111
112 // AHB5
113 // RCC.AHB5RST1
114 VSF_HW_RST_GPIO0 = VSF_HW_CLKRST_REGION(0x3B, 28, 1),// GPIOARST
115 VSF_HW_RST_GPIO1 = VSF_HW_CLKRST_REGION(0x3B, 24, 1),// GPIOBRST
116 VSF_HW_RST_GPIO2 = VSF_HW_CLKRST_REGION(0x3B, 20, 1),// GPIOCRST
117 VSF_HW_RST_GPIO3 = VSF_HW_CLKRST_REGION(0x3B, 16, 1),// GPIODRST
118 VSF_HW_RST_GPIO4 = VSF_HW_CLKRST_REGION(0x3B, 12, 1),// GPIOERST
119 VSF_HW_RST_GPIO5 = VSF_HW_CLKRST_REGION(0x3B, 8, 1),// GPIOFRST
120 VSF_HW_RST_GPIO6 = VSF_HW_CLKRST_REGION(0x3B, 4, 1),// GPIOGRST
121 VSF_HW_RST_GPIO7 = VSF_HW_CLKRST_REGION(0x3B, 0, 1),// GPIOHRST
122 // RCC.AHB5RST2
123 VSF_HW_RST_GPIO8 = VSF_HW_CLKRST_REGION(0x3C, 28, 1),// GPIOIRST
124 VSF_HW_RST_GPIO9 = VSF_HW_CLKRST_REGION(0x3C, 24, 1),// GPIOJRST
125 VSF_HW_RST_GPIO10 = VSF_HW_CLKRST_REGION(0x3C, 20, 1),// GPIOKRST
126 VSF_HW_RST_ECCM3 = VSF_HW_CLKRST_REGION(0x3C, 16, 1),// ECCM3RST
127 VSF_HW_RST_PWR = VSF_HW_CLKRST_REGION(0x3C, 12, 1),// PWRRST
128 VSF_HW_RST_CRC = VSF_HW_CLKRST_REGION(0x3C, 8, 1),// CRCRST
129 VSF_HW_RST_SEMA4 = VSF_HW_CLKRST_REGION(0x3C, 4, 1),// SEMA4RST
130 VSF_HW_RST_AFIO = VSF_HW_CLKRST_REGION(0x3C, 0, 1),// AFIORST
131
132 // AHB9
133 // RCC.AHB9RST1
134 VSF_HW_RST_ESC = VSF_HW_CLKRST_REGION(0x0C, 0, 1),// ESCRST
135
136 // APB1
137 // RCC.APB1RST1
138 VSF_HW_RST_BTIM1 = VSF_HW_CLKRST_REGION(0x25, 28, 1),// BTIM1RST
139 VSF_HW_RST_BTIM2 = VSF_HW_CLKRST_REGION(0x25, 24, 1),// BTIM2RST
140 VSF_HW_RST_BTIM3 = VSF_HW_CLKRST_REGION(0x25, 20, 1),// BTIM3RST
141 VSF_HW_RST_BTIM4 = VSF_HW_CLKRST_REGION(0x25, 16, 1),// BTIM4RST
142 VSF_HW_RST_GTIMB1 = VSF_HW_CLKRST_REGION(0x25, 12, 1),// GTIMB1RST
143 VSF_HW_RST_GTIMB2 = VSF_HW_CLKRST_REGION(0x25, 8, 1),// GTIMB2RST
144 VSF_HW_RST_GTIMB3 = VSF_HW_CLKRST_REGION(0x25, 4, 1),// GTIMB3RST
145 VSF_HW_RST_GTIMA4 = VSF_HW_CLKRST_REGION(0x25, 0, 1),// GTIMA4RST
146 // RCC.APB1RST2
147 VSF_HW_RST_GTIMA5 = VSF_HW_CLKRST_REGION(0x26, 28, 1),// GTIMA5RST
148 VSF_HW_RST_GTIMA6 = VSF_HW_CLKRST_REGION(0x26, 24, 1),// GTIMA6RST
149 VSF_HW_RST_GTIMA7 = VSF_HW_CLKRST_REGION(0x26, 20, 1),// GTIMA7RST
150 VSF_HW_RST_SPI3 = VSF_HW_CLKRST_REGION(0x26, 16, 1),// SPI3RST
151 VSF_HW_RST_DAC12 = VSF_HW_CLKRST_REGION(0x26, 12, 1),// DAC12RST
152 VSF_HW_RST_WWDG2 = VSF_HW_CLKRST_REGION(0x26, 4, 1),// WWDG2RST
153 // RCC.APB1RST3
154 VSF_HW_RST_USART1 = VSF_HW_CLKRST_REGION(0x27, 28, 1),// USART1RST
155 VSF_HW_RST_USART2 = VSF_HW_CLKRST_REGION(0x27, 24, 1),// USART2RST
156 VSF_HW_RST_USART3 = VSF_HW_CLKRST_REGION(0x27, 20, 1),// USART3RST
157 VSF_HW_RST_USART4 = VSF_HW_CLKRST_REGION(0x27, 16, 1),// USART4RST
158 VSF_HW_RST_UART9 = VSF_HW_CLKRST_REGION(0x27, 12, 1),// UART9RST
159 VSF_HW_RST_UART10 = VSF_HW_CLKRST_REGION(0x27, 8, 1),// UART10RST
160 VSF_HW_RST_UART11 = VSF_HW_CLKRST_REGION(0x27, 4, 1),// UART11RST
161 VSF_HW_RST_UART12 = VSF_HW_CLKRST_REGION(0x27, 0, 1),// UART12RST
162 // RCC.APB1RST4
163 VSF_HW_RST_I2S3 = VSF_HW_CLKRST_REGION(0x28, 28, 1),// I2S3RST
164 VSF_HW_RST_I2S4 = VSF_HW_CLKRST_REGION(0x28, 24, 1),// I2S4RST
165 VSF_HW_RST_I2C1 = VSF_HW_CLKRST_REGION(0x28, 20, 1),// I2C1RST
166 VSF_HW_RST_I2C2 = VSF_HW_CLKRST_REGION(0x28, 16, 1),// I2C2RST
167 VSF_HW_RST_I2C3 = VSF_HW_CLKRST_REGION(0x28, 12, 1),// I2C3RST
168 // RCC.APB1RST5
169 VSF_HW_RST_FDCAN1 = VSF_HW_CLKRST_REGION(0x29, 28, 1),// FDCAN1RST
170 VSF_HW_RST_FDCAN2 = VSF_HW_CLKRST_REGION(0x29, 24, 1),// FDCAN2RST
171 VSF_HW_RST_FDCAN5 = VSF_HW_CLKRST_REGION(0x29, 20, 1),// FDCAN5RST
172 VSF_HW_RST_FDCAN6 = VSF_HW_CLKRST_REGION(0x29, 16, 1),// FDCAN6RST
173 VSF_HW_RST_CAHI = VSF_HW_CLKRST_REGION(0x29, 4, 1),// CAHIRST
174 VSF_HW_RST_CAHD = VSF_HW_CLKRST_REGION(0x29, 0, 1),// CAHDRST
175
176 // APB2
177 // RCC.APB2RST1
178 VSF_HW_RST_ATIM1 = VSF_HW_CLKRST_REGION(0x35, 28, 1),// ATIM1RST
179 VSF_HW_RST_ATIM2 = VSF_HW_CLKRST_REGION(0x35, 24, 1),// ATIM2RST
180 VSF_HW_RST_GTIMA1 = VSF_HW_CLKRST_REGION(0x35, 20, 1),// GTIMA1RST
181 VSF_HW_RST_GTIMA2 = VSF_HW_CLKRST_REGION(0x35, 16, 1),// GTIMA2RST
182 VSF_HW_RST_GTIMA3 = VSF_HW_CLKRST_REGION(0x35, 12, 1),// GTIMA3RST
183 VSF_HW_RST_SHRTIM1 = VSF_HW_CLKRST_REGION(0x35, 8, 1),// SHRTIM1RST
184 VSF_HW_RST_SHRTIM2 = VSF_HW_CLKRST_REGION(0x35, 4, 1),// SHRTIM2RST
185 // RCC.APB2RST2
186 VSF_HW_RST_I2S1 = VSF_HW_CLKRST_REGION(0x36, 28, 1),// I2S1RST
187 VSF_HW_RST_I2S2 = VSF_HW_CLKRST_REGION(0x36, 24, 1),// I2S2RST
188 VSF_HW_RST_SPI1 = VSF_HW_CLKRST_REGION(0x36, 20, 1),// SPI1RST
189 VSF_HW_RST_SPI2 = VSF_HW_CLKRST_REGION(0x36, 16, 1),// SPI2RST
190 VSF_HW_RST_DSMU = VSF_HW_CLKRST_REGION(0x36, 12, 1),// DSMURST
191 VSF_HW_RST_I2C4 = VSF_HW_CLKRST_REGION(0x36, 8, 1),// I2C4RST
192 VSF_HW_RST_I2C5 = VSF_HW_CLKRST_REGION(0x36, 4, 1),// I2C5RST
193 VSF_HW_RST_I2C6 = VSF_HW_CLKRST_REGION(0x36, 0, 1),// I2C6RST
194 // RCC.APB2RST3
195 VSF_HW_RST_USART5 = VSF_HW_CLKRST_REGION(0x37, 28, 1),// USART5RST
196 VSF_HW_RST_USART6 = VSF_HW_CLKRST_REGION(0x37, 24, 1),// USART6RST
197 VSF_HW_RST_USART7 = VSF_HW_CLKRST_REGION(0x37, 20, 1),// USART7RST
198 VSF_HW_RST_USART8 = VSF_HW_CLKRST_REGION(0x37, 16, 1),// USART8RST
199 VSF_HW_RST_UART13 = VSF_HW_CLKRST_REGION(0x37, 12, 1),// UART13RST
200 VSF_HW_RST_UART14 = VSF_HW_CLKRST_REGION(0x37, 8, 1),// UART14RST
201 VSF_HW_RST_UART15 = VSF_HW_CLKRST_REGION(0x37, 4, 1),// UART15RST
202 // RCC.APB2RST4
203 VSF_HW_RST_FDCAN3 = VSF_HW_CLKRST_REGION(0x38, 28, 1),// FDCAN3RST
204 VSF_HW_RST_FDCAN4 = VSF_HW_CLKRST_REGION(0x38, 24, 1),// FDCAN4RST
205 VSF_HW_RST_FDCAN7 = VSF_HW_CLKRST_REGION(0x38, 20, 1),// FDCAN7RST
206 VSF_HW_RST_FDCAN8 = VSF_HW_CLKRST_REGION(0x38, 16, 1),// FDCAN8RST
207
208 // APB5
209 // RCC.APB5RST1
210 VSF_HW_RST_ATIM3 = VSF_HW_CLKRST_REGION(0x41, 28, 1),// ATIM3RST
211 VSF_HW_RST_ATIM4 = VSF_HW_CLKRST_REGION(0x41, 24, 1),// ATIM4RST
212 VSF_HW_RST_SPI4 = VSF_HW_CLKRST_REGION(0x41, 12, 1),// SPI4RST
213 VSF_HW_RST_SPI5 = VSF_HW_CLKRST_REGION(0x41, 8, 1),// SPI5RST
214 VSF_HW_RST_SPI6 = VSF_HW_CLKRST_REGION(0x41, 4, 1),// SPI6RST
215 VSF_HW_RST_SPI7 = VSF_HW_CLKRST_REGION(0x41, 0, 1),// SPI7RST
216 // RCC.APB5RST2
217 VSF_HW_RST_I2C7 = VSF_HW_CLKRST_REGION(0x42, 28, 1),// I2C7RST
218 VSF_HW_RST_I2C8 = VSF_HW_CLKRST_REGION(0x42, 24, 1),// I2C8RST
219 VSF_HW_RST_I2C9 = VSF_HW_CLKRST_REGION(0x42, 20, 1),// I2C9RST
220 VSF_HW_RST_I2C10 = VSF_HW_CLKRST_REGION(0x42, 16, 1),// I2C10RST
221
222 // Retention domain
223 // RCC.RDRST1
224 VSF_HW_RST_LPTIM1 = VSF_HW_CLKRST_REGION(0x47, 28, 1),// LPTIM1RST
225 VSF_HW_RST_LPTIM2 = VSF_HW_CLKRST_REGION(0x47, 24, 1),// LPTIM2RST
226 VSF_HW_RST_LPTIM3 = VSF_HW_CLKRST_REGION(0x47, 20, 1),// LPTIM3RST
227 VSF_HW_RST_LPTIM4 = VSF_HW_CLKRST_REGION(0x47, 16, 1),// LPTIM4RST
228 VSF_HW_RST_LPTIM5 = VSF_HW_CLKRST_REGION(0x47, 12, 1),// LPTIM5RST
229 VSF_HW_RST_LPUART1 = VSF_HW_CLKRST_REGION(0x47, 8, 1),// LPUART1RST
230 VSF_HW_RST_LPUART2 = VSF_HW_CLKRST_REGION(0x47, 4, 1),// LPUART2RST
231 // RCC.RDRST2
232 VSF_HW_RST_COMP = VSF_HW_CLKRST_REGION(0x48, 28, 1),// COMPRST
233
234 // GPIO0 .. GPIO10 are VSF standard, GPIOA .. GPIOK are vendor standard
235 VSF_HW_RST_GPIOA = VSF_HW_RST_GPIO0,
236 VSF_HW_RST_GPIOB = VSF_HW_RST_GPIO1,
237 VSF_HW_RST_GPIOC = VSF_HW_RST_GPIO2,
238 VSF_HW_RST_GPIOD = VSF_HW_RST_GPIO3,
239 VSF_HW_RST_GPIOE = VSF_HW_RST_GPIO4,
240 VSF_HW_RST_GPIOF = VSF_HW_RST_GPIO5,
241 VSF_HW_RST_GPIOG = VSF_HW_RST_GPIO6,
242 VSF_HW_RST_GPIOH = VSF_HW_RST_GPIO7,
243 VSF_HW_RST_GPIOI = VSF_HW_RST_GPIO8,
244 VSF_HW_RST_GPIOJ = VSF_HW_RST_GPIO9,
245 VSF_HW_RST_GPIOK = VSF_HW_RST_GPIO10,
246} vsf_hw_peripheral_rst_t;
247
248typedef enum vsf_hw_peripheral_en_t {
249 // AXI
250 // RCC.AXIEN1
251#if defined(CORE_CM4)
252 VSF_HW_EN_JPEGD = VSF_HW_CLKRST_REGION(0x50, 30, 1),// M4JPEGDEN
253 VSF_HW_EN_JPEGDLP = VSF_HW_CLKRST_REGION(0x50, 28, 1),// M4JPEGDLPEN
254 VSF_HW_EN_JPEGE = VSF_HW_CLKRST_REGION(0x50, 22, 1),// M4JPEGEEN
255 VSF_HW_EN_JPEGELP = VSF_HW_CLKRST_REGION(0x50, 20, 1),// M4JPEGELPEN
256 VSF_HW_EN_DMAMUX2 = VSF_HW_CLKRST_REGION(0x50, 18, 1),// M4DMAMUX2EN
257 VSF_HW_EN_DMAMUX2LP = VSF_HW_CLKRST_REGION(0x50, 16, 1),// M4DMAMUX2LPEN
258 VSF_HW_EN_MDMA = VSF_HW_CLKRST_REGION(0x50, 14, 1),// M4MDMAEN
259 VSF_HW_EN_MDMALP = VSF_HW_CLKRST_REGION(0x50, 12, 1),// M4MDMALPEN
260 VSF_HW_EN_SDMMC1 = VSF_HW_CLKRST_REGION(0x50, 10, 1),// M4SDMMC1EN
261 VSF_HW_EN_SDMMC1LP = VSF_HW_CLKRST_REGION(0x50, 8, 1),// M4SDMMC1LPEN
262 VSF_HW_EN_ECCM1 = VSF_HW_CLKRST_REGION(0x50, 6, 1),// M4ECCM1EN
263 VSF_HW_EN_ECCM1LP = VSF_HW_CLKRST_REGION(0x50, 4, 1),// M4ECCM1LPEN
264 VSF_HW_EN_OTPC = VSF_HW_CLKRST_REGION(0x50, 2, 1),// M4OPTCEN
265 VSF_HW_EN_OTPCLP = VSF_HW_CLKRST_REGION(0x50, 0, 1),// M4OPTCLPEN
266#elif defined(CORE_CM7)
267 VSF_HW_EN_JPEGD = VSF_HW_CLKRST_REGION(0x50, 31, 1),// M7JPEGDEN
268 VSF_HW_EN_JPEGDLP = VSF_HW_CLKRST_REGION(0x50, 29, 1),// M7JPEGDLPEN
269 VSF_HW_EN_JPEGE = VSF_HW_CLKRST_REGION(0x50, 23, 1),// M7JPEGEEN
270 VSF_HW_EN_JPEGELP = VSF_HW_CLKRST_REGION(0x50, 21, 1),// M7JPEGELPEN
271 VSF_HW_EN_DMAMUX2 = VSF_HW_CLKRST_REGION(0x50, 19, 1),// M7DMAMUX2EN
272 VSF_HW_EN_DMAMUX2LP = VSF_HW_CLKRST_REGION(0x50, 17, 1),// M7DMAMUX2LPEN
273 VSF_HW_EN_MDMA = VSF_HW_CLKRST_REGION(0x50, 15, 1),// M7MDMAEN
274 VSF_HW_EN_MDMALP = VSF_HW_CLKRST_REGION(0x50, 13, 1),// M7MDMALPEN
275 VSF_HW_EN_SDMMC1 = VSF_HW_CLKRST_REGION(0x50, 11, 1),// M7SDMMC1EN
276 VSF_HW_EN_SDMMC1LP = VSF_HW_CLKRST_REGION(0x50, 9, 1),// M7SDMMC1LPEN
277 VSF_HW_EN_ECCM1 = VSF_HW_CLKRST_REGION(0x50, 7, 1),// M7ECCM1EN
278 VSF_HW_EN_ECCM1LP = VSF_HW_CLKRST_REGION(0x50, 5, 1),// M7ECCM1LPEN
279 VSF_HW_EN_OTPC = VSF_HW_CLKRST_REGION(0x50, 3, 1),// M7OPTCEN
280 VSF_HW_EN_OTPCLP = VSF_HW_CLKRST_REGION(0x50, 1, 1),// M7OPTCLPEN
281#endif
282 // RCC.AXIEN2
283#if defined(CORE_CM4)
284 VSF_HW_EN_DSI = VSF_HW_CLKRST_REGION(0x51, 30, 1),// M4DSIEN
285 VSF_HW_EN_DSILP = VSF_HW_CLKRST_REGION(0x51, 28, 1),// M4DSILPEN
286 VSF_HW_EN_LCD = VSF_HW_CLKRST_REGION(0x51, 26, 1),// M4LCDEN
287 VSF_HW_EN_LCDLP = VSF_HW_CLKRST_REGION(0x51, 24, 1),// M4LCDLPEN
288 VSF_HW_EN_LCDAPB = VSF_HW_CLKRST_REGION(0x51, 22, 1),// M4LCDAPBEN
289 VSF_HW_EN_LCDAPBLP = VSF_HW_CLKRST_REGION(0x51, 20, 1),// M4LCDAPBLPEN
290 VSF_HW_EN_DVP1 = VSF_HW_CLKRST_REGION(0x51, 18, 1),// M4DVP1EN
291 VSF_HW_EN_DVP1LP = VSF_HW_CLKRST_REGION(0x51, 16, 1),// M4DVP1LPEN
292 VSF_HW_EN_DVP1APB = VSF_HW_CLKRST_REGION(0x51, 14, 1),// M4DVP1APBEN
293 VSF_HW_EN_DVP1APBLP = VSF_HW_CLKRST_REGION(0x51, 12, 1),// M4DVP1APBLPEN
294 VSF_HW_EN_DVP2 = VSF_HW_CLKRST_REGION(0x51, 10, 1),// M4DVP2EN
295 VSF_HW_EN_DVP2LP = VSF_HW_CLKRST_REGION(0x51, 8, 1),// M4DVP2LPEN
296 VSF_HW_EN_DVP2APB = VSF_HW_CLKRST_REGION(0x51, 6, 1),// M4DVP2APBEN
297 VSF_HW_EN_DVP2APBLP = VSF_HW_CLKRST_REGION(0x51, 4, 1),// M4DVP2APBLPEN
298 VSF_HW_EN_WWDG1 = VSF_HW_CLKRST_REGION(0x51, 2, 1),// M4WWDG1EN
299 VSF_HW_EN_WWDG1LP = VSF_HW_CLKRST_REGION(0x51, 0, 1),// M4WWDG1LPEN
300#elif defined(CORE_CM7)
301 VSF_HW_EN_DSI = VSF_HW_CLKRST_REGION(0x51, 31, 1),// M7DSIEN
302 VSF_HW_EN_DSILP = VSF_HW_CLKRST_REGION(0x51, 29, 1),// M7DSILPEN
303 VSF_HW_EN_LCD = VSF_HW_CLKRST_REGION(0x51, 27, 1),// M7LCDEN
304 VSF_HW_EN_LCDLP = VSF_HW_CLKRST_REGION(0x51, 25, 1),// M7LCDLPEN
305 VSF_HW_EN_LCDAPB = VSF_HW_CLKRST_REGION(0x51, 23, 1),// M7LCDAPBEN
306 VSF_HW_EN_LCDAPBLP = VSF_HW_CLKRST_REGION(0x51, 21, 1),// M7LCDAPBLPEN
307 VSF_HW_EN_DVP1 = VSF_HW_CLKRST_REGION(0x51, 19, 1),// M7DVP1EN
308 VSF_HW_EN_DVP1LP = VSF_HW_CLKRST_REGION(0x51, 17, 1),// M7DVP1LPEN
309 VSF_HW_EN_DVP1APB = VSF_HW_CLKRST_REGION(0x51, 15, 1),// M7DVP1APBEN
310 VSF_HW_EN_DVP1APBLP = VSF_HW_CLKRST_REGION(0x51, 13, 1),// M7DVP1APBLPEN
311 VSF_HW_EN_DVP2 = VSF_HW_CLKRST_REGION(0x51, 11, 1),// M7DVP2EN
312 VSF_HW_EN_DVP2LP = VSF_HW_CLKRST_REGION(0x51, 9, 1),// M7DVP2LPEN
313 VSF_HW_EN_DVP2APB = VSF_HW_CLKRST_REGION(0x51, 7, 1),// M7DVP2APBEN
314 VSF_HW_EN_DVP2APBLP = VSF_HW_CLKRST_REGION(0x51, 5, 1),// M7DVP2APBLPEN
315 VSF_HW_EN_WWDG1 = VSF_HW_CLKRST_REGION(0x51, 3, 1),// M7WWDG1EN
316 VSF_HW_EN_WWDG1LP = VSF_HW_CLKRST_REGION(0x51, 1, 1),// M7WWDG1LPEN
317#endif
318 // RCC.AXIEN3
319#if defined(CORE_CM4)
320 VSF_HW_EN_TASRAM2 = VSF_HW_CLKRST_REGION(0x52, 30, 1),// M4TASRAM2EN
321 VSF_HW_EN_TASRAM2LP = VSF_HW_CLKRST_REGION(0x52, 28, 1),// M4TASRAM2LPEN
322 VSF_HW_EN_TASRAM3 = VSF_HW_CLKRST_REGION(0x52, 26, 1),// M4TASRAM3EN
323 VSF_HW_EN_TASRAM3LP = VSF_HW_CLKRST_REGION(0x52, 24, 1),// M4TASRAM3LPEN
324 VSF_HW_EN_TCM = VSF_HW_CLKRST_REGION(0x52, 22, 1),// M4TCMEN
325 VSF_HW_EN_TCMLP = VSF_HW_CLKRST_REGION(0x52, 20, 1),// M4TCMLPEN
326 VSF_HW_EN_TCMAXI = VSF_HW_CLKRST_REGION(0x52, 18, 1),// M4TCMAXIEN
327 VSF_HW_EN_TCMAXILP = VSF_HW_CLKRST_REGION(0x52, 16, 1),// M4TCMAXILPEN
328 VSF_HW_EN_TCMAPB = VSF_HW_CLKRST_REGION(0x52, 14, 1),// M4TCMAPBEN
329 VSF_HW_EN_TCMAPBLP = VSF_HW_CLKRST_REGION(0x52, 12, 1),// M4TCMAPBLPEN
330 VSF_HW_EN_ASRAM1 = VSF_HW_CLKRST_REGION(0x52, 10, 1),// M4ASRAM1EN
331 VSF_HW_EN_ASRAM1LP = VSF_HW_CLKRST_REGION(0x52, 8, 1),// M4ASRAM1LPEN
332 VSF_HW_EN_AXIROM = VSF_HW_CLKRST_REGION(0x52, 6, 1),// M4AXIROMEN
333 VSF_HW_EN_AXIROMLP = VSF_HW_CLKRST_REGION(0x52, 4, 1),// M4AXIROMLPEN
334 VSF_HW_EN_GPU = VSF_HW_CLKRST_REGION(0x52, 2, 1),// M4GPUEN
335 VSF_HW_EN_GPULP = VSF_HW_CLKRST_REGION(0x52, 0, 1),// M4GPULPEN
336#elif defined(CORE_CM7)
337 VSF_HW_EN_TASRAM2 = VSF_HW_CLKRST_REGION(0x52, 31, 1),// M7TASRAM2EN
338 VSF_HW_EN_TASRAM2LP = VSF_HW_CLKRST_REGION(0x52, 29, 1),// M7TASRAM2LPEN
339 VSF_HW_EN_TASRAM3 = VSF_HW_CLKRST_REGION(0x52, 27, 1),// M7TASRAM3EN
340 VSF_HW_EN_TASRAM3LP = VSF_HW_CLKRST_REGION(0x52, 25, 1),// M7TASRAM3LPEN
341 VSF_HW_EN_TCM = VSF_HW_CLKRST_REGION(0x52, 23, 1),// M7TCMEN
342 VSF_HW_EN_TCMLP = VSF_HW_CLKRST_REGION(0x52, 21, 1),// M7TCMLPEN
343 VSF_HW_EN_TCMAXI = VSF_HW_CLKRST_REGION(0x52, 19, 1),// M7TCMAXIEN
344 VSF_HW_EN_TCMAXILP = VSF_HW_CLKRST_REGION(0x52, 17, 1),// M7TCMAXILPEN
345 VSF_HW_EN_TCMAPB = VSF_HW_CLKRST_REGION(0x52, 15, 1),// M7TCMAPBEN
346 VSF_HW_EN_TCMAPBLP = VSF_HW_CLKRST_REGION(0x52, 13, 1),// M7TCMAPBLPEN
347 VSF_HW_EN_ASRAM1 = VSF_HW_CLKRST_REGION(0x52, 11, 1),// M7ASRAM1EN
348 VSF_HW_EN_ASRAM1LP = VSF_HW_CLKRST_REGION(0x52, 9, 1),// M7ASRAM1LPEN
349 VSF_HW_EN_AXIROM = VSF_HW_CLKRST_REGION(0x52, 7, 1),// M7AXIROMEN
350 VSF_HW_EN_AXIROMLP = VSF_HW_CLKRST_REGION(0x52, 5, 1),// M7AXIROMLPEN
351 VSF_HW_EN_GPU = VSF_HW_CLKRST_REGION(0x52, 3, 1),// M7GPUEN
352 VSF_HW_EN_GPULP = VSF_HW_CLKRST_REGION(0x52, 1, 1),// M7GPULPEN
353#endif
354 // RCC.AXIEN4
355#if defined(CORE_CM4)
356 VSF_HW_EN_XSPI1 = VSF_HW_CLKRST_REGION(0x53, 30, 1),// M4XSPI1EN
357 VSF_HW_EN_XSPI1LP = VSF_HW_CLKRST_REGION(0x53, 28, 1),// M4XSPI1LPEN
358 VSF_HW_EN_XSPI2 = VSF_HW_CLKRST_REGION(0x53, 26, 1),// M4XSPI2EN
359 VSF_HW_EN_XSPI2LP = VSF_HW_CLKRST_REGION(0x53, 24, 1),// M4XSPI2LPEN
360 VSF_HW_EN_FEMC = VSF_HW_CLKRST_REGION(0x53, 22, 1),// M4FEMCEN
361 VSF_HW_EN_FEMCLP = VSF_HW_CLKRST_REGION(0x53, 20, 1),// M4FEMCLPEN
362 VSF_HW_EN_SDRAM = VSF_HW_CLKRST_REGION(0x53, 18, 1),// M4SDRAMEN
363 VSF_HW_EN_SDRAMLP = VSF_HW_CLKRST_REGION(0x53, 16, 1),// M4SDRAMLPEN
364 VSF_HW_EN_DSIULPS = VSF_HW_CLKRST_REGION(0x53, 2, 1),// M4DSIULPSEN
365 VSF_HW_EN_DSIULPSLP = VSF_HW_CLKRST_REGION(0x53, 0, 1),// M4DSIULPSLPEN
366#elif defined(CORE_CM7)
367#endif
368
369 // AHB1
370 // RCC.AHB1EN1
371#if defined(CORE_CM4)
372 VSF_HW_EN_SDMMC2 = VSF_HW_CLKRST_REGION(0x15, 30, 1),// M4SDMMC2EN
373 VSF_HW_EN_SDMMC2LP = VSF_HW_CLKRST_REGION(0x15, 28, 1),// M4SDMMC2LPEN
374 VSF_HW_EN_USB2 = VSF_HW_CLKRST_REGION(0x15, 22, 1),// M4USB2EN
375 VSF_HW_EN_USB2LP = VSF_HW_CLKRST_REGION(0x15, 20, 1),// M4USB2LPEN
376 VSF_HW_EN_DMAMUX1 = VSF_HW_CLKRST_REGION(0x15, 18, 1),// M4DMAMUX1EN
377 VSF_HW_EN_DMAMUX1LP = VSF_HW_CLKRST_REGION(0x15, 16, 1),// M4DMAMUX1LPEN
378 VSF_HW_EN_ADC1PLL = VSF_HW_CLKRST_REGION(0x15, 14, 1),// M4ADC1PLLEN
379 VSF_HW_EN_ADC1PLLLP = VSF_HW_CLKRST_REGION(0x15, 12, 1),// M4ADC1PLLLPEN
380 VSF_HW_EN_ADC1SYS = VSF_HW_CLKRST_REGION(0x15, 10, 1),// M4ADC1SYSEN
381 VSF_HW_EN_ADC1SYSLP = VSF_HW_CLKRST_REGION(0x15, 8, 1),// M4ADC1SYSLPEN
382 VSF_HW_EN_ADC1BUS = VSF_HW_CLKRST_REGION(0x15, 2, 1),// M4ADC1BUSEN
383 VSF_HW_EN_ADC1BUSLP = VSF_HW_CLKRST_REGION(0x15, 0, 1),// M4ADC1BUSLPEN
384#elif defined(CORE_CM7)
385 VSF_HW_EN_SDMMC2 = VSF_HW_CLKRST_REGION(0x15, 31, 1),// M7SDMMC2EN
386 VSF_HW_EN_SDMMC2LP = VSF_HW_CLKRST_REGION(0x15, 29, 1),// M7SDMMC2LPEN
387 VSF_HW_EN_USB2 = VSF_HW_CLKRST_REGION(0x15, 23, 1),// M7USB2EN
388 VSF_HW_EN_USB2LP = VSF_HW_CLKRST_REGION(0x15, 21, 1),// M7USB2LPEN
389 VSF_HW_EN_DMAMUX1 = VSF_HW_CLKRST_REGION(0x15, 19, 1),// M7DMAMUX1EN
390 VSF_HW_EN_DMAMUX1LP = VSF_HW_CLKRST_REGION(0x15, 17, 1),// M7DMAMUX1LPEN
391 VSF_HW_EN_ADC1PLL = VSF_HW_CLKRST_REGION(0x15, 15, 1),// M7ADC1PLLEN
392 VSF_HW_EN_ADC1PLLLP = VSF_HW_CLKRST_REGION(0x15, 13, 1),// M7ADC1PLLLPEN
393 VSF_HW_EN_ADC1SYS = VSF_HW_CLKRST_REGION(0x15, 11, 1),// M7ADC1SYSEN
394 VSF_HW_EN_ADC1SYSLP = VSF_HW_CLKRST_REGION(0x15, 9, 1),// M7ADC1SYSLPEN
395 VSF_HW_EN_ADC1BUS = VSF_HW_CLKRST_REGION(0x15, 3, 1),// M7ADC1BUSEN
396 VSF_HW_EN_ADC1BUSLP = VSF_HW_CLKRST_REGION(0x15, 1, 1),// M7ADC1BUSLPEN
397#endif
398 // RCC.AHB1EN2
399#if defined(CORE_CM4)
400 VSF_HW_EN_ETH2TX = VSF_HW_CLKRST_REGION(0x16, 10, 1),// M4ETH2TXEN
401 VSF_HW_EN_ETH2TXLP = VSF_HW_CLKRST_REGION(0x16, 8, 1),// M4ETH2TXLPEN
402 VSF_HW_EN_ETH2RX = VSF_HW_CLKRST_REGION(0x16, 6, 1),// M4ETH2RXEN
403 VSF_HW_EN_ETH2RXLP = VSF_HW_CLKRST_REGION(0x16, 4, 1),// M4ETH2RXLPEN
404 VSF_HW_EN_ETH2MAC = VSF_HW_CLKRST_REGION(0x16, 2, 1),// M4ETH2MACEN
405 VSF_HW_EN_ETH2MACLP = VSF_HW_CLKRST_REGION(0x16, 0, 1),// M4ETH2MACLPEN
406#elif defined(CORE_CM7)
407 VSF_HW_EN_ETH2TX = VSF_HW_CLKRST_REGION(0x16, 11, 1),// M7ETH2TXEN
408 VSF_HW_EN_ETH2TXLP = VSF_HW_CLKRST_REGION(0x16, 9, 1),// M7ETH2TXLPEN
409 VSF_HW_EN_ETH2RX = VSF_HW_CLKRST_REGION(0x16, 7, 1),// M7ETH2RXEN
410 VSF_HW_EN_ETH2RXLP = VSF_HW_CLKRST_REGION(0x16, 5, 1),// M7ETH2RXLPEN
411 VSF_HW_EN_ETH2MAC = VSF_HW_CLKRST_REGION(0x16, 3, 1),// M7ETH2MACEN
412 VSF_HW_EN_ETH2MACLP = VSF_HW_CLKRST_REGION(0x16, 1, 1),// M7ETH2MACLPEN
413#endif
414 // RCC.AHB1EN3
415#if defined(CORE_CM4)
416 VSF_HW_EN_ECCMAC = VSF_HW_CLKRST_REGION(0x17, 26, 1),// M4ECCMACEN
417 VSF_HW_EN_ECCMACLP = VSF_HW_CLKRST_REGION(0x17, 24, 1),// M4ECCMACLPEN
418 VSF_HW_EN_DMA1 = VSF_HW_CLKRST_REGION(0x17, 18, 1),// M4DMA1EN
419 VSF_HW_EN_DMA1LP = VSF_HW_CLKRST_REGION(0x17, 16, 1),// M4DMA1LPEN
420 VSF_HW_EN_DMA2 = VSF_HW_CLKRST_REGION(0x17, 10, 1),// M4DMA2EN
421 VSF_HW_EN_DMA2LP = VSF_HW_CLKRST_REGION(0x17, 8, 1),// M4DMA2LPEN
422 VSF_HW_EN_DMA3 = VSF_HW_CLKRST_REGION(0x17, 2, 1),// M4DMA3EN
423 VSF_HW_EN_DMA3LP = VSF_HW_CLKRST_REGION(0x17, 0, 1),// M4DMA3LPEN
424#elif defined(CORE_CM7)
425 VSF_HW_EN_ECCMAC = VSF_HW_CLKRST_REGION(0x17, 27, 1),// M7ECCMACEN
426 VSF_HW_EN_ECCMACLP = VSF_HW_CLKRST_REGION(0x17, 25, 1),// M7ECCMACLPEN
427 VSF_HW_EN_DMA1 = VSF_HW_CLKRST_REGION(0x17, 19, 1),// M7DMA1EN
428 VSF_HW_EN_DMA1LP = VSF_HW_CLKRST_REGION(0x17, 17, 1),// M7DMA1LPEN
429 VSF_HW_EN_DMA2 = VSF_HW_CLKRST_REGION(0x17, 11, 1),// M7DMA2EN
430 VSF_HW_EN_DMA2LP = VSF_HW_CLKRST_REGION(0x17, 9, 1),// M7DMA2LPEN
431 VSF_HW_EN_DMA3 = VSF_HW_CLKRST_REGION(0x17, 3, 1),// M7DMA3EN
432 VSF_HW_EN_DMA3LP = VSF_HW_CLKRST_REGION(0x17, 1, 1),// M7DMA3LPEN
433#endif
434 // RCC.AHB1EN4
435#if defined(CORE_CM4)
436 VSF_HW_EN_ADC2PLL = VSF_HW_CLKRST_REGION(0x18, 30, 1),// M4ADC2PLLEN
437 VSF_HW_EN_ADC2PLLLP = VSF_HW_CLKRST_REGION(0x18, 28, 1),// M4ADC2PLLLPEN
438 VSF_HW_EN_ADC2SYS = VSF_HW_CLKRST_REGION(0x18, 26, 1),// M4ADC2SYSEN
439 VSF_HW_EN_ADC2SYSLP = VSF_HW_CLKRST_REGION(0x18, 24, 1),// M4ADC2SYSLPEN
440 VSF_HW_EN_ADC2BUS = VSF_HW_CLKRST_REGION(0x18, 18, 1),// M4ADC2BUSEN
441 VSF_HW_EN_ADC2BUSLP = VSF_HW_CLKRST_REGION(0x18, 16, 1),// M4ADC2BUSLPEN
442 VSF_HW_EN_ADC3PLL = VSF_HW_CLKRST_REGION(0x18, 14, 1),// M4ADC3PLLEN
443 VSF_HW_EN_ADC3PLLLP = VSF_HW_CLKRST_REGION(0x18, 12, 1),// M4ADC3PLLLPEN
444 VSF_HW_EN_ADC3SYS = VSF_HW_CLKRST_REGION(0x18, 10, 1),// M4ADC3SYSEN
445 VSF_HW_EN_ADC3SYSLP = VSF_HW_CLKRST_REGION(0x18, 8, 1),// M4ADC3SYSLPEN
446 VSF_HW_EN_ADC3BUS = VSF_HW_CLKRST_REGION(0x18, 2, 1),// M4ADC3BUSEN
447 VSF_HW_EN_ADC3BUSLP = VSF_HW_CLKRST_REGION(0x18, 0, 1),// M4ADC3BUSLPEN
448#elif defined(CORE_CM7)
449 VSF_HW_EN_ADC2PLL = VSF_HW_CLKRST_REGION(0x18, 31, 1),// M7ADC2PLLEN
450 VSF_HW_EN_ADC2PLLLP = VSF_HW_CLKRST_REGION(0x18, 29, 1),// M7ADC2PLLLPEN
451 VSF_HW_EN_ADC2SYS = VSF_HW_CLKRST_REGION(0x18, 27, 1),// M7ADC2SYSEN
452 VSF_HW_EN_ADC2SYSLP = VSF_HW_CLKRST_REGION(0x18, 25, 1),// M7ADC2SYSLPEN
453 VSF_HW_EN_ADC2BUS = VSF_HW_CLKRST_REGION(0x18, 19, 1),// M7ADC2BUSEN
454 VSF_HW_EN_ADC2BUSLP = VSF_HW_CLKRST_REGION(0x18, 17, 1),// M7ADC2BUSLPEN
455 VSF_HW_EN_ADC3PLL = VSF_HW_CLKRST_REGION(0x18, 15, 1),// M7ADC3PLLEN
456 VSF_HW_EN_ADC3PLLLP = VSF_HW_CLKRST_REGION(0x18, 13, 1),// M7ADC3PLLLPEN
457 VSF_HW_EN_ADC3SYS = VSF_HW_CLKRST_REGION(0x18, 11, 1),// M7ADC3SYSEN
458 VSF_HW_EN_ADC3SYSLP = VSF_HW_CLKRST_REGION(0x18, 9, 1),// M7ADC3SYSLPEN
459 VSF_HW_EN_ADC3BUS = VSF_HW_CLKRST_REGION(0x18, 3, 1),// M7ADC3BUSEN
460 VSF_HW_EN_ADC3BUSLP = VSF_HW_CLKRST_REGION(0x18, 1, 1),// M7ADC3BUSLPEN
461#endif
462
463 // AHB2
464 // RCC.AHB2EN1
465#if defined(CORE_CM4)
466 VSF_HW_EN_USB1 = VSF_HW_CLKRST_REGION(0x2C, 22, 1),// M4USB1EN
467 VSF_HW_EN_USB1LP = VSF_HW_CLKRST_REGION(0x2C, 20, 1),// M4USB1LPEN
468 VSF_HW_EN_ECCM2 = VSF_HW_CLKRST_REGION(0x2C, 14, 1),// M4ECCM2EN
469 VSF_HW_EN_ECCM2LP = VSF_HW_CLKRST_REGION(0x2C, 12, 1),// M4ECCM2LPEN
470 VSF_HW_EN_CORDIC = VSF_HW_CLKRST_REGION(0x2C, 10, 1),// M4CORDICEN
471 VSF_HW_EN_CORDICLP = VSF_HW_CLKRST_REGION(0x2C, 8, 1),// M4CORDICLPEN
472 VSF_HW_EN_SDPU = VSF_HW_CLKRST_REGION(0x2C, 6, 1),// M4SDPUEN
473 VSF_HW_EN_SDPULP = VSF_HW_CLKRST_REGION(0x2C, 4, 1),// M4SDPULPEN
474 VSF_HW_EN_FMAC = VSF_HW_CLKRST_REGION(0x2C, 2, 1),// M4FMACEN
475 VSF_HW_EN_FMACLP = VSF_HW_CLKRST_REGION(0x2C, 0, 1),// M4FMACLPEN
476#elif defined(CORE_CM7)
477 VSF_HW_EN_USB1 = VSF_HW_CLKRST_REGION(0x2C, 23, 1),// M7USB1EN
478 VSF_HW_EN_USB1LP = VSF_HW_CLKRST_REGION(0x2C, 21, 1),// M7USB1LPEN
479 VSF_HW_EN_ECCM2 = VSF_HW_CLKRST_REGION(0x2C, 15, 1),// M7ECCM2EN
480 VSF_HW_EN_ECCM2LP = VSF_HW_CLKRST_REGION(0x2C, 13, 1),// M7ECCM2LPEN
481 VSF_HW_EN_CORDIC = VSF_HW_CLKRST_REGION(0x2C, 11, 1),// M7CORDICEN
482 VSF_HW_EN_CORDICLP = VSF_HW_CLKRST_REGION(0x2C, 9, 1),// M7CORDICLPEN
483 VSF_HW_EN_SDPU = VSF_HW_CLKRST_REGION(0x2C, 7, 1),// M7SDPUEN
484 VSF_HW_EN_SDPULP = VSF_HW_CLKRST_REGION(0x2C, 5, 1),// M7SDPULPEN
485 VSF_HW_EN_FMAC = VSF_HW_CLKRST_REGION(0x2C, 3, 1),// M7FMACEN
486 VSF_HW_EN_FMACLP = VSF_HW_CLKRST_REGION(0x2C, 1, 1),// M7FMACLPEN
487#endif
488 // RCC.AHB2EN2
489#if defined(CORE_CM4)
490 VSF_HW_EN_DAC56 = VSF_HW_CLKRST_REGION(0x6D, 22, 1),// M4DAC56EN
491 VSF_HW_EN_DAC56LP = VSF_HW_CLKRST_REGION(0x6D, 20, 1),// M4DAC56LPEN
492 VSF_HW_EN_DAC34 = VSF_HW_CLKRST_REGION(0x6D, 18, 1),// M4DAC34EN
493 VSF_HW_EN_DAC34LP = VSF_HW_CLKRST_REGION(0x6D, 16, 1),// M4DAC34LPEN
494 VSF_HW_EN_ETH1TX = VSF_HW_CLKRST_REGION(0x6D, 10, 1),// M4ETH1TXEN
495 VSF_HW_EN_ETH1TXLP = VSF_HW_CLKRST_REGION(0x6D, 8, 1),// M4ETH1TXLPEN
496 VSF_HW_EN_ETH1RX = VSF_HW_CLKRST_REGION(0x6D, 6, 1),// M4ETH1RXEN
497 VSF_HW_EN_ETH1RXLP = VSF_HW_CLKRST_REGION(0x6D, 4, 1),// M4ETH1RXULPEN
498 VSF_HW_EN_ETH1MAC = VSF_HW_CLKRST_REGION(0x6D, 2, 1),// M4ETH1MACEN
499 VSF_HW_EN_ETH1MACLP = VSF_HW_CLKRST_REGION(0x6D, 0, 1),// M4ETH1MACLPEN
500#elif defined(CORE_CM7)
501 VSF_HW_EN_DAC56 = VSF_HW_CLKRST_REGION(0x6D, 23, 1),// M7DAC56EN
502 VSF_HW_EN_DAC56LP = VSF_HW_CLKRST_REGION(0x6D, 21, 1),// M7DAC56LPEN
503 VSF_HW_EN_DAC34 = VSF_HW_CLKRST_REGION(0x6D, 19, 1),// M7DAC34EN
504 VSF_HW_EN_DAC34LP = VSF_HW_CLKRST_REGION(0x6D, 17, 1),// M7DAC34LPEN
505 VSF_HW_EN_ETH1TX = VSF_HW_CLKRST_REGION(0x6D, 11, 1),// M7ETH1TXEN
506 VSF_HW_EN_ETH1TXLP = VSF_HW_CLKRST_REGION(0x6D, 9, 1),// M7ETH1TXLPEN
507 VSF_HW_EN_ETH1RX = VSF_HW_CLKRST_REGION(0x6D, 7, 1),// M7ETH1RXEN
508 VSF_HW_EN_ETH1RXLP = VSF_HW_CLKRST_REGION(0x6D, 5, 1),// M7ETH1RXULPEN
509 VSF_HW_EN_ETH1MAC = VSF_HW_CLKRST_REGION(0x6D, 3, 1),// M7ETH1MACEN
510 VSF_HW_EN_ETH1MACLP = VSF_HW_CLKRST_REGION(0x6D, 1, 1),// M7ETH1MACLPEN
511#endif
512
513 // AHB5
514 // RCC.AHB5EN1
515#if defined(CORE_CM4)
516 VSF_HW_EN_GPIO0 = VSF_HW_CLKRST_REGION(0x39, 30, 1),// M4GPIOAEN
517 VSF_HW_EN_GPIO0LP = VSF_HW_CLKRST_REGION(0x39, 28, 1),// M4GPIOALPEN
518 VSF_HW_EN_GPIO1 = VSF_HW_CLKRST_REGION(0x39, 26, 1),// M4GPIOBEN
519 VSF_HW_EN_GPIO1LP = VSF_HW_CLKRST_REGION(0x39, 24, 1),// M4GPIOBLPEN
520 VSF_HW_EN_GPIO2 = VSF_HW_CLKRST_REGION(0x39, 22, 1),// M4GPIOCEN
521 VSF_HW_EN_GPIO2LP = VSF_HW_CLKRST_REGION(0x39, 20, 1),// M4GPIOCLPEN
522 VSF_HW_EN_GPIO3 = VSF_HW_CLKRST_REGION(0x39, 18, 1),// M4GPIODEN
523 VSF_HW_EN_GPIO3LP = VSF_HW_CLKRST_REGION(0x39, 16, 1),// M4GPIODLPEN
524 VSF_HW_EN_GPIO4 = VSF_HW_CLKRST_REGION(0x39, 14, 1),// M4GPIOEEN
525 VSF_HW_EN_GPIO4LP = VSF_HW_CLKRST_REGION(0x39, 12, 1),// M4GPIOELPEN
526 VSF_HW_EN_GPIO5 = VSF_HW_CLKRST_REGION(0x39, 10, 1),// M4GPIOFEN
527 VSF_HW_EN_GPIO5LP = VSF_HW_CLKRST_REGION(0x39, 8, 1),// M4GPIOFLPEN
528 VSF_HW_EN_GPIO6 = VSF_HW_CLKRST_REGION(0x39, 6, 1),// M4GPIOGEN
529 VSF_HW_EN_GPIO6LP = VSF_HW_CLKRST_REGION(0x39, 4, 1),// M4GPIOGLPEN
530 VSF_HW_EN_GPIO7 = VSF_HW_CLKRST_REGION(0x39, 2, 1),// M4GPIOHEN
531 VSF_HW_EN_GPIO7LP = VSF_HW_CLKRST_REGION(0x39, 0, 1),// M4GPIOHLPEN
532#elif defined(CORE_CM7)
533 VSF_HW_EN_GPIO0 = VSF_HW_CLKRST_REGION(0x39, 31, 1),// M7GPIOAEN
534 VSF_HW_EN_GPIO0LP = VSF_HW_CLKRST_REGION(0x39, 29, 1),// M7GPIOALPEN
535 VSF_HW_EN_GPIO1 = VSF_HW_CLKRST_REGION(0x39, 27, 1),// M7GPIOBEN
536 VSF_HW_EN_GPIO1LP = VSF_HW_CLKRST_REGION(0x39, 25, 1),// M7GPIOBLPEN
537 VSF_HW_EN_GPIO2 = VSF_HW_CLKRST_REGION(0x39, 23, 1),// M7GPIOCEN
538 VSF_HW_EN_GPIO2LP = VSF_HW_CLKRST_REGION(0x39, 21, 1),// M7GPIOCLPEN
539 VSF_HW_EN_GPIO3 = VSF_HW_CLKRST_REGION(0x39, 19, 1),// M7GPIODEN
540 VSF_HW_EN_GPIO3LP = VSF_HW_CLKRST_REGION(0x39, 17, 1),// M7GPIODLPEN
541 VSF_HW_EN_GPIO4 = VSF_HW_CLKRST_REGION(0x39, 15, 1),// M7GPIOEEN
542 VSF_HW_EN_GPIO4LP = VSF_HW_CLKRST_REGION(0x39, 13, 1),// M7GPIOELPEN
543 VSF_HW_EN_GPIO5 = VSF_HW_CLKRST_REGION(0x39, 11, 1),// M7GPIOFEN
544 VSF_HW_EN_GPIO5LP = VSF_HW_CLKRST_REGION(0x39, 9, 1),// M7GPIOFLPEN
545 VSF_HW_EN_GPIO6 = VSF_HW_CLKRST_REGION(0x39, 7, 1),// M7GPIOGEN
546 VSF_HW_EN_GPIO6LP = VSF_HW_CLKRST_REGION(0x39, 5, 1),// M7GPIOGLPEN
547 VSF_HW_EN_GPIO7 = VSF_HW_CLKRST_REGION(0x39, 3, 1),// M7GPIOHEN
548 VSF_HW_EN_GPIO7LP = VSF_HW_CLKRST_REGION(0x39, 1, 1),// M7GPIOHLPEN
549#endif
550 // RCC.AHB5EN2
551#if defined(CORE_CM4)
552 VSF_HW_EN_GPIO8 = VSF_HW_CLKRST_REGION(0x3A, 30, 1),// M4GPIOIEN
553 VSF_HW_EN_GPIO8LP = VSF_HW_CLKRST_REGION(0x3A, 28, 1),// M4GPIOILPEN
554 VSF_HW_EN_GPIO9 = VSF_HW_CLKRST_REGION(0x3A, 26, 1),// M4GPIOJEN
555 VSF_HW_EN_GPIO9LP = VSF_HW_CLKRST_REGION(0x3A, 24, 1),// M4GPIOJLPEN
556 VSF_HW_EN_GPIO10 = VSF_HW_CLKRST_REGION(0x3A, 22, 1),// M4GPIOKEN
557 VSF_HW_EN_GPIO10LP = VSF_HW_CLKRST_REGION(0x3A, 20, 1),// M4GPIOKLPEN
558 VSF_HW_EN_ECCM3 = VSF_HW_CLKRST_REGION(0x3A, 18, 1),// M4ECCM3EN
559 VSF_HW_EN_ECCM3LP = VSF_HW_CLKRST_REGION(0x3A, 16, 1),// M4ECCM3LPEN
560
561 VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0x3A, 10, 1),// M4CRCEN
562 VSF_HW_EN_CRCLP = VSF_HW_CLKRST_REGION(0x3A, 8, 1),// M4CRCLPEN
563 VSF_HW_EN_SEMA4 = VSF_HW_CLKRST_REGION(0x3A, 6, 1),// M4SEMA4EN
564 VSF_HW_EN_SEMA4LP = VSF_HW_CLKRST_REGION(0x3A, 4, 1),// M4SEMA4LPEN
565 VSF_HW_EN_AFIO = VSF_HW_CLKRST_REGION(0x3A, 2, 1),// M4AFIOEN
566 VSF_HW_EN_AFIOLP = VSF_HW_CLKRST_REGION(0x3A, 0, 1),// M4AFIOLPEN
567#elif defined(CORE_CM7)
568 VSF_HW_EN_GPIO8 = VSF_HW_CLKRST_REGION(0x3A, 31, 1),// M7GPIOIEN
569 VSF_HW_EN_GPIO8LP = VSF_HW_CLKRST_REGION(0x3A, 29, 1),// M7GPIOILPEN
570 VSF_HW_EN_GPIO9 = VSF_HW_CLKRST_REGION(0x3A, 27, 1),// M7GPIOJEN
571 VSF_HW_EN_GPIO9LP = VSF_HW_CLKRST_REGION(0x3A, 25, 1),// M7GPIOJLPEN
572 VSF_HW_EN_GPIO10 = VSF_HW_CLKRST_REGION(0x3A, 23, 1),// M7GPIOKEN
573 VSF_HW_EN_GPIO10LP = VSF_HW_CLKRST_REGION(0x3A, 21, 1),// M7GPIOKLPEN
574 VSF_HW_EN_ECCM3 = VSF_HW_CLKRST_REGION(0x3A, 19, 1),// M7ECCM3EN
575 VSF_HW_EN_ECCM3LP = VSF_HW_CLKRST_REGION(0x3A, 17, 1),// M7ECCM3LPEN
576
577 VSF_HW_EN_PWR = VSF_HW_CLKRST_REGION(0x3A, 15, 1),// PWREN
578 VSF_HW_EN_PWRLP = VSF_HW_CLKRST_REGION(0x3A, 13, 1),// PWRLPEN
579
580 VSF_HW_EN_CRC = VSF_HW_CLKRST_REGION(0x3A, 11, 1),// M7CRCEN
581 VSF_HW_EN_CRCLP = VSF_HW_CLKRST_REGION(0x3A, 9, 1),// M7CRCLPEN
582 VSF_HW_EN_SEMA4 = VSF_HW_CLKRST_REGION(0x3A, 7, 1),// M7SEMA4EN
583 VSF_HW_EN_SEMA4LP = VSF_HW_CLKRST_REGION(0x3A, 5, 1),// M7SEMA4LPEN
584 VSF_HW_EN_AFIO = VSF_HW_CLKRST_REGION(0x3A, 3, 1),// M7AFIOEN
585 VSF_HW_EN_AFIOLP = VSF_HW_CLKRST_REGION(0x3A, 1, 1),// M7AFIOLPEN
586#endif
587
588 // AHB9
589 // RCC.AHB9EN1
590#if defined(CORE_CM4)
591 VSF_HW_EN_ESC = VSF_HW_CLKRST_REGION(0x70, 2, 1),// M4ESCEN
592 VSF_HW_EN_ESCLP = VSF_HW_CLKRST_REGION(0x70, 0, 1),// M4ESCLPEN
593#elif defined(CORE_CM7)
594 VSF_HW_EN_ESC = VSF_HW_CLKRST_REGION(0x70, 3, 1),// M7ESCEN
595 VSF_HW_EN_ESCLP = VSF_HW_CLKRST_REGION(0x70, 1, 1),// M7ESCLPEN
596#endif
597
598 // APB1
599 // RCC.APB1EN1
600#if defined(CORE_CM4)
601 VSF_HW_EN_BTIM1 = VSF_HW_CLKRST_REGION(0x20, 30, 1),// M4BTIM1EN
602 VSF_HW_EN_BTIM1LP = VSF_HW_CLKRST_REGION(0x20, 28, 1),// M4BTIM1LPEN
603 VSF_HW_EN_BTIM2 = VSF_HW_CLKRST_REGION(0x20, 26, 1),// M4BTIM2EN
604 VSF_HW_EN_BTIM2LP = VSF_HW_CLKRST_REGION(0x20, 24, 1),// M4BTIM2LPEN
605 VSF_HW_EN_BTIM3 = VSF_HW_CLKRST_REGION(0x20, 22, 1),// M4BTIM3EN
606 VSF_HW_EN_BTIM3LP = VSF_HW_CLKRST_REGION(0x20, 20, 1),// M4BTIM3LPEN
607 VSF_HW_EN_BTIM4 = VSF_HW_CLKRST_REGION(0x20, 18, 1),// M4BTIM4EN
608 VSF_HW_EN_BTIM4LP = VSF_HW_CLKRST_REGION(0x20, 16, 1),// M4BTIM4LPEN
609 VSF_HW_EN_GTIMB1 = VSF_HW_CLKRST_REGION(0x20, 14, 1),// M4GTIMB1EN
610 VSF_HW_EN_GTIMB1LP = VSF_HW_CLKRST_REGION(0x20, 12, 1),// M4GTIMB1LPEN
611 VSF_HW_EN_GTIMB2 = VSF_HW_CLKRST_REGION(0x20, 10, 1),// M4GTIMB2EN
612 VSF_HW_EN_GTIMB2LP = VSF_HW_CLKRST_REGION(0x20, 8, 1),// M4GTIMB2LPEN
613 VSF_HW_EN_GTIMB3 = VSF_HW_CLKRST_REGION(0x20, 6, 1),// M4GTIMB3EN
614 VSF_HW_EN_GTIMB3LP = VSF_HW_CLKRST_REGION(0x20, 4, 1),// M4GTIMB3LPEN
615 VSF_HW_EN_GTIMA4 = VSF_HW_CLKRST_REGION(0x20, 2, 1),// M4GTIMA4EN
616 VSF_HW_EN_GTIMA4LP = VSF_HW_CLKRST_REGION(0x20, 0, 1),// M4GTIMA4LPEN
617#elif defined(CORE_CM7)
618 VSF_HW_EN_BTIM1 = VSF_HW_CLKRST_REGION(0x20, 31, 1),// M7BTIM1EN
619 VSF_HW_EN_BTIM1LP = VSF_HW_CLKRST_REGION(0x20, 29, 1),// M7BTIM1LPEN
620 VSF_HW_EN_BTIM2 = VSF_HW_CLKRST_REGION(0x20, 27, 1),// M7BTIM2EN
621 VSF_HW_EN_BTIM2LP = VSF_HW_CLKRST_REGION(0x20, 25, 1),// M7BTIM2LPEN
622 VSF_HW_EN_BTIM3 = VSF_HW_CLKRST_REGION(0x20, 23, 1),// M7BTIM3EN
623 VSF_HW_EN_BTIM3LP = VSF_HW_CLKRST_REGION(0x20, 21, 1),// M7BTIM3LPEN
624 VSF_HW_EN_BTIM4 = VSF_HW_CLKRST_REGION(0x20, 19, 1),// M7BTIM4EN
625 VSF_HW_EN_BTIM4LP = VSF_HW_CLKRST_REGION(0x20, 17, 1),// M7BTIM4LPEN
626 VSF_HW_EN_GTIMB1 = VSF_HW_CLKRST_REGION(0x20, 15, 1),// M7GTIMB1EN
627 VSF_HW_EN_GTIMB1LP = VSF_HW_CLKRST_REGION(0x20, 13, 1),// M7GTIMB1LPEN
628 VSF_HW_EN_GTIMB2 = VSF_HW_CLKRST_REGION(0x20, 11, 1),// M7GTIMB2EN
629 VSF_HW_EN_GTIMB2LP = VSF_HW_CLKRST_REGION(0x20, 9, 1),// M7GTIMB2LPEN
630 VSF_HW_EN_GTIMB3 = VSF_HW_CLKRST_REGION(0x20, 7, 1),// M7GTIMB3EN
631 VSF_HW_EN_GTIMB3LP = VSF_HW_CLKRST_REGION(0x20, 5, 1),// M7GTIMB3LPEN
632 VSF_HW_EN_GTIMA4 = VSF_HW_CLKRST_REGION(0x20, 3, 1),// M7GTIMA4EN
633 VSF_HW_EN_GTIMA4LP = VSF_HW_CLKRST_REGION(0x20, 1, 1),// M7GTIMA4LPEN
634#endif
635 // RCC.APB1EN2
636#if defined(CORE_CM4)
637 VSF_HW_EN_GTIMA5 = VSF_HW_CLKRST_REGION(0x21, 30, 1),// M4GTIMA5EN
638 VSF_HW_EN_GTIMA5LP = VSF_HW_CLKRST_REGION(0x21, 28, 1),// M4GTIMA5LPEN
639 VSF_HW_EN_GTIMA6 = VSF_HW_CLKRST_REGION(0x21, 26, 1),// M4GTIMA6EN
640 VSF_HW_EN_GTIMA6LP = VSF_HW_CLKRST_REGION(0x21, 24, 1),// M4GTIMA6LPEN
641 VSF_HW_EN_GTIMA7 = VSF_HW_CLKRST_REGION(0x21, 22, 1),// M4GTIMA7EN
642 VSF_HW_EN_GTIMA7LP = VSF_HW_CLKRST_REGION(0x21, 20, 1),// M4GTIMA7LPEN
643 VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x21, 18, 1),// M4SPI3EN
644 VSF_HW_EN_SPI3LP = VSF_HW_CLKRST_REGION(0x21, 16, 1),// M4SPI3LPEN
645 VSF_HW_EN_DAC12 = VSF_HW_CLKRST_REGION(0x21, 14, 1),// M4DAC12EN
646 VSF_HW_EN_DAC12LP = VSF_HW_CLKRST_REGION(0x21, 12, 1),// M4DAC12LPEN
647 VSF_HW_EN_WWDG2 = VSF_HW_CLKRST_REGION(0x21, 6, 1),// M4WWDG2EN
648 VSF_HW_EN_WWDG2LP = VSF_HW_CLKRST_REGION(0x21, 4, 1),// M4WWDG2LPEN
649#elif defined(CORE_CM7)
650 VSF_HW_EN_GTIMA5 = VSF_HW_CLKRST_REGION(0x21, 31, 1),// M7GTIMA5EN
651 VSF_HW_EN_GTIMA5LP = VSF_HW_CLKRST_REGION(0x21, 29, 1),// M7GTIMA5LPEN
652 VSF_HW_EN_GTIMA6 = VSF_HW_CLKRST_REGION(0x21, 27, 1),// M7GTIMA6EN
653 VSF_HW_EN_GTIMA6LP = VSF_HW_CLKRST_REGION(0x21, 25, 1),// M7GTIMA6LPEN
654 VSF_HW_EN_GTIMA7 = VSF_HW_CLKRST_REGION(0x21, 23, 1),// M7GTIMA7EN
655 VSF_HW_EN_GTIMA7LP = VSF_HW_CLKRST_REGION(0x21, 21, 1),// M7GTIMA7LPEN
656 VSF_HW_EN_SPI3 = VSF_HW_CLKRST_REGION(0x21, 19, 1),// M7SPI3EN
657 VSF_HW_EN_SPI3LP = VSF_HW_CLKRST_REGION(0x21, 17, 1),// M7SPI3LPEN
658 VSF_HW_EN_DAC12 = VSF_HW_CLKRST_REGION(0x21, 15, 1),// M7DAC12EN
659 VSF_HW_EN_DAC12LP = VSF_HW_CLKRST_REGION(0x21, 13, 1),// M7DAC12LPEN
660 VSF_HW_EN_WWDG2 = VSF_HW_CLKRST_REGION(0x21, 7, 1),// M7WWDG2EN
661 VSF_HW_EN_WWDG2LP = VSF_HW_CLKRST_REGION(0x21, 5, 1),// M7WWDG2LPEN
662#endif
663 // RCC.APB1EN3
664#if defined(CORE_CM4)
665 VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x22, 30, 1),// M4USART1EN
666 VSF_HW_EN_USART1LP = VSF_HW_CLKRST_REGION(0x22, 28, 1),// M4USART1LPEN
667 VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x22, 26, 1),// M4USART2EN
668 VSF_HW_EN_USART2LP = VSF_HW_CLKRST_REGION(0x22, 24, 1),// M4USART2LPEN
669 VSF_HW_EN_USART3 = VSF_HW_CLKRST_REGION(0x22, 22, 1),// M4USART3EN
670 VSF_HW_EN_USART3LP = VSF_HW_CLKRST_REGION(0x22, 20, 1),// M4USART3LPEN
671 VSF_HW_EN_USART4 = VSF_HW_CLKRST_REGION(0x22, 18, 1),// M4USART4EN
672 VSF_HW_EN_USART4LP = VSF_HW_CLKRST_REGION(0x22, 16, 1),// M4USART4LPEN
673 VSF_HW_EN_UART9 = VSF_HW_CLKRST_REGION(0x22, 14, 1),// M4UART9EN
674 VSF_HW_EN_UART9LP = VSF_HW_CLKRST_REGION(0x22, 12, 1),// M4UART9LPEN
675 VSF_HW_EN_UART10 = VSF_HW_CLKRST_REGION(0x22, 10, 1),// M4UART10EN
676 VSF_HW_EN_UART10LP = VSF_HW_CLKRST_REGION(0x22, 8, 1),// M4UART10LPEN
677 VSF_HW_EN_UART11 = VSF_HW_CLKRST_REGION(0x22, 6, 1),// M4UART11EN
678 VSF_HW_EN_UART11LP = VSF_HW_CLKRST_REGION(0x22, 4, 1),// M4UART11LPEN
679 VSF_HW_EN_UART12 = VSF_HW_CLKRST_REGION(0x22, 2, 1),// M4UART12EN
680 VSF_HW_EN_UART12LP = VSF_HW_CLKRST_REGION(0x22, 0, 1),// M4UART12LPEN
681#elif defined(CORE_CM7)
682 VSF_HW_EN_USART1 = VSF_HW_CLKRST_REGION(0x22, 31, 1),// M7USART1EN
683 VSF_HW_EN_USART1LP = VSF_HW_CLKRST_REGION(0x22, 29, 1),// M7USART1LPEN
684 VSF_HW_EN_USART2 = VSF_HW_CLKRST_REGION(0x22, 27, 1),// M7USART2EN
685 VSF_HW_EN_USART2LP = VSF_HW_CLKRST_REGION(0x22, 25, 1),// M7USART2LPEN
686 VSF_HW_EN_USART3 = VSF_HW_CLKRST_REGION(0x22, 23, 1),// M7USART3EN
687 VSF_HW_EN_USART3LP = VSF_HW_CLKRST_REGION(0x22, 21, 1),// M7USART3LPEN
688 VSF_HW_EN_USART4 = VSF_HW_CLKRST_REGION(0x22, 19, 1),// M7USART4EN
689 VSF_HW_EN_USART4LP = VSF_HW_CLKRST_REGION(0x22, 17, 1),// M7USART4LPEN
690 VSF_HW_EN_UART9 = VSF_HW_CLKRST_REGION(0x22, 15, 1),// M7UART9EN
691 VSF_HW_EN_UART9LP = VSF_HW_CLKRST_REGION(0x22, 13, 1),// M7UART9LPEN
692 VSF_HW_EN_UART10 = VSF_HW_CLKRST_REGION(0x22, 11, 1),// M7UART10EN
693 VSF_HW_EN_UART10LP = VSF_HW_CLKRST_REGION(0x22, 9, 1),// M7UART10LPEN
694 VSF_HW_EN_UART11 = VSF_HW_CLKRST_REGION(0x22, 7, 1),// M7UART11EN
695 VSF_HW_EN_UART11LP = VSF_HW_CLKRST_REGION(0x22, 5, 1),// M7UART11LPEN
696 VSF_HW_EN_UART12 = VSF_HW_CLKRST_REGION(0x22, 3, 1),// M7UART12EN
697 VSF_HW_EN_UART12LP = VSF_HW_CLKRST_REGION(0x22, 1, 1),// M7UART12LPEN
698#endif
699 // RCC.APB1EN4
700#if defined(CORE_CM4)
701 VSF_HW_EN_I2S3 = VSF_HW_CLKRST_REGION(0x23, 30, 1),// M4I2S3EN
702 VSF_HW_EN_I2S3LP = VSF_HW_CLKRST_REGION(0x23, 28, 1),// M4I2S3LPEN
703 VSF_HW_EN_I2S4 = VSF_HW_CLKRST_REGION(0x23, 26, 1),// M4I2S4EN
704 VSF_HW_EN_I2S4LP = VSF_HW_CLKRST_REGION(0x23, 24, 1),// M4I2S4LPEN
705 VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x23, 22, 1),// M4I2C1EN
706 VSF_HW_EN_I2C1LP = VSF_HW_CLKRST_REGION(0x23, 20, 1),// M4I2C1LPEN
707 VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x23, 18, 1),// M4I2C2EN
708 VSF_HW_EN_I2C2LP = VSF_HW_CLKRST_REGION(0x23, 16, 1),// M4I2C2LPEN
709 VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x23, 14, 1),// M4I2C3EN
710 VSF_HW_EN_I2C3LP = VSF_HW_CLKRST_REGION(0x23, 12, 1),// M4I2C3LPEN
711#elif defined(CORE_CM7)
712 VSF_HW_EN_I2S3 = VSF_HW_CLKRST_REGION(0x23, 31, 1),// M7I2S3EN
713 VSF_HW_EN_I2S3LP = VSF_HW_CLKRST_REGION(0x23, 29, 1),// M7I2S3LPEN
714 VSF_HW_EN_I2S4 = VSF_HW_CLKRST_REGION(0x23, 27, 1),// M7I2S4EN
715 VSF_HW_EN_I2S4LP = VSF_HW_CLKRST_REGION(0x23, 25, 1),// M7I2S4LPEN
716 VSF_HW_EN_I2C1 = VSF_HW_CLKRST_REGION(0x23, 23, 1),// M7I2C1EN
717 VSF_HW_EN_I2C1LP = VSF_HW_CLKRST_REGION(0x23, 21, 1),// M7I2C1LPEN
718 VSF_HW_EN_I2C2 = VSF_HW_CLKRST_REGION(0x23, 19, 1),// M7I2C2EN
719 VSF_HW_EN_I2C2LP = VSF_HW_CLKRST_REGION(0x23, 17, 1),// M7I2C2LPEN
720 VSF_HW_EN_I2C3 = VSF_HW_CLKRST_REGION(0x23, 15, 1),// M7I2C3EN
721 VSF_HW_EN_I2C3LP = VSF_HW_CLKRST_REGION(0x23, 13, 1),// M7I2C3LPEN
722#endif
723 // RCC.APB1EN5
724#if defined(CORE_CM4)
725 VSF_HW_EN_FDCAN1 = VSF_HW_CLKRST_REGION(0x24, 30, 1),// M4FDCAN1EN
726 VSF_HW_EN_FDCAN1LP = VSF_HW_CLKRST_REGION(0x24, 28, 1),// M4FDCAN1LPEN
727 VSF_HW_EN_FDCAN2 = VSF_HW_CLKRST_REGION(0x24, 26, 1),// M4FDCAN2EN
728 VSF_HW_EN_FDCAN2LP = VSF_HW_CLKRST_REGION(0x24, 24, 1),// M4FDCAN2LPEN
729 VSF_HW_EN_FDCAN5 = VSF_HW_CLKRST_REGION(0x24, 22, 1),// M4FDCAN5EN
730 VSF_HW_EN_FDCAN5LP = VSF_HW_CLKRST_REGION(0x24, 20, 1),// M4FDCAN5LPEN
731 VSF_HW_EN_FDCAN6 = VSF_HW_CLKRST_REGION(0x24, 18, 1),// M4FDCAN6EN
732 VSF_HW_EN_FDCAN6LP = VSF_HW_CLKRST_REGION(0x24, 16, 1),// M4FDCAN6LPEN
733#elif defined(CORE_CM7)
734 VSF_HW_EN_FDCAN1 = VSF_HW_CLKRST_REGION(0x24, 31, 1),// M7FDCAN1EN
735 VSF_HW_EN_FDCAN1LP = VSF_HW_CLKRST_REGION(0x24, 29, 1),// M7FDCAN1LPEN
736 VSF_HW_EN_FDCAN2 = VSF_HW_CLKRST_REGION(0x24, 27, 1),// M7FDCAN2EN
737 VSF_HW_EN_FDCAN2LP = VSF_HW_CLKRST_REGION(0x24, 25, 1),// M7FDCAN2LPEN
738 VSF_HW_EN_FDCAN5 = VSF_HW_CLKRST_REGION(0x24, 23, 1),// M7FDCAN5EN
739 VSF_HW_EN_FDCAN5LP = VSF_HW_CLKRST_REGION(0x24, 21, 1),// M7FDCAN5LPEN
740 VSF_HW_EN_FDCAN6 = VSF_HW_CLKRST_REGION(0x24, 19, 1),// M7FDCAN6EN
741 VSF_HW_EN_FDCAN6LP = VSF_HW_CLKRST_REGION(0x24, 17, 1),// M7FDCAN6LPEN
742#endif
743
744 // APB2
745 // RCC.APB2EN1
746#if defined(CORE_CM4)
747 VSF_HW_EN_ATIM1 = VSF_HW_CLKRST_REGION(0x31, 30, 1),// M4ATIM1EN
748 VSF_HW_EN_ATIM1LP = VSF_HW_CLKRST_REGION(0x31, 28, 1),// M4ATIM1LPEN
749 VSF_HW_EN_ATIM2 = VSF_HW_CLKRST_REGION(0x31, 26, 1),// M4ATIM2EN
750 VSF_HW_EN_ATIM2LP = VSF_HW_CLKRST_REGION(0x31, 24, 1),// M4ATIM2LPEN
751 VSF_HW_EN_GTIMA1 = VSF_HW_CLKRST_REGION(0x31, 22, 1),// M4GTIMA1EN
752 VSF_HW_EN_GTIMA1LP = VSF_HW_CLKRST_REGION(0x31, 20, 1),// M4GTIMA1LPEN
753 VSF_HW_EN_GTIMA2 = VSF_HW_CLKRST_REGION(0x31, 18, 1),// M4GTIMA2EN
754 VSF_HW_EN_GTIMA2LP = VSF_HW_CLKRST_REGION(0x31, 16, 1),// M4GTIMA2LPEN
755 VSF_HW_EN_GTIMA3 = VSF_HW_CLKRST_REGION(0x31, 14, 1),// M4GTIMA3EN
756 VSF_HW_EN_GTIMA3LP = VSF_HW_CLKRST_REGION(0x31, 12, 1),// M4GTIMA3LPEN
757 VSF_HW_EN_SHRTIM1 = VSF_HW_CLKRST_REGION(0x31, 10, 1),// M4SHRTIM1EN
758 VSF_HW_EN_SHRTIM1LP = VSF_HW_CLKRST_REGION(0x31, 8, 1),// M4SHRTIM1LPEN
759 VSF_HW_EN_SHRTIM2 = VSF_HW_CLKRST_REGION(0x31, 6, 1),// M4SHRTIM2EN
760 VSF_HW_EN_SHRTIM2LP = VSF_HW_CLKRST_REGION(0x31, 4, 1),// M4SHRTIM2LPEN
761#elif defined(CORE_CM7)
762 VSF_HW_EN_ATIM1 = VSF_HW_CLKRST_REGION(0x31, 31, 1),// M7ATIM1EN
763 VSF_HW_EN_ATIM1LP = VSF_HW_CLKRST_REGION(0x31, 29, 1),// M7ATIM1LPEN
764 VSF_HW_EN_ATIM2 = VSF_HW_CLKRST_REGION(0x31, 27, 1),// M7ATIM2EN
765 VSF_HW_EN_ATIM2LP = VSF_HW_CLKRST_REGION(0x31, 25, 1),// M7ATIM2LPEN
766 VSF_HW_EN_GTIMA1 = VSF_HW_CLKRST_REGION(0x31, 23, 1),// M7GTIMA1EN
767 VSF_HW_EN_GTIMA1LP = VSF_HW_CLKRST_REGION(0x31, 21, 1),// M7GTIMA1LPEN
768 VSF_HW_EN_GTIMA2 = VSF_HW_CLKRST_REGION(0x31, 19, 1),// M7GTIMA2EN
769 VSF_HW_EN_GTIMA2LP = VSF_HW_CLKRST_REGION(0x31, 17, 1),// M7GTIMA2LPEN
770 VSF_HW_EN_GTIMA3 = VSF_HW_CLKRST_REGION(0x31, 15, 1),// M7GTIMA3EN
771 VSF_HW_EN_GTIMA3LP = VSF_HW_CLKRST_REGION(0x31, 13, 1),// M7GTIMA3LPEN
772 VSF_HW_EN_SHRTIM1 = VSF_HW_CLKRST_REGION(0x31, 11, 1),// M7SHRTIM1EN
773 VSF_HW_EN_SHRTIM1LP = VSF_HW_CLKRST_REGION(0x31, 9, 1),// M7SHRTIM1LPEN
774 VSF_HW_EN_SHRTIM2 = VSF_HW_CLKRST_REGION(0x31, 7, 1),// M7SHRTIM2EN
775 VSF_HW_EN_SHRTIM2LP = VSF_HW_CLKRST_REGION(0x31, 5, 1),// M7SHRTIM2LPEN
776#endif
777 // RCC.APB2EN2
778#if defined(CORE_CM4)
779 VSF_HW_EN_I2S1 = VSF_HW_CLKRST_REGION(0x32, 30, 1),// M4I2S1EN
780 VSF_HW_EN_I2S1LP = VSF_HW_CLKRST_REGION(0x32, 28, 1),// M4I2S1LPEN
781 VSF_HW_EN_I2S2 = VSF_HW_CLKRST_REGION(0x32, 26, 1),// M4I2S2EN
782 VSF_HW_EN_I2S2LP = VSF_HW_CLKRST_REGION(0x32, 24, 1),// M4I2S2LPEN
783 VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x32, 22, 1),// M4SPI1EN
784 VSF_HW_EN_SPI1LP = VSF_HW_CLKRST_REGION(0x32, 20, 1),// M4SPI1LPEN
785 VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x32, 18, 1),// M4SPI2EN
786 VSF_HW_EN_SPI2LP = VSF_HW_CLKRST_REGION(0x32, 16, 1),// M4SPI2LPEN
787 VSF_HW_EN_DSMU = VSF_HW_CLKRST_REGION(0x32, 14, 1),// M4DSMUEN
788 VSF_HW_EN_DSMULP = VSF_HW_CLKRST_REGION(0x32, 12, 1),// M4DSMULPEN
789 VSF_HW_EN_I2C4 = VSF_HW_CLKRST_REGION(0x32, 10, 1),// M4I2C4EN
790 VSF_HW_EN_I2C4LP = VSF_HW_CLKRST_REGION(0x32, 8, 1),// M4I2C4LPEN
791 VSF_HW_EN_I2C5 = VSF_HW_CLKRST_REGION(0x32, 6, 1),// M4I2C5EN
792 VSF_HW_EN_I2C5LP = VSF_HW_CLKRST_REGION(0x32, 4, 1),// M4I2C5LPEN
793 VSF_HW_EN_I2C6 = VSF_HW_CLKRST_REGION(0x32, 2, 1),// M4I2C6EN
794 VSF_HW_EN_I2C6LP = VSF_HW_CLKRST_REGION(0x32, 0, 1),// M4I2C6LPEN
795#elif defined(CORE_CM7)
796 VSF_HW_EN_I2S1 = VSF_HW_CLKRST_REGION(0x32, 31, 1),// M7I2S1EN
797 VSF_HW_EN_I2S1LP = VSF_HW_CLKRST_REGION(0x32, 29, 1),// M7I2S1LPEN
798 VSF_HW_EN_I2S2 = VSF_HW_CLKRST_REGION(0x32, 27, 1),// M7I2S2EN
799 VSF_HW_EN_I2S2LP = VSF_HW_CLKRST_REGION(0x32, 25, 1),// M7I2S2LPEN
800 VSF_HW_EN_SPI1 = VSF_HW_CLKRST_REGION(0x32, 23, 1),// M7SPI1EN
801 VSF_HW_EN_SPI1LP = VSF_HW_CLKRST_REGION(0x32, 21, 1),// M7SPI1LPEN
802 VSF_HW_EN_SPI2 = VSF_HW_CLKRST_REGION(0x32, 19, 1),// M7SPI2EN
803 VSF_HW_EN_SPI2LP = VSF_HW_CLKRST_REGION(0x32, 17, 1),// M7SPI2LPEN
804 VSF_HW_EN_DSMU = VSF_HW_CLKRST_REGION(0x32, 15, 1),// M7DSMUEN
805 VSF_HW_EN_DSMULP = VSF_HW_CLKRST_REGION(0x32, 13, 1),// M7DSMULPEN
806 VSF_HW_EN_I2C4 = VSF_HW_CLKRST_REGION(0x32, 11, 1),// M7I2C4EN
807 VSF_HW_EN_I2C4LP = VSF_HW_CLKRST_REGION(0x32, 9, 1),// M7I2C4LPEN
808 VSF_HW_EN_I2C5 = VSF_HW_CLKRST_REGION(0x32, 7, 1),// M7I2C5EN
809 VSF_HW_EN_I2C5LP = VSF_HW_CLKRST_REGION(0x32, 5, 1),// M7I2C5LPEN
810 VSF_HW_EN_I2C6 = VSF_HW_CLKRST_REGION(0x32, 3, 1),// M7I2C6EN
811 VSF_HW_EN_I2C6LP = VSF_HW_CLKRST_REGION(0x32, 1, 1),// M7I2C6LPEN
812#endif
813 // RCC.APB2EN3
814#if defined(CORE_CM4)
815 VSF_HW_EN_USART5 = VSF_HW_CLKRST_REGION(0x33, 30, 1),// M4USART5EN
816 VSF_HW_EN_USART5LP = VSF_HW_CLKRST_REGION(0x33, 28, 1),// M4USART5LPEN
817 VSF_HW_EN_USART6 = VSF_HW_CLKRST_REGION(0x33, 26, 1),// M4USART6EN
818 VSF_HW_EN_USART6LP = VSF_HW_CLKRST_REGION(0x33, 24, 1),// M4USART6LPEN
819 VSF_HW_EN_USART7 = VSF_HW_CLKRST_REGION(0x33, 22, 1),// M4USART7EN
820 VSF_HW_EN_USART7LP = VSF_HW_CLKRST_REGION(0x33, 20, 1),// M4USART7LPEN
821 VSF_HW_EN_USART8 = VSF_HW_CLKRST_REGION(0x33, 18, 1),// M4USART8EN
822 VSF_HW_EN_USART8LP = VSF_HW_CLKRST_REGION(0x33, 16, 1),// M4USART8LPEN
823 VSF_HW_EN_UART13 = VSF_HW_CLKRST_REGION(0x33, 14, 1),// M4UART13EN
824 VSF_HW_EN_UART13LP = VSF_HW_CLKRST_REGION(0x33, 12, 1),// M4UART13LPEN
825 VSF_HW_EN_UART14 = VSF_HW_CLKRST_REGION(0x33, 10, 1),// M4UART14EN
826 VSF_HW_EN_UART14LP = VSF_HW_CLKRST_REGION(0x33, 8, 1),// M4UART14LPEN
827 VSF_HW_EN_UART15 = VSF_HW_CLKRST_REGION(0x33, 6, 1),// M4UART15EN
828 VSF_HW_EN_UART15LP = VSF_HW_CLKRST_REGION(0x33, 4, 1),// M4UART15LPEN
829#elif defined(CORE_CM7)
830 VSF_HW_EN_USART5 = VSF_HW_CLKRST_REGION(0x33, 31, 1),// M7USART5EN
831 VSF_HW_EN_USART5LP = VSF_HW_CLKRST_REGION(0x33, 29, 1),// M7USART5LPEN
832 VSF_HW_EN_USART6 = VSF_HW_CLKRST_REGION(0x33, 27, 1),// M7USART6EN
833 VSF_HW_EN_USART6LP = VSF_HW_CLKRST_REGION(0x33, 25, 1),// M7USART6LPEN
834 VSF_HW_EN_USART7 = VSF_HW_CLKRST_REGION(0x33, 23, 1),// M7USART7EN
835 VSF_HW_EN_USART7LP = VSF_HW_CLKRST_REGION(0x33, 21, 1),// M7USART7LPEN
836 VSF_HW_EN_USART8 = VSF_HW_CLKRST_REGION(0x33, 19, 1),// M7USART8EN
837 VSF_HW_EN_USART8LP = VSF_HW_CLKRST_REGION(0x33, 17, 1),// M7USART8LPEN
838 VSF_HW_EN_UART13 = VSF_HW_CLKRST_REGION(0x33, 15, 1),// M7UART13EN
839 VSF_HW_EN_UART13LP = VSF_HW_CLKRST_REGION(0x33, 13, 1),// M7UART13LPEN
840 VSF_HW_EN_UART14 = VSF_HW_CLKRST_REGION(0x33, 11, 1),// M7UART14EN
841 VSF_HW_EN_UART14LP = VSF_HW_CLKRST_REGION(0x33, 9, 1),// M7UART14LPEN
842 VSF_HW_EN_UART15 = VSF_HW_CLKRST_REGION(0x33, 7, 1),// M7UART15EN
843 VSF_HW_EN_UART15LP = VSF_HW_CLKRST_REGION(0x33, 5, 1),// M7UART15LPEN
844#endif
845 // RCC.APB2EN4
846#if defined(CORE_CM4)
847 VSF_HW_EN_FDCAN3 = VSF_HW_CLKRST_REGION(0x34, 30, 1),// M4FDCAN3EN
848 VSF_HW_EN_FDCAN3LP = VSF_HW_CLKRST_REGION(0x34, 28, 1),// M4FDCAN3LPEN
849 VSF_HW_EN_FDCAN4 = VSF_HW_CLKRST_REGION(0x34, 26, 1),// M4FDCAN4EN
850 VSF_HW_EN_FDCAN4LP = VSF_HW_CLKRST_REGION(0x34, 24, 1),// M4FDCAN4LPEN
851 VSF_HW_EN_FDCAN7 = VSF_HW_CLKRST_REGION(0x34, 22, 1),// M4FDCAN7EN
852 VSF_HW_EN_FDCAN7LP = VSF_HW_CLKRST_REGION(0x34, 20, 1),// M4FDCAN7LPEN
853 VSF_HW_EN_FDCAN8 = VSF_HW_CLKRST_REGION(0x34, 18, 1),// M4FDCAN8EN
854 VSF_HW_EN_FDCAN8LP = VSF_HW_CLKRST_REGION(0x34, 16, 1),// M4FDCAN8LPEN
855#elif defined(CORE_CM7)
856 VSF_HW_EN_FDCAN3 = VSF_HW_CLKRST_REGION(0x34, 31, 1),// M7FDCAN3EN
857 VSF_HW_EN_FDCAN3LP = VSF_HW_CLKRST_REGION(0x34, 29, 1),// M7FDCAN3LPEN
858 VSF_HW_EN_FDCAN4 = VSF_HW_CLKRST_REGION(0x34, 27, 1),// M7FDCAN4EN
859 VSF_HW_EN_FDCAN4LP = VSF_HW_CLKRST_REGION(0x34, 25, 1),// M7FDCAN4LPEN
860 VSF_HW_EN_FDCAN7 = VSF_HW_CLKRST_REGION(0x34, 23, 1),// M7FDCAN7EN
861 VSF_HW_EN_FDCAN7LP = VSF_HW_CLKRST_REGION(0x34, 21, 1),// M7FDCAN7LPEN
862 VSF_HW_EN_FDCAN8 = VSF_HW_CLKRST_REGION(0x34, 19, 1),// M7FDCAN8EN
863 VSF_HW_EN_FDCAN8LP = VSF_HW_CLKRST_REGION(0x34, 17, 1),// M7FDCAN8LPEN
864#endif
865
866 // APB5
867 // RCC.APB5EN1
868#if defined(CORE_CM4)
869 VSF_HW_EN_ATIM3 = VSF_HW_CLKRST_REGION(0x3F, 30, 1),// M4ATIM3EN
870 VSF_HW_EN_ATIM3LP = VSF_HW_CLKRST_REGION(0x3F, 28, 1),// M4ATIM3LPEN
871 VSF_HW_EN_ATIM4 = VSF_HW_CLKRST_REGION(0x3F, 26, 1),// M4ATIM4EN
872 VSF_HW_EN_ATIM4LP = VSF_HW_CLKRST_REGION(0x3F, 24, 1),// M4ATIM4LPEN
873 VSF_HW_EN_AFEC = VSF_HW_CLKRST_REGION(0x3F, 22, 1),// M4AFECEN
874 VSF_HW_EN_AFECLP = VSF_HW_CLKRST_REGION(0x3F, 20, 1),// M4AFECLPEN
875 VSF_HW_EN_SPI4 = VSF_HW_CLKRST_REGION(0x3F, 14, 1),// M4SPI4EN
876 VSF_HW_EN_SPI4LP = VSF_HW_CLKRST_REGION(0x3F, 12, 1),// M4SPI4LPEN
877 VSF_HW_EN_SPI5 = VSF_HW_CLKRST_REGION(0x3F, 10, 1),// M4SPI5EN
878 VSF_HW_EN_SPI5LP = VSF_HW_CLKRST_REGION(0x3F, 8, 1),// M4SPI5LPEN
879 VSF_HW_EN_SPI6 = VSF_HW_CLKRST_REGION(0x3F, 6, 1),// M4SPI6EN
880 VSF_HW_EN_SPI6LP = VSF_HW_CLKRST_REGION(0x3F, 4, 1),// M4SPI6LPEN
881 VSF_HW_EN_SPI7 = VSF_HW_CLKRST_REGION(0x3F, 2, 1),// M4SPI7EN
882 VSF_HW_EN_SPI7LP = VSF_HW_CLKRST_REGION(0x3F, 0, 1),// M4SPI7LPEN
883#elif defined(CORE_CM7)
884 VSF_HW_EN_ATIM3 = VSF_HW_CLKRST_REGION(0x3F, 30, 1),// M7ATIM3EN
885 VSF_HW_EN_ATIM3LP = VSF_HW_CLKRST_REGION(0x3F, 28, 1),// M7ATIM3LPEN
886 VSF_HW_EN_ATIM4 = VSF_HW_CLKRST_REGION(0x3F, 26, 1),// M7ATIM4EN
887 VSF_HW_EN_ATIM4LP = VSF_HW_CLKRST_REGION(0x3F, 24, 1),// M7ATIM4LPEN
888 VSF_HW_EN_AFEC = VSF_HW_CLKRST_REGION(0x3F, 22, 1),// M7AFECEN
889 VSF_HW_EN_AFECLP = VSF_HW_CLKRST_REGION(0x3F, 20, 1),// M7AFECLPEN
890 VSF_HW_EN_SPI4 = VSF_HW_CLKRST_REGION(0x3F, 14, 1),// M7SPI4EN
891 VSF_HW_EN_SPI4LP = VSF_HW_CLKRST_REGION(0x3F, 12, 1),// M7SPI4LPEN
892 VSF_HW_EN_SPI5 = VSF_HW_CLKRST_REGION(0x3F, 10, 1),// M7SPI5EN
893 VSF_HW_EN_SPI5LP = VSF_HW_CLKRST_REGION(0x3F, 8, 1),// M7SPI5LPEN
894 VSF_HW_EN_SPI6 = VSF_HW_CLKRST_REGION(0x3F, 6, 1),// M7SPI6EN
895 VSF_HW_EN_SPI6LP = VSF_HW_CLKRST_REGION(0x3F, 4, 1),// M7SPI6LPEN
896 VSF_HW_EN_SPI7 = VSF_HW_CLKRST_REGION(0x3F, 2, 1),// M7SPI7EN
897 VSF_HW_EN_SPI7LP = VSF_HW_CLKRST_REGION(0x3F, 0, 1),// M7SPI7LPEN
898#endif
899 // RCC.APB5EN2
900#if defined(CORE_CM4)
901 VSF_HW_EN_I2C7 = VSF_HW_CLKRST_REGION(0x40, 30, 1),// M4I2C7EN
902 VSF_HW_EN_I2C7LP = VSF_HW_CLKRST_REGION(0x40, 28, 1),// M4I2C7LPEN
903 VSF_HW_EN_I2C8 = VSF_HW_CLKRST_REGION(0x40, 26, 1),// M4I2C8EN
904 VSF_HW_EN_I2C8LP = VSF_HW_CLKRST_REGION(0x40, 24, 1),// M4I2C8LPEN
905 VSF_HW_EN_I2C9 = VSF_HW_CLKRST_REGION(0x40, 22, 1),// M4I2C9EN
906 VSF_HW_EN_I2C9LP = VSF_HW_CLKRST_REGION(0x40, 20, 1),// M4I2C9LPEN
907 VSF_HW_EN_I2C10 = VSF_HW_CLKRST_REGION(0x40, 18, 1),// M4I2C10EN
908 VSF_HW_EN_I2C10LP = VSF_HW_CLKRST_REGION(0x40, 16, 1),// M4I2C10LPEN
909
910 VSF_HW_EN_RTCPCLK = VSF_HW_CLKRST_REGION(0x40, 10, 1),// M4RTCPCLKEN
911 VSF_HW_EN_RTCPCLKLP = VSF_HW_CLKRST_REGION(0x40, 8, 1),// M4RTCPCLKLPEN
912#elif defined(CORE_CM7)
913 VSF_HW_EN_I2C7 = VSF_HW_CLKRST_REGION(0x40, 31, 1),// M7I2C7EN
914 VSF_HW_EN_I2C7LP = VSF_HW_CLKRST_REGION(0x40, 29, 1),// M7I2C7LPEN
915 VSF_HW_EN_I2C8 = VSF_HW_CLKRST_REGION(0x40, 27, 1),// M7I2C8EN
916 VSF_HW_EN_I2C8LP = VSF_HW_CLKRST_REGION(0x40, 25, 1),// M7I2C8LPEN
917 VSF_HW_EN_I2C9 = VSF_HW_CLKRST_REGION(0x40, 23, 1),// M7I2C9EN
918 VSF_HW_EN_I2C9LP = VSF_HW_CLKRST_REGION(0x40, 21, 1),// M7I2C9LPEN
919 VSF_HW_EN_I2C10 = VSF_HW_CLKRST_REGION(0x40, 19, 1),// M7I2C10EN
920 VSF_HW_EN_I2C10LP = VSF_HW_CLKRST_REGION(0x40, 17, 1),// M7I2C10LPEN
921
922 VSF_HW_EN_EXTI = VSF_HW_CLKRST_REGION(0x40, 15, 1),// EXTIEN
923 VSF_HW_EN_EXTILP = VSF_HW_CLKRST_REGION(0x40, 13, 1),// EXTILPEN
924 VSF_HW_EN_IWDG1PCLK = VSF_HW_CLKRST_REGION(0x40, 7, 1),// IWDG1PCLKEN
925 VSF_HW_EN_IWDG1PCLKLP = VSF_HW_CLKRST_REGION(0x40, 5, 1),// IWDG1PCLKLPEN
926 VSF_HW_EN_IWDG2PCLK = VSF_HW_CLKRST_REGION(0x40, 3, 1),// IWDG2PCLKEN
927 VSF_HW_EN_IWDG2PCLKLP = VSF_HW_CLKRST_REGION(0x40, 1, 1),// IWDG2PCLKLPEN
928
929 VSF_HW_EN_RTCPCLK = VSF_HW_CLKRST_REGION(0x40, 11, 1),// M7RTCPCLKEN
930 VSF_HW_EN_RTCPCLKLP = VSF_HW_CLKRST_REGION(0x40, 9, 1),// M7RTCPCLKLPEN
931#endif
932
933 // Retention domain
934 // RCC.RDEN1
935#if defined(CORE_CM4)
936 VSF_HW_EN_LPTIM1 = VSF_HW_CLKRST_REGION(0x45, 30, 1),// M4LPTIM1EN
937 VSF_HW_EN_LPTIM1LP = VSF_HW_CLKRST_REGION(0x45, 28, 1),// M4LPTIM1LPEN
938 VSF_HW_EN_LPTIM2 = VSF_HW_CLKRST_REGION(0x45, 26, 1),// M4LPTIM2EN
939 VSF_HW_EN_LPTIM2LP = VSF_HW_CLKRST_REGION(0x45, 24, 1),// M4LPTIM2LPEN
940 VSF_HW_EN_LPTIM3 = VSF_HW_CLKRST_REGION(0x45, 22, 1),// M4LPTIM3EN
941 VSF_HW_EN_LPTIM3LP = VSF_HW_CLKRST_REGION(0x45, 20, 1),// M4LPTIM3LPEN
942 VSF_HW_EN_LPTIM4 = VSF_HW_CLKRST_REGION(0x45, 18, 1),// M4LPTIM4EN
943 VSF_HW_EN_LPTIM4LP = VSF_HW_CLKRST_REGION(0x45, 16, 1),// M4LPTIM4LPEN
944 VSF_HW_EN_LPTIM5 = VSF_HW_CLKRST_REGION(0x45, 14, 1),// M4LPTIM5EN
945 VSF_HW_EN_LPTIM5LP = VSF_HW_CLKRST_REGION(0x45, 12, 1),// M4LPTIM5LPEN
946 VSF_HW_EN_LPUART1 = VSF_HW_CLKRST_REGION(0x45, 10, 1),// M4LPUART1EN
947 VSF_HW_EN_LPUART1LP = VSF_HW_CLKRST_REGION(0x45, 8, 1),// M4LPUART1LPEN
948 VSF_HW_EN_LPUART2 = VSF_HW_CLKRST_REGION(0x45, 6, 1),// M4LPUART2EN
949 VSF_HW_EN_LPUART2LP = VSF_HW_CLKRST_REGION(0x45, 4, 1),// M4LPUART2LPEN
950#elif defined(CORE_CM7)
951 VSF_HW_EN_LPTIM1 = VSF_HW_CLKRST_REGION(0x45, 31, 1),// M7LPTIM1EN
952 VSF_HW_EN_LPTIM1LP = VSF_HW_CLKRST_REGION(0x45, 29, 1),// M7LPTIM1LPEN
953 VSF_HW_EN_LPTIM2 = VSF_HW_CLKRST_REGION(0x45, 27, 1),// M7LPTIM2EN
954 VSF_HW_EN_LPTIM2LP = VSF_HW_CLKRST_REGION(0x45, 25, 1),// M7LPTIM2LPEN
955 VSF_HW_EN_LPTIM3 = VSF_HW_CLKRST_REGION(0x45, 23, 1),// M7LPTIM3EN
956 VSF_HW_EN_LPTIM3LP = VSF_HW_CLKRST_REGION(0x45, 21, 1),// M7LPTIM3LPEN
957 VSF_HW_EN_LPTIM4 = VSF_HW_CLKRST_REGION(0x45, 19, 1),// M7LPTIM4EN
958 VSF_HW_EN_LPTIM4LP = VSF_HW_CLKRST_REGION(0x45, 17, 1),// M7LPTIM4LPEN
959 VSF_HW_EN_LPTIM5 = VSF_HW_CLKRST_REGION(0x45, 15, 1),// M7LPTIM5EN
960 VSF_HW_EN_LPTIM5LP = VSF_HW_CLKRST_REGION(0x45, 13, 1),// M7LPTIM5LPEN
961 VSF_HW_EN_LPUART1 = VSF_HW_CLKRST_REGION(0x45, 11, 1),// M7LPUART1EN
962 VSF_HW_EN_LPUART1LP = VSF_HW_CLKRST_REGION(0x45, 9, 1),// M7LPUART1LPEN
963 VSF_HW_EN_LPUART2 = VSF_HW_CLKRST_REGION(0x45, 7, 1),// M7LPUART2EN
964 VSF_HW_EN_LPUART2LP = VSF_HW_CLKRST_REGION(0x45, 5, 1),// M7LPUART2LPEN
965#endif
966 // RCC.RDEN1
967#if defined(CORE_CM4)
968 VSF_HW_EN_COMP = VSF_HW_CLKRST_REGION(0x46, 30, 1),// M4COMPEN
969 VSF_HW_EN_COMPLP = VSF_HW_CLKRST_REGION(0x46, 28, 1),// M4COMPLPEN
970#elif defined(CORE_CM7)
971 VSF_HW_EN_COMP = VSF_HW_CLKRST_REGION(0x46, 31, 1),// M7COMPEN
972 VSF_HW_EN_COMPLP = VSF_HW_CLKRST_REGION(0x46, 29, 1),// M7COMPLPEN
973#endif
974
975 // GPIO0 .. GPIO10 are VSF standard, GPIOA .. GPIOK are vendor standard
976 VSF_HW_EN_GPIOA = VSF_HW_EN_GPIO0,
977 VSF_HW_EN_GPIOALP = VSF_HW_EN_GPIO0LP,
978 VSF_HW_EN_GPIOB = VSF_HW_EN_GPIO1,
979 VSF_HW_EN_GPIOBLP = VSF_HW_EN_GPIO1LP,
980 VSF_HW_EN_GPIOC = VSF_HW_EN_GPIO2,
981 VSF_HW_EN_GPIOCLP = VSF_HW_EN_GPIO2LP,
982 VSF_HW_EN_GPIOD = VSF_HW_EN_GPIO3,
983 VSF_HW_EN_GPIODLP = VSF_HW_EN_GPIO3LP,
984 VSF_HW_EN_GPIOE = VSF_HW_EN_GPIO4,
985 VSF_HW_EN_GPIOELP = VSF_HW_EN_GPIO4LP,
986 VSF_HW_EN_GPIOF = VSF_HW_EN_GPIO5,
987 VSF_HW_EN_GPIOFLP = VSF_HW_EN_GPIO5LP,
988 VSF_HW_EN_GPIOG = VSF_HW_EN_GPIO6,
989 VSF_HW_EN_GPIOGLP = VSF_HW_EN_GPIO6LP,
990 VSF_HW_EN_GPIOH = VSF_HW_EN_GPIO7,
991 VSF_HW_EN_GPIOHLP = VSF_HW_EN_GPIO7LP,
992 VSF_HW_EN_GPIOI = VSF_HW_EN_GPIO8,
993 VSF_HW_EN_GPIOILP = VSF_HW_EN_GPIO8LP,
994 VSF_HW_EN_GPIOJ = VSF_HW_EN_GPIO9,
995 VSF_HW_EN_GPIOJLP = VSF_HW_EN_GPIO9LP,
996 VSF_HW_EN_GPIOK = VSF_HW_EN_GPIO10,
997 VSF_HW_EN_GPIOKLP = VSF_HW_EN_GPIO10LP,
998} vsf_hw_peripheral_en_t;
999
1000typedef struct vsf_hw_clk_t vsf_hw_clk_t;
1001typedef struct vsf_hw_pwr_domain_t vsf_hw_pwr_domain_t;
1002typedef struct vsf_hw_pwr_t vsf_hw_pwr_t;
1003
1004/*============================ GLOBAL VARIABLES ==============================*/
1005
1006extern const vsf_hw_clk_t VSF_HW_CLK_HSE;
1007 extern const vsf_hw_clk_t VSF_HW_CLK_HSE_CG;
1008 extern const vsf_hw_clk_t VSF_HW_CLK_HSE_KER_CG;
1009extern const vsf_hw_clk_t VSF_HW_CLK_LSE;
1010extern const vsf_hw_clk_t VSF_HW_CLK_HSI;
1011 extern const vsf_hw_clk_t VSF_HW_CLK_HSI_CG;
1012 extern const vsf_hw_clk_t VSF_HW_CLK_HSI_KER_CG;
1013extern const vsf_hw_clk_t VSF_HW_CLK_MSI;
1014 extern const vsf_hw_clk_t VSF_HW_CLK_MSI_CG;
1015 extern const vsf_hw_clk_t VSF_HW_CLK_MSI_KER_CG;
1016extern const vsf_hw_clk_t VSF_HW_CLK_LSI;
1017
1018extern const vsf_hw_clk_t VSF_HW_CLK_PLL1;
1019 extern const vsf_hw_clk_t VSF_HW_CLK_PLL1A;
1020 extern const vsf_hw_clk_t VSF_HW_CLK_PLL1B;
1021 extern const vsf_hw_clk_t VSF_HW_CLK_PLL1C;
1022extern const vsf_hw_clk_t VSF_HW_CLK_PLL2;
1023 extern const vsf_hw_clk_t VSF_HW_CLK_PLL2A;
1024 extern const vsf_hw_clk_t VSF_HW_CLK_PLL2B;
1025 extern const vsf_hw_clk_t VSF_HW_CLK_PLL2C;
1026extern const vsf_hw_clk_t VSF_HW_CLK_PLL3;
1027 extern const vsf_hw_clk_t VSF_HW_CLK_PLL3A;
1028 extern const vsf_hw_clk_t VSF_HW_CLK_PLL3B;
1029 extern const vsf_hw_clk_t VSF_HW_CLK_PLL3C;
1030extern const vsf_hw_clk_t VSF_HW_CLK_SHRPLL;
1031
1032extern const vsf_hw_clk_t VSF_HW_CLK_AXISYS;
1033extern const vsf_hw_clk_t VSF_HW_CLK_AXIHYP;
1034
1035extern const vsf_hw_clk_t VSF_HW_CLK_SYS;
1036extern const vsf_hw_clk_t VSF_HW_CLK_SYSBUS;
1037extern const vsf_hw_clk_t VSF_HW_CLK_CPU;
1038extern const vsf_hw_clk_t VSF_HW_CLK_SYSTICK;
1039extern const vsf_hw_clk_t VSF_HW_CLK_AXI;
1040#define VSF_HW_CLK_AHB1 VSF_HW_CLK_SYSBUS
1041#define VSF_HW_CLK_AHB2 VSF_HW_CLK_SYSBUS
1042#define VSF_HW_CLK_AHB5 VSF_HW_CLK_SYSBUS
1043#define VSF_HW_CLK_AHB6 VSF_HW_CLK_AXI
1044#define VSF_HW_CLK_AHB9 VSF_HW_CLK_SYSBUS
1045extern const vsf_hw_clk_t VSF_HW_CLK_APB1;
1046extern const vsf_hw_clk_t VSF_HW_CLK_APB2;
1047extern const vsf_hw_clk_t VSF_HW_CLK_APB5;
1048extern const vsf_hw_clk_t VSF_HW_CLK_APB6;
1049extern const vsf_hw_clk_t VSF_HW_CLK_PERI;
1050
1051extern const vsf_hw_clk_t VSF_HW_CLK_SDRAM;
1052
1053#if VSF_HAL_USE_SDIO == ENABLED
1054# define VSF_HW_CLK_SDMMC1_BUS VSF_HW_CLK_AHB6
1055extern const vsf_hw_clk_t VSF_HW_CLK_SDMMC1;
1056
1057# define VSF_HW_CLK_SDMMC2_BUS VSF_HW_CLK_AHB1
1058extern const vsf_hw_clk_t VSF_HW_CLK_SDMMC2;
1059#endif
1060
1061#if VSF_HAL_USE_USART == ENABLED
1062extern const vsf_hw_clk_t VSF_HW_CLK_USART1_2;
1063# define VSF_HW_CLK_USART3_4 VSF_HW_CLK_APB1
1064# define VSF_HW_CLK_USART5_6_7_8 VSF_HW_CLK_APB2
1065# define VSF_HW_CLK_UART9_10_11_12 VSF_HW_CLK_APB1
1066# define VSF_HW_CLK_UART13_14_15 VSF_HW_CLK_APB2
1067
1068# define VSF_HW_CLK_USART1 VSF_HW_CLK_USART1_2
1069# define VSF_HW_CLK_USART2 VSF_HW_CLK_USART1_2
1070# define VSF_HW_CLK_USART3 VSF_HW_CLK_USART3_4
1071# define VSF_HW_CLK_USART4 VSF_HW_CLK_USART3_4
1072# define VSF_HW_CLK_USART5 VSF_HW_CLK_USART5_6_7_8
1073# define VSF_HW_CLK_USART6 VSF_HW_CLK_USART5_6_7_8
1074# define VSF_HW_CLK_USART7 VSF_HW_CLK_USART5_6_7_8
1075# define VSF_HW_CLK_USART8 VSF_HW_CLK_USART5_6_7_8
1076# define VSF_HW_CLK_UART9 VSF_HW_CLK_UART9_10_11_12
1077# define VSF_HW_CLK_UART10 VSF_HW_CLK_UART9_10_11_12
1078# define VSF_HW_CLK_UART11 VSF_HW_CLK_UART9_10_11_12
1079# define VSF_HW_CLK_UART12 VSF_HW_CLK_UART9_10_11_12
1080# define VSF_HW_CLK_UART13 VSF_HW_CLK_UART13_14_15
1081# define VSF_HW_CLK_UART14 VSF_HW_CLK_UART13_14_15
1082# define VSF_HW_CLK_UART15 VSF_HW_CLK_UART13_14_15
1083#endif
1084
1085#if VSF_HAL_USE_SPI == ENABLED
1086# define VSF_HW_CLK_SPI1_2 VSF_HW_CLK_APB2
1087# define VSF_HW_CLK_SPI3 VSF_HW_CLK_APB1
1088# define VSF_HW_CLK_SPI4_5_6_7 VSF_HW_CLK_APB5
1089
1090# define VSF_HW_CLK_SPI1 VSF_HW_CLK_SPI1_2
1091# define VSF_HW_CLK_SPI2 VSF_HW_CLK_SPI1_2
1092# define VSF_HW_CLK_SPI4 VSF_HW_CLK_SPI4_5_6_7
1093# define VSF_HW_CLK_SPI5 VSF_HW_CLK_SPI4_5_6_7
1094# define VSF_HW_CLK_SPI6 VSF_HW_CLK_SPI4_5_6_7
1095# define VSF_HW_CLK_SPI7 VSF_HW_CLK_SPI4_5_6_7
1096#endif
1097
1098#if VSF_HAL_USE_USBD == ENABLED || VSF_HAL_USE_USBH == ENABLED
1099extern const vsf_hw_clk_t VSF_HW_CLK_USBREF;
1100#endif
1101
1102// power
1103
1104extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS1;
1105extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS2;
1106extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_GRC;
1107extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_ESC;
1108extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_MDMA;
1109extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHRA;
1110extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR2;
1111extern const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR1;
1112
1113extern const vsf_hw_pwr_t VSF_HW_PWR_GPU;
1114extern const vsf_hw_pwr_t VSF_HW_PWR_LCDC;
1115extern const vsf_hw_pwr_t VSF_HW_PWR_JPEG;
1116extern const vsf_hw_pwr_t VSF_HW_PWR_DSI;
1117extern const vsf_hw_pwr_t VSF_HW_PWR_DVP;
1118extern const vsf_hw_pwr_t VSF_HW_PWR_ETH2;
1119extern const vsf_hw_pwr_t VSF_HW_PWR_USB2;
1120extern const vsf_hw_pwr_t VSF_HW_PWR_SDMMC2;
1121extern const vsf_hw_pwr_t VSF_HW_PWR_ETH1;
1122extern const vsf_hw_pwr_t VSF_HW_PWR_USB1;
1123extern const vsf_hw_pwr_t VSF_HW_PWR_SDMMC1;
1124extern const vsf_hw_pwr_t VSF_HW_PWR_FMAC;
1125extern const vsf_hw_pwr_t VSF_HW_PWR_ESC;
1126
1127/*============================ LOCAL VARIABLES ===============================*/
1128/*============================ PROTOTYPES ====================================*/
1129
1130extern void vsf_hw_clkrst_region_set(uint32_t region, uint_fast8_t value);
1131extern uint_fast8_t vsf_hw_clkrst_region_get(uint32_t region);
1132
1133extern void vsf_hw_clkrst_region_set_bit(uint32_t region);
1134extern void vsf_hw_clkrst_region_clear_bit(uint32_t region);
1135extern uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region);
1136
1137extern const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk);
1138extern uint32_t vsf_hw_clk_get_freq_hz(const vsf_hw_clk_t *clk);
1139extern void vsf_hw_clk_enable(const vsf_hw_clk_t *clk);
1140extern void vsf_hw_clk_disable(const vsf_hw_clk_t *clk);
1141extern bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk);
1142extern bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk);
1143extern vsf_err_t vsf_hw_clk_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz);
1144
1162extern vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, uint32_t out_freq_hz);
1163
1164// power
1165
1166extern void vsf_hw_power_domain_enable(const vsf_hw_pwr_domain_t *domain);
1167extern void vsf_hw_power_domain_disable(const vsf_hw_pwr_domain_t *domain);
1168extern bool vsf_hw_power_domain_is_ready(const vsf_hw_pwr_domain_t *domain);
1169
1170extern void vsf_hw_power_enable(const vsf_hw_pwr_t *pwr);
1171extern void vsf_hw_power_disable(const vsf_hw_pwr_t *pwr);
1172
1173#endif
1174/* EOF */
vsf_err_t
vsf_err_t
Definition __type.h:42
vsf_hw_peripheral_rst_t
vsf_hw_peripheral_rst_t
Definition common.h:58
VSF_HW_RST_SPI5
@ VSF_HW_RST_SPI5
Definition common.h:144
VSF_HW_RST_DMA1
@ VSF_HW_RST_DMA1
Definition common.h:63
VSF_HW_RST_SPI4
@ VSF_HW_RST_SPI4
Definition common.h:145
VSF_HW_RST_SPI2
@ VSF_HW_RST_SPI2
Definition common.h:117
VSF_HW_RST_GPIOJ
@ VSF_HW_RST_GPIOJ
Definition common.h:92
VSF_HW_RST_GPIOA
@ VSF_HW_RST_GPIOA
Definition common.h:100
VSF_HW_RST_GPIOG
@ VSF_HW_RST_GPIOG
Definition common.h:94
VSF_HW_RST_USART2
@ VSF_HW_RST_USART2
Definition common.h:114
VSF_HW_RST_GPIOH
@ VSF_HW_RST_GPIOH
Definition common.h:93
VSF_HW_RST_I2C2
@ VSF_HW_RST_I2C2
Definition common.h:109
VSF_HW_RST_MDMA
@ VSF_HW_RST_MDMA
Definition common.h:83
VSF_HW_RST_GPIOE
@ VSF_HW_RST_GPIOE
Definition common.h:96
VSF_HW_RST_SPI1
@ VSF_HW_RST_SPI1
Definition common.h:118
VSF_HW_RST_GPIOK
@ VSF_HW_RST_GPIOK
Definition common.h:91
VSF_HW_RST_GPIOF
@ VSF_HW_RST_GPIOF
Definition common.h:95
VSF_HW_RST_GPIOC
@ VSF_HW_RST_GPIOC
Definition common.h:98
VSF_HW_RST_I2C1
@ VSF_HW_RST_I2C1
Definition common.h:110
VSF_HW_RST_GPIOB
@ VSF_HW_RST_GPIOB
Definition common.h:99
VSF_HW_RST_USART1
@ VSF_HW_RST_USART1
Definition common.h:115
VSF_HW_RST_CRC
@ VSF_HW_RST_CRC
Definition common.h:90
VSF_HW_RST_USART5
@ VSF_HW_RST_USART5
Definition common.h:155
VSF_HW_RST_GPIOD
@ VSF_HW_RST_GPIOD
Definition common.h:97
VSF_HW_RST_I2C3
@ VSF_HW_RST_I2C3
Definition common.h:108
VSF_HW_RST_SPI3
@ VSF_HW_RST_SPI3
Definition common.h:150
VSF_HW_CLKRST_REGION
#define VSF_HW_CLKRST_REGION(__WORD_OFFSET, __BIT_OFFSET, __BIT_LENGTH)
Definition common.h:32
vsf_hw_clk_is_ready
bool vsf_hw_clk_is_ready(const vsf_hw_clk_t *clk)
Definition driver.c:667
vsf_hw_clk_disable
void vsf_hw_clk_disable(const vsf_hw_clk_t *clk)
Definition driver.c:651
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:172
VSF_HW_EN_MDMA
@ VSF_HW_EN_MDMA
Definition common.h:208
VSF_HW_EN_SPI2
@ VSF_HW_EN_SPI2
Definition common.h:243
VSF_HW_EN_SPI1
@ VSF_HW_EN_SPI1
Definition common.h:244
VSF_HW_EN_USART2
@ VSF_HW_EN_USART2
Definition common.h:240
VSF_HW_EN_I2C1
@ VSF_HW_EN_I2C1
Definition common.h:236
VSF_HW_EN_CRC
@ VSF_HW_EN_CRC
Definition common.h:215
VSF_HW_EN_SPI3
@ VSF_HW_EN_SPI3
Definition common.h:276
VSF_HW_EN_DMA1
@ VSF_HW_EN_DMA1
Definition common.h:181
VSF_HW_EN_USART5
@ VSF_HW_EN_USART5
Definition common.h:281
VSF_HW_EN_USART1
@ VSF_HW_EN_USART1
Definition common.h:241
VSF_HW_EN_I2C2
@ VSF_HW_EN_I2C2
Definition common.h:235
VSF_HW_EN_GPIOJ
@ VSF_HW_EN_GPIOJ
Definition common.h:218
VSF_HW_EN_GPIOK
@ VSF_HW_EN_GPIOK
Definition common.h:217
VSF_HW_EN_I2C3
@ VSF_HW_EN_I2C3
Definition common.h:234
vsf_hw_clk_is_enabled
bool vsf_hw_clk_is_enabled(const vsf_hw_clk_t *clk)
Definition driver.c:659
vsf_hw_clk_enable
void vsf_hw_clk_enable(const vsf_hw_clk_t *clk)
Definition driver.c:640
VSF_HW_PWR_DOMAIN_SHR1
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR1
Definition driver.c:706
VSF_HW_CLK_APB6
const vsf_hw_clk_t VSF_HW_CLK_APB6
Definition driver.c:518
VSF_HW_RST_USB1
@ VSF_HW_RST_USB1
Definition common.h:105
VSF_HW_RST_USART3
@ VSF_HW_RST_USART3
Definition common.h:156
VSF_HW_RST_SDHOST2
@ VSF_HW_RST_SDHOST2
Definition common.h:82
VSF_HW_RST_SHRTIM1
@ VSF_HW_RST_SHRTIM1
Definition common.h:183
VSF_HW_RST_DSI
@ VSF_HW_RST_DSI
Definition common.h:65
VSF_HW_RST_SPI7
@ VSF_HW_RST_SPI7
Definition common.h:215
VSF_HW_RST_OTPC
@ VSF_HW_RST_OTPC
Definition common.h:62
VSF_HW_RST_FDCAN2
@ VSF_HW_RST_FDCAN2
Definition common.h:170
VSF_HW_RST_I2C8
@ VSF_HW_RST_I2C8
Definition common.h:218
VSF_HW_RST_GPU
@ VSF_HW_RST_GPU
Definition common.h:71
VSF_HW_RST_BTIM1
@ VSF_HW_RST_BTIM1
Definition common.h:138
VSF_HW_RST_GPIO9
@ VSF_HW_RST_GPIO9
Definition common.h:124
VSF_HW_RST_DVP2
@ VSF_HW_RST_DVP2
Definition common.h:68
VSF_HW_RST_SDHOST1
@ VSF_HW_RST_SDHOST1
Definition common.h:60
VSF_HW_RST_ETH2
@ VSF_HW_RST_ETH2
Definition common.h:89
VSF_HW_RST_ADC3
@ VSF_HW_RST_ADC3
Definition common.h:97
VSF_HW_RST_DAC34
@ VSF_HW_RST_DAC34
Definition common.h:102
VSF_HW_RST_GTIMA6
@ VSF_HW_RST_GTIMA6
Definition common.h:148
VSF_HW_RST_GPIO4
@ VSF_HW_RST_GPIO4
Definition common.h:118
VSF_HW_RST_FDCAN1
@ VSF_HW_RST_FDCAN1
Definition common.h:169
VSF_HW_RST_DVP1
@ VSF_HW_RST_DVP1
Definition common.h:67
VSF_HW_RST_SEMA4
@ VSF_HW_RST_SEMA4
Definition common.h:129
VSF_HW_RST_DMAMUX1
@ VSF_HW_RST_DMAMUX1
Definition common.h:86
VSF_HW_RST_UART11
@ VSF_HW_RST_UART11
Definition common.h:160
VSF_HW_RST_UART15
@ VSF_HW_RST_UART15
Definition common.h:201
VSF_HW_RST_ECCM1
@ VSF_HW_RST_ECCM1
Definition common.h:61
VSF_HW_RST_ECCM3
@ VSF_HW_RST_ECCM3
Definition common.h:126
VSF_HW_RST_I2C4
@ VSF_HW_RST_I2C4
Definition common.h:191
VSF_HW_RST_DMA2
@ VSF_HW_RST_DMA2
Definition common.h:93
VSF_HW_RST_COMP
@ VSF_HW_RST_COMP
Definition common.h:232
VSF_HW_RST_I2S3
@ VSF_HW_RST_I2S3
Definition common.h:163
VSF_HW_RST_USART7
@ VSF_HW_RST_USART7
Definition common.h:197
VSF_HW_RST_ATIM2
@ VSF_HW_RST_ATIM2
Definition common.h:179
VSF_HW_RST_GPIO6
@ VSF_HW_RST_GPIO6
Definition common.h:120
VSF_HW_RST_FDCAN3
@ VSF_HW_RST_FDCAN3
Definition common.h:203
VSF_HW_RST_GPIO3
@ VSF_HW_RST_GPIO3
Definition common.h:117
VSF_HW_RST_GTIMB1
@ VSF_HW_RST_GTIMB1
Definition common.h:142
VSF_HW_RST_SHRTIM2
@ VSF_HW_RST_SHRTIM2
Definition common.h:184
VSF_HW_RST_GTIMA2
@ VSF_HW_RST_GTIMA2
Definition common.h:181
VSF_HW_RST_USART4
@ VSF_HW_RST_USART4
Definition common.h:157
VSF_HW_RST_DMAMUX2
@ VSF_HW_RST_DMAMUX2
Definition common.h:57
VSF_HW_RST_GTIMA1
@ VSF_HW_RST_GTIMA1
Definition common.h:180
VSF_HW_RST_ATIM4
@ VSF_HW_RST_ATIM4
Definition common.h:211
VSF_HW_RST_I2C7
@ VSF_HW_RST_I2C7
Definition common.h:217
VSF_HW_RST_UART10
@ VSF_HW_RST_UART10
Definition common.h:159
VSF_HW_RST_FDCAN7
@ VSF_HW_RST_FDCAN7
Definition common.h:205
VSF_HW_RST_USB1WRAP
@ VSF_HW_RST_USB1WRAP
Definition common.h:103
VSF_HW_RST_FDCAN8
@ VSF_HW_RST_FDCAN8
Definition common.h:206
VSF_HW_RST_USB2
@ VSF_HW_RST_USB2
Definition common.h:85
VSF_HW_RST_GTIMB2
@ VSF_HW_RST_GTIMB2
Definition common.h:143
VSF_HW_RST_LCD
@ VSF_HW_RST_LCD
Definition common.h:66
VSF_HW_RST_GPIO8
@ VSF_HW_RST_GPIO8
Definition common.h:123
VSF_HW_RST_GPIOI
@ VSF_HW_RST_GPIOI
Definition common.h:243
VSF_HW_RST_GTIMB3
@ VSF_HW_RST_GTIMB3
Definition common.h:144
VSF_HW_RST_I2C9
@ VSF_HW_RST_I2C9
Definition common.h:219
VSF_HW_RST_DMA3
@ VSF_HW_RST_DMA3
Definition common.h:94
VSF_HW_RST_GPIO10
@ VSF_HW_RST_GPIO10
Definition common.h:125
VSF_HW_RST_USART6
@ VSF_HW_RST_USART6
Definition common.h:196
VSF_HW_RST_I2C10
@ VSF_HW_RST_I2C10
Definition common.h:220
VSF_HW_RST_GTIMA5
@ VSF_HW_RST_GTIMA5
Definition common.h:147
VSF_HW_RST_USART8
@ VSF_HW_RST_USART8
Definition common.h:198
VSF_HW_RST_PWR
@ VSF_HW_RST_PWR
Definition common.h:127
VSF_HW_RST_FEMCCFG
@ VSF_HW_RST_FEMCCFG
Definition common.h:75
VSF_HW_RST_GPIO5
@ VSF_HW_RST_GPIO5
Definition common.h:119
VSF_HW_RST_SDRAM
@ VSF_HW_RST_SDRAM
Definition common.h:77
VSF_HW_RST_FDCAN6
@ VSF_HW_RST_FDCAN6
Definition common.h:172
VSF_HW_RST_UART13
@ VSF_HW_RST_UART13
Definition common.h:199
VSF_HW_RST_CAHD
@ VSF_HW_RST_CAHD
Definition common.h:174
VSF_HW_RST_I2C5
@ VSF_HW_RST_I2C5
Definition common.h:192
VSF_HW_RST_XSPI2
@ VSF_HW_RST_XSPI2
Definition common.h:74
VSF_HW_RST_FEMC
@ VSF_HW_RST_FEMC
Definition common.h:76
VSF_HW_RST_DAC56
@ VSF_HW_RST_DAC56
Definition common.h:101
VSF_HW_RST_ECCM2
@ VSF_HW_RST_ECCM2
Definition common.h:107
VSF_HW_RST_SDPU
@ VSF_HW_RST_SDPU
Definition common.h:109
VSF_HW_RST_FDCAN5
@ VSF_HW_RST_FDCAN5
Definition common.h:171
VSF_HW_RST_DSMU
@ VSF_HW_RST_DSMU
Definition common.h:190
VSF_HW_RST_WWDG1
@ VSF_HW_RST_WWDG1
Definition common.h:69
VSF_HW_RST_USB1POR
@ VSF_HW_RST_USB1POR
Definition common.h:104
VSF_HW_RST_UART9
@ VSF_HW_RST_UART9
Definition common.h:158
VSF_HW_RST_I2S1
@ VSF_HW_RST_I2S1
Definition common.h:186
VSF_HW_RST_UART14
@ VSF_HW_RST_UART14
Definition common.h:200
VSF_HW_RST_GPIO7
@ VSF_HW_RST_GPIO7
Definition common.h:121
VSF_HW_RST_DSICFG
@ VSF_HW_RST_DSICFG
Definition common.h:64
VSF_HW_RST_JPEGD
@ VSF_HW_RST_JPEGD
Definition common.h:55
VSF_HW_RST_CAHI
@ VSF_HW_RST_CAHI
Definition common.h:173
VSF_HW_RST_GTIMA7
@ VSF_HW_RST_GTIMA7
Definition common.h:149
VSF_HW_RST_DAC12
@ VSF_HW_RST_DAC12
Definition common.h:151
VSF_HW_RST_AFIO
@ VSF_HW_RST_AFIO
Definition common.h:130
VSF_HW_RST_ESC
@ VSF_HW_RST_ESC
Definition common.h:134
VSF_HW_RST_GPIO1
@ VSF_HW_RST_GPIO1
Definition common.h:115
VSF_HW_RST_SDMMC1
@ VSF_HW_RST_SDMMC1
Definition common.h:59
VSF_HW_RST_I2S2
@ VSF_HW_RST_I2S2
Definition common.h:187
VSF_HW_RST_I2C6
@ VSF_HW_RST_I2C6
Definition common.h:193
VSF_HW_RST_GPIO2
@ VSF_HW_RST_GPIO2
Definition common.h:116
VSF_HW_RST_ATIM1
@ VSF_HW_RST_ATIM1
Definition common.h:178
VSF_HW_RST_GTIMA3
@ VSF_HW_RST_GTIMA3
Definition common.h:182
VSF_HW_RST_BTIM4
@ VSF_HW_RST_BTIM4
Definition common.h:141
VSF_HW_RST_I2S4
@ VSF_HW_RST_I2S4
Definition common.h:164
VSF_HW_RST_ADC2
@ VSF_HW_RST_ADC2
Definition common.h:96
VSF_HW_RST_FMAC
@ VSF_HW_RST_FMAC
Definition common.h:110
VSF_HW_RST_FDCAN4
@ VSF_HW_RST_FDCAN4
Definition common.h:204
VSF_HW_RST_WWDG2
@ VSF_HW_RST_WWDG2
Definition common.h:152
VSF_HW_RST_ATIM3
@ VSF_HW_RST_ATIM3
Definition common.h:210
VSF_HW_RST_XSPI1
@ VSF_HW_RST_XSPI1
Definition common.h:73
VSF_HW_RST_UART12
@ VSF_HW_RST_UART12
Definition common.h:161
VSF_HW_RST_BTIM3
@ VSF_HW_RST_BTIM3
Definition common.h:140
VSF_HW_RST_JPEGE
@ VSF_HW_RST_JPEGE
Definition common.h:56
VSF_HW_RST_USB2WRAP
@ VSF_HW_RST_USB2WRAP
Definition common.h:83
VSF_HW_RST_BTIM2
@ VSF_HW_RST_BTIM2
Definition common.h:139
VSF_HW_RST_GTIMA4
@ VSF_HW_RST_GTIMA4
Definition common.h:145
VSF_HW_RST_GPIO0
@ VSF_HW_RST_GPIO0
Definition common.h:114
VSF_HW_RST_USB2POR
@ VSF_HW_RST_USB2POR
Definition common.h:84
VSF_HW_RST_ADC1
@ VSF_HW_RST_ADC1
Definition common.h:87
VSF_HW_RST_ECCMAC
@ VSF_HW_RST_ECCMAC
Definition common.h:91
VSF_HW_RST_LPUART2
@ VSF_HW_RST_LPUART2
Definition common.h:230
VSF_HW_CLK_HSI_CG
const vsf_hw_clk_t VSF_HW_CLK_HSI_CG
Definition driver.c:164
VSF_HW_PWR_JPEG
const vsf_hw_pwr_t VSF_HW_PWR_JPEG
Definition driver.c:723
VSF_HW_CLK_CPU
const vsf_hw_clk_t VSF_HW_CLK_CPU
VSF_HW_CLK_PLL1
const vsf_hw_clk_t VSF_HW_CLK_PLL1
Definition driver.c:231
VSF_HW_PWR_ESC
const vsf_hw_pwr_t VSF_HW_PWR_ESC
Definition driver.c:763
VSF_HW_CLK_PLL1A
const vsf_hw_clk_t VSF_HW_CLK_PLL1A
Definition driver.c:272
VSF_HW_CLK_AXI
const vsf_hw_clk_t VSF_HW_CLK_AXI
Definition driver.c:471
VSF_HW_CLK_APB2
const vsf_hw_clk_t VSF_HW_CLK_APB2
Definition driver.c:496
VSF_HW_CLK_SDMMC1
const vsf_hw_clk_t VSF_HW_CLK_SDMMC1
Definition driver.c:578
VSF_HW_CLK_MSI_CG
const vsf_hw_clk_t VSF_HW_CLK_MSI_CG
Definition driver.c:202
VSF_HW_PWR_ETH2
const vsf_hw_pwr_t VSF_HW_PWR_ETH2
Definition driver.c:735
VSF_HW_PWR_GPU
const vsf_hw_pwr_t VSF_HW_PWR_GPU
Definition driver.c:715
VSF_HW_PWR_DOMAIN_HCS1
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS1
Definition driver.c:638
VSF_HW_CLK_HSE_KER_CG
const vsf_hw_clk_t VSF_HW_CLK_HSE_KER_CG
VSF_HW_PWR_USB1
const vsf_hw_pwr_t VSF_HW_PWR_USB1
Definition driver.c:751
VSF_HW_PWR_SDMMC2
const vsf_hw_pwr_t VSF_HW_PWR_SDMMC2
Definition driver.c:743
VSF_HW_PWR_DOMAIN_GRC
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_GRC
Definition driver.c:660
VSF_HW_PWR_DOMAIN_HCS2
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_HCS2
Definition driver.c:649
VSF_HW_CLK_PERI
const vsf_hw_clk_t VSF_HW_CLK_PERI
Definition driver.c:533
VSF_HW_CLK_PLL3
const vsf_hw_clk_t VSF_HW_CLK_PLL3
Definition driver.c:251
VSF_HW_CLK_PLL2C
const vsf_hw_clk_t VSF_HW_CLK_PLL2C
Definition driver.c:323
VSF_HW_CLK_SHRPLL
const vsf_hw_clk_t VSF_HW_CLK_SHRPLL
Definition driver.c:261
VSF_HW_PWR_LCDC
const vsf_hw_pwr_t VSF_HW_PWR_LCDC
Definition driver.c:719
VSF_HW_PWR_DOMAIN_SHRA
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHRA
Definition driver.c:690
VSF_HW_PWR_ETH1
const vsf_hw_pwr_t VSF_HW_PWR_ETH1
Definition driver.c:747
VSF_HW_CLK_USBREF
const vsf_hw_clk_t VSF_HW_CLK_USBREF
Definition driver.c:621
vsf_hw_pll_config
vsf_err_t vsf_hw_pll_config(const vsf_hw_clk_t *clk, uint32_t out_freq_hz)
configure frequency range of pll input/output clocks
Definition driver.c:1119
vsf_hw_power_domain_is_ready
bool vsf_hw_power_domain_is_ready(const vsf_hw_pwr_domain_t *domain)
Definition driver.c:1208
VSF_HW_CLK_AXIHYP
const vsf_hw_clk_t VSF_HW_CLK_AXIHYP
Definition driver.c:456
VSF_HW_CLK_PLL2B
const vsf_hw_clk_t VSF_HW_CLK_PLL2B
Definition driver.c:313
VSF_HW_CLK_PLL1C
const vsf_hw_clk_t VSF_HW_CLK_PLL1C
Definition driver.c:292
VSF_HW_CLK_PLL3B
const vsf_hw_clk_t VSF_HW_CLK_PLL3B
Definition driver.c:344
VSF_HW_PWR_SDMMC1
const vsf_hw_pwr_t VSF_HW_PWR_SDMMC1
Definition driver.c:755
VSF_HW_CLK_SDRAM
const vsf_hw_clk_t VSF_HW_CLK_SDRAM
Definition driver.c:555
VSF_HW_CLK_MSI_KER_CG
const vsf_hw_clk_t VSF_HW_CLK_MSI_KER_CG
Definition driver.c:209
VSF_HW_CLK_APB5
const vsf_hw_clk_t VSF_HW_CLK_APB5
Definition driver.c:507
VSF_HW_EN_GPIOCLP
@ VSF_HW_EN_GPIOCLP
Definition common.h:981
VSF_HW_EN_GPIOGLP
@ VSF_HW_EN_GPIOGLP
Definition common.h:989
VSF_HW_EN_GPIOHLP
@ VSF_HW_EN_GPIOHLP
Definition common.h:991
VSF_HW_EN_GPIOELP
@ VSF_HW_EN_GPIOELP
Definition common.h:985
VSF_HW_EN_GPIOKLP
@ VSF_HW_EN_GPIOKLP
Definition common.h:997
VSF_HW_EN_GPIOFLP
@ VSF_HW_EN_GPIOFLP
Definition common.h:987
VSF_HW_EN_GPIOILP
@ VSF_HW_EN_GPIOILP
Definition common.h:993
VSF_HW_EN_GPIODLP
@ VSF_HW_EN_GPIODLP
Definition common.h:983
VSF_HW_EN_GPIOJLP
@ VSF_HW_EN_GPIOJLP
Definition common.h:995
VSF_HW_EN_GPIOALP
@ VSF_HW_EN_GPIOALP
Definition common.h:977
VSF_HW_EN_GPIOBLP
@ VSF_HW_EN_GPIOBLP
Definition common.h:979
VSF_HW_PWR_DOMAIN_SHR2
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_SHR2
Definition driver.c:698
VSF_HW_PWR_DSI
const vsf_hw_pwr_t VSF_HW_PWR_DSI
Definition driver.c:727
VSF_HW_CLK_PLL1B
const vsf_hw_clk_t VSF_HW_CLK_PLL1B
Definition driver.c:282
VSF_HW_CLK_PLL2A
const vsf_hw_clk_t VSF_HW_CLK_PLL2A
Definition driver.c:303
VSF_HW_PWR_USB2
const vsf_hw_pwr_t VSF_HW_PWR_USB2
Definition driver.c:739
VSF_HW_PWR_FMAC
const vsf_hw_pwr_t VSF_HW_PWR_FMAC
Definition driver.c:759
VSF_HW_CLK_PLL3A
const vsf_hw_clk_t VSF_HW_CLK_PLL3A
Definition driver.c:334
VSF_HW_CLK_HSE_CG
const vsf_hw_clk_t VSF_HW_CLK_HSE_CG
VSF_HW_CLK_HSI_KER_CG
const vsf_hw_clk_t VSF_HW_CLK_HSI_KER_CG
Definition driver.c:171
VSF_HW_CLK_SYSBUS
const vsf_hw_clk_t VSF_HW_CLK_SYSBUS
Definition driver.c:381
vsf_hw_power_domain_disable
void vsf_hw_power_domain_disable(const vsf_hw_pwr_domain_t *domain)
Definition driver.c:1199
VSF_HW_CLK_SYSTICK
const vsf_hw_clk_t VSF_HW_CLK_SYSTICK
VSF_HW_CLK_APB1
const vsf_hw_clk_t VSF_HW_CLK_APB1
Definition driver.c:485
VSF_HW_CLK_SDMMC2
const vsf_hw_clk_t VSF_HW_CLK_SDMMC2
Definition driver.c:589
VSF_HW_CLK_MSI
const vsf_hw_clk_t VSF_HW_CLK_MSI
Definition driver.c:178
VSF_HW_CLK_PLL2
const vsf_hw_clk_t VSF_HW_CLK_PLL2
Definition driver.c:241
VSF_HW_PWR_DOMAIN_ESC
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_ESC
Definition driver.c:673
VSF_HW_PWR_DOMAIN_MDMA
const vsf_hw_pwr_domain_t VSF_HW_PWR_DOMAIN_MDMA
Definition driver.c:682
VSF_HW_PWR_DVP
const vsf_hw_pwr_t VSF_HW_PWR_DVP
Definition driver.c:731
VSF_HW_CLK_PLL3C
const vsf_hw_clk_t VSF_HW_CLK_PLL3C
Definition driver.c:354
VSF_HW_CLK_USART1_2
const vsf_hw_clk_t VSF_HW_CLK_USART1_2
Definition driver.c:602
vsf_hw_power_domain_enable
void vsf_hw_power_domain_enable(const vsf_hw_pwr_domain_t *domain)
Definition driver.c:1189
VSF_HW_CLK_AXISYS
const vsf_hw_clk_t VSF_HW_CLK_AXISYS
Definition driver.c:393
VSF_HW_RST_LPTIM2
@ VSF_HW_RST_LPTIM2
Definition common.h:154
VSF_HW_RST_LPTIM3
@ VSF_HW_RST_LPTIM3
Definition common.h:153
VSF_HW_RST_LPTIM1
@ VSF_HW_RST_LPTIM1
Definition common.h:118
VSF_HW_RST_ETH1
@ VSF_HW_RST_ETH1
Definition common.h:60
VSF_HW_RST_SDMMC2
@ VSF_HW_RST_SDMMC2
Definition common.h:66
VSF_HW_RST_SPI6
@ VSF_HW_RST_SPI6
Definition common.h:155
VSF_HW_RST_LPTIM4
@ VSF_HW_RST_LPTIM4
Definition common.h:152
VSF_HW_RST_LPUART1
@ VSF_HW_RST_LPUART1
Definition common.h:156
VSF_HW_RST_CORDIC
@ VSF_HW_RST_CORDIC
Definition common.h:65
VSF_HW_RST_LPTIM5
@ VSF_HW_RST_LPTIM5
Definition common.h:151
vsf_hw_power_enable
#define vsf_hw_power_enable
Definition common.h:47
vsf_hw_clk_config
vsf_err_t vsf_hw_clk_config(const vsf_hw_clk_t *clk, const vsf_hw_clk_t *clksrc, uint16_t prescaler, uint32_t freq_hz)
Definition driver.c:675
VSF_HW_EN_LPTIM3
@ VSF_HW_EN_LPTIM3
Definition common.h:271
VSF_HW_EN_LPTIM2
@ VSF_HW_EN_LPTIM2
Definition common.h:272
VSF_HW_EN_GPIOH
@ VSF_HW_EN_GPIOH
Definition common.h:198
VSF_HW_EN_ETH1RX
@ VSF_HW_EN_ETH1RX
Definition common.h:171
VSF_HW_EN_GPIOE
@ VSF_HW_EN_GPIOE
Definition common.h:201
VSF_HW_EN_ETH1MAC
@ VSF_HW_EN_ETH1MAC
Definition common.h:173
VSF_HW_EN_USART3
@ VSF_HW_EN_USART3
Definition common.h:229
VSF_HW_EN_GPIOB
@ VSF_HW_EN_GPIOB
Definition common.h:204
VSF_HW_EN_XSPI1
@ VSF_HW_EN_XSPI1
Definition common.h:213
VSF_HW_EN_GPIOC
@ VSF_HW_EN_GPIOC
Definition common.h:203
VSF_HW_EN_SPI4
@ VSF_HW_EN_SPI4
Definition common.h:260
VSF_HW_EN_CORDIC
@ VSF_HW_EN_CORDIC
Definition common.h:180
VSF_HW_EN_LPTIM1
@ VSF_HW_EN_LPTIM1
Definition common.h:235
VSF_HW_EN_ETH1TX
@ VSF_HW_EN_ETH1TX
Definition common.h:172
VSF_HW_EN_GPIOD
@ VSF_HW_EN_GPIOD
Definition common.h:202
VSF_HW_EN_LPTIM5
@ VSF_HW_EN_LPTIM5
Definition common.h:269
VSF_HW_EN_LPTIM4
@ VSF_HW_EN_LPTIM4
Definition common.h:270
VSF_HW_EN_GPIOG
@ VSF_HW_EN_GPIOG
Definition common.h:199
VSF_HW_EN_SPI6
@ VSF_HW_EN_SPI6
Definition common.h:273
VSF_HW_EN_SDMMC2
@ VSF_HW_EN_SDMMC2
Definition common.h:181
VSF_HW_EN_LPUART1
@ VSF_HW_EN_LPUART1
Definition common.h:274
VSF_HW_EN_XSPI2
@ VSF_HW_EN_XSPI2
Definition common.h:211
VSF_HW_EN_GPIOF
@ VSF_HW_EN_GPIOF
Definition common.h:200
VSF_HW_EN_SDMMC1
@ VSF_HW_EN_SDMMC1
Definition common.h:212
VSF_HW_EN_SPI5
@ VSF_HW_EN_SPI5
Definition common.h:255
vsf_hw_power_disable
#define vsf_hw_power_disable
Definition common.h:48
VSF_HW_CLK_SYS
const vsf_hw_clk_t VSF_HW_CLK_SYS
Definition driver.c:326
VSF_HW_CLK_LSI
const vsf_hw_clk_t VSF_HW_CLK_LSI
Definition driver.c:216
VSF_HW_CLK_LSE
const vsf_hw_clk_t VSF_HW_CLK_LSE
Definition driver.c:195
VSF_HW_CLK_HSI
const vsf_hw_clk_t VSF_HW_CLK_HSI
Definition driver.c:138
vsf_hw_clk_get_freq_hz
uint32_t vsf_hw_clk_get_freq_hz(const vsf_hw_clk_t *clk)
Definition driver.c:594
VSF_HW_EN_USART6
@ VSF_HW_EN_USART6
Definition common.h:81
VSF_HW_EN_GPIOA
@ VSF_HW_EN_GPIOA
Definition common.h:64
VSF_HW_EN_GPIOI
@ VSF_HW_EN_GPIOI
Definition common.h:72
vsf_hw_clkrst_region_get
uint_fast8_t vsf_hw_clkrst_region_get(uint32_t region)
Definition driver.c:498
VSF_HW_CLK_HSE
const vsf_hw_clk_t VSF_HW_CLK_HSE
Definition driver.c:180
vsf_hw_clkrst_region_set
void vsf_hw_clkrst_region_set(uint32_t region, uint_fast8_t value)
Definition driver.c:485
vsf_hw_clk_get_src
const vsf_hw_clk_t * vsf_hw_clk_get_src(const vsf_hw_clk_t *clk)
Definition driver.c:556
vsf_hw_peripheral_rst_t
vsf_hw_peripheral_rst_t
Definition common.h:76
vsf_hw_clkrst_region_clear_bit
void vsf_hw_clkrst_region_clear_bit(uint32_t region)
Definition driver.c:518
vsf_hw_clkrst_region_set_bit
void vsf_hw_clkrst_region_set_bit(uint32_t region)
Definition driver.c:506
vsf_hw_peripheral_en_t
vsf_hw_peripheral_en_t
Definition common.h:131
vsf_hw_clkrst_region_get_bit
uint_fast8_t vsf_hw_clkrst_region_get_bit(uint32_t region)
Definition driver.c:530
uint16_t
unsigned short uint16_t
Definition stdint.h:7
uint_fast8_t
unsigned char uint_fast8_t
Definition stdint.h:23
uint32_t
unsigned uint32_t
Definition stdint.h:9
vsf_hw_clk_t
Definition driver.c:80
vsf_hw_pwr_domain_t
Definition driver.c:71
vsf_hw_pwr_t
Definition driver.c:81
vsf_hw_pwr_t::domain
const vsf_hw_pwr_domain_t * domain
Definition driver.c:82
vsf_arch.h
value
vk_av_control_value_t value
Definition vsf_audio.h:171
vsf_hal_cfg.h
Generated from commit: vsfteam/vsf@74aa6ce