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VSF Documented
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Go to the source code of this file.
| #define VSF_HW_INTERRUPTS_NUM 104 |
| #define VSF_HW_SWI_NUM 32 |
| #define VSF_HW_INTERRUPT0 WWDT_IRQHandler |
| #define VSF_HW_INTERRUPT1 PVM_IRQHandler |
| #define VSF_HW_INTERRUPT2 TAMP_STAMP_IRQHandler |
| #define VSF_HW_INTERRUPT3 ERTC_WKUP_IRQHandler |
| #define VSF_HW_INTERRUPT4 FLASH_IRQHandler |
| #define VSF_HW_INTERRUPT5 CRM_IRQHandler |
| #define VSF_HW_INTERRUPT6 EXINT0_IRQHandler |
| #define VSF_HW_INTERRUPT7 EXINT1_IRQHandler |
| #define VSF_HW_INTERRUPT8 EXINT2_IRQHandler |
| #define VSF_HW_INTERRUPT9 EXINT3_IRQHandler |
| #define VSF_HW_INTERRUPT10 EXINT4_IRQHandler |
| #define VSF_HW_INTERRUPT11 DMA1_Channel1_IRQHandler |
| #define VSF_HW_INTERRUPT12 DMA1_Channel2_IRQHandler |
| #define VSF_HW_INTERRUPT13 DMA1_Channel3_IRQHandler |
| #define VSF_HW_INTERRUPT14 DMA1_Channel4_IRQHandler |
| #define VSF_HW_INTERRUPT15 DMA1_Channel5_IRQHandler |
| #define VSF_HW_INTERRUPT16 DMA1_Channel6_IRQHandler |
| #define VSF_HW_INTERRUPT17 DMA1_Channel7_IRQHandler |
| #define VSF_HW_INTERRUPT18 ADC1_IRQHandler |
| #define VSF_HW_INTERRUPT19 CAN1_TX_IRQHandler |
| #define VSF_HW_INTERRUPT20 CAN1_RX0_IRQHandler |
| #define VSF_HW_INTERRUPT21 CAN1_RX1_IRQHandler |
| #define VSF_HW_INTERRUPT22 CAN1_SE_IRQHandler |
| #define VSF_HW_INTERRUPT23 EXINT9_5_IRQHandler |
| #define VSF_HW_INTERRUPT24 TMR1_BRK_TMR9_IRQHandler |
| #define VSF_HW_INTERRUPT25 TMR1_OVF_TMR10_IRQHandler |
| #define VSF_HW_INTERRUPT26 TMR1_TRG_HALL_TMR11_IRQHandler |
| #define VSF_HW_INTERRUPT27 TMR1_CH_IRQHandler |
| #define VSF_HW_INTERRUPT28 TMR2_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT29 TMR3_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT30 TMR4_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT31 I2C1_EVT_IRQHandler |
| #define VSF_HW_INTERRUPT32 I2C1_ERR_IRQHandler |
| #define VSF_HW_INTERRUPT33 I2C2_EVT_IRQHandler |
| #define VSF_HW_INTERRUPT34 I2C2_ERR_IRQHandler |
| #define VSF_HW_INTERRUPT35 SPI1_IRQHandler |
| #define VSF_HW_INTERRUPT36 SPI2_IRQHandler |
| #define VSF_HW_INTERRUPT37 USART1_IRQHandler |
| #define VSF_HW_INTERRUPT38 USART2_IRQHandler |
| #define VSF_HW_INTERRUPT39 USART3_IRQHandler |
| #define VSF_HW_INTERRUPT40 EXINT15_10_IRQHandler |
| #define VSF_HW_INTERRUPT41 ERTCAlarm_IRQHandler |
| #define VSF_HW_INTERRUPT42 OTGFS1_WKUP_IRQHandler |
| #define VSF_HW_INTERRUPT43 SWI0_IRQHandler |
| #define VSF_HW_INTERRUPT44 TMR13_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT45 TMR14_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT46 SWI1_IRQHandler |
| #define VSF_HW_INTERRUPT47 SWI2_IRQHandler |
| #define VSF_HW_INTERRUPT48 SWI3_IRQHandler |
| #define VSF_HW_INTERRUPT49 SWI4_IRQHandler |
| #define VSF_HW_INTERRUPT50 SWI5_IRQHandler |
| #define VSF_HW_INTERRUPT51 SPI3_IRQHandler |
| #define VSF_HW_INTERRUPT52 USART4_IRQHandler |
| #define VSF_HW_INTERRUPT53 USART5_IRQHandler |
| #define VSF_HW_INTERRUPT54 TMR6_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT55 TMR7_GLOBAL_IRQHandler |
| #define VSF_HW_INTERRUPT56 DMA2_Channel1_IRQHandler |
| #define VSF_HW_INTERRUPT57 DMA2_Channel2_IRQHandler |
| #define VSF_HW_INTERRUPT58 DMA2_Channel3_IRQHandler |
| #define VSF_HW_INTERRUPT59 DMA2_Channel4_IRQHandler |
| #define VSF_HW_INTERRUPT60 DMA2_Channel5_IRQHandler |
| #define VSF_HW_INTERRUPT61 SWI6_IRQHandler |
| #define VSF_HW_INTERRUPT62 SWI7_IRQHandler |
| #define VSF_HW_INTERRUPT63 SWI8_IRQHandler |
| #define VSF_HW_INTERRUPT64 SWI9_IRQHandler |
| #define VSF_HW_INTERRUPT65 SWI10_IRQHandler |
| #define VSF_HW_INTERRUPT66 SWI11_IRQHandler |
| #define VSF_HW_INTERRUPT67 OTGFS1_IRQHandler |
| #define VSF_HW_INTERRUPT68 DMA2_Channel6_IRQHandler |
| #define VSF_HW_INTERRUPT69 DMA2_Channel7_IRQHandler |
| #define VSF_HW_INTERRUPT70 SWI12_IRQHandler |
| #define VSF_HW_INTERRUPT71 USART6_IRQHandler |
| #define VSF_HW_INTERRUPT72 I2C3_EVT_IRQHandler |
| #define VSF_HW_INTERRUPT73 I2C3_ERR_IRQHandler |
| #define VSF_HW_INTERRUPT74 OTGHS_EP1_OUT_IRQHandler |
| #define VSF_HW_INTERRUPT75 OTGHS_EP1_IN_IRQHandler |
| #define VSF_HW_INTERRUPT76 OTGHS_WKUP_IRQHandler |
| #define VSF_HW_INTERRUPT77 OTGHS_IRQHandler |
| #define VSF_HW_INTERRUPT78 SWI13_IRQHandler |
| #define VSF_HW_INTERRUPT79 SWI14_IRQHandler |
| #define VSF_HW_INTERRUPT80 SWI15_IRQHandler |
| #define VSF_HW_INTERRUPT81 FPU_IRQHandler |
| #define VSF_HW_INTERRUPT82 UART7_IRQHandler |
| #define VSF_HW_INTERRUPT83 UART8_IRQHandler |
| #define VSF_HW_INTERRUPT84 SWI16_IRQHandler |
| #define VSF_HW_INTERRUPT85 I2SF5_IRQHandler |
| #define VSF_HW_INTERRUPT86 SWI17_IRQHandler |
| #define VSF_HW_INTERRUPT87 SWI18_IRQHandler |
| #define VSF_HW_INTERRUPT88 SWI19_IRQHandler |
| #define VSF_HW_INTERRUPT89 SWI20_IRQHandler |
| #define VSF_HW_INTERRUPT90 SWI21_IRQHandler |
| #define VSF_HW_INTERRUPT91 SWI22_IRQHandler |
| #define VSF_HW_INTERRUPT92 QSPI1_IRQHandler |
| #define VSF_HW_INTERRUPT93 SWI23_IRQHandler |
| #define VSF_HW_INTERRUPT94 DMAMUX_IRQHandler |
| #define VSF_HW_INTERRUPT95 SWI24_IRQHandler |
| #define VSF_HW_INTERRUPT96 SWI25_IRQHandler |
| #define VSF_HW_INTERRUPT97 SWI26_IRQHandler |
| #define VSF_HW_INTERRUPT98 SWI27_IRQHandler |
| #define VSF_HW_INTERRUPT99 SWI28_IRQHandler |
| #define VSF_HW_INTERRUPT100 SWI29_IRQHandler |
| #define VSF_HW_INTERRUPT101 SWI30_IRQHandler |
| #define VSF_HW_INTERRUPT102 SWI31_IRQHandler |
| #define VSF_HW_INTERRUPT103 ACC_IRQHandler |