#include "hal/vsf_hal_cfg.h"
#include "../common/common.h"

Macros
#define	__HAL_DEVICE_ST_STM32H743VI_H__

#define	__VSF_DEF_SWI_LIST_DEF(__N, __PARAM) VSF_MCONNECT(SWI, __N, _IRQn),

#define	VSF_DEV_SWI_LIST VSF_MREPEAT(VSF_DEV_SWI_NUM, __VSF_DEF_SWI_LIST_DEF, NULL)

#define	SWI0_IRQn 42

#define	SWI1_IRQn 66

#define	SWI2_IRQn 67

#define	SWI3_IRQn 147

#define	SWI4_IRQn 64

#define	SWI4_IRQHandler CM7_SEV_IRQHandler

#define	SWI5_IRQn 65

#define	SWI5_IRQHandler CM4_SEV_IRQHandler

#define	SWI6_IRQn 79

#define	SWI6_IRQHandler CRYP_IRQHandler

#define	SWI7_IRQn 123

#define	SWI7_IRQHandler DSI_IRQHandler

#define	SWI8_IRQn 126

#define	SWI8_IRQHandler HSEM2_IRQHandler

#define	SWI9_IRQn 143

#define	SWI9_IRQHandler WWDG_RST_IRQHandler

#define	SWI10_IRQn 148

#define	SWI10_IRQHandler HOLD_CORE_IRQHandler

#define	VSF_HW_GPIO_PORT_COUNT 11

#define	VSF_HW_GPIO_PIN_COUNT 16

#define	VSF_HW_GPIO_FUNCTION_MAX 16

#define	VSF_HW_GPIO_PORT0_REG_BASE GPIOA

#define	VSF_HW_GPIO_PORT0_CLK_GATING RCU_GPIOA

#define	VSF_HW_GPIO_PORT0_RST RCU_GPIOARST

#define	VSF_HW_GPIO_PORT1_REG_BASE GPIOB

#define	VSF_HW_GPIO_PORT1_CLK_GATING RCU_GPIOB

#define	VSF_HW_GPIO_PORT1_RST RCU_GPIOBRST

#define	VSF_HW_GPIO_PORT2_REG_BASE GPIOC

#define	VSF_HW_GPIO_PORT2_CLK_GATING RCU_GPIOC

#define	VSF_HW_GPIO_PORT2_RST RCU_GPIOCRST

#define	VSF_HW_GPIO_PORT3_REG_BASE GPIOD

#define	VSF_HW_GPIO_PORT3_CLK_GATING RCU_GPIOD

#define	VSF_HW_GPIO_PORT3_RST RCU_GPIODRST

#define	VSF_HW_GPIO_PORT4_REG_BASE GPIOE

#define	VSF_HW_GPIO_PORT4_CLK_GATING RCU_GPIOE

#define	VSF_HW_GPIO_PORT4_RST RCU_GPIOERST

#define	VSF_HW_GPIO_PORT5_REG_BASE GPIOF

#define	VSF_HW_GPIO_PORT5_CLK_GATING RCU_GPIOF

#define	VSF_HW_GPIO_PORT5_RST RCU_GPIOFRST

#define	VSF_HW_GPIO_PORT6_REG_BASE GPIOG

#define	VSF_HW_GPIO_PORT6_CLK_GATING RCU_GPIOG

#define	VSF_HW_GPIO_PORT6_RST RCU_GPIOGRST

#define	VSF_HW_GPIO_PORT7_REG_BASE GPIOH

#define	VSF_HW_GPIO_PORT7_CLK_GATING RCU_GPIOH

#define	VSF_HW_GPIO_PORT7_RST RCU_GPIOHRST

#define	VSF_HW_GPIO_PORT8_REG_BASE GPIOI

#define	VSF_HW_GPIO_PORT8_CLK_GATING RCU_GPIOI

#define	VSF_HW_GPIO_PORT8_RST RCU_GPIOIRST

#define	VSF_HW_GPIO_PORT9_REG_BASE GPIOJ

#define	VSF_HW_GPIO_PORT9_CLK_GATING RCU_GPIOJ

#define	VSF_HW_GPIO_PORT9_RST RCU_GPIOJRST

#define	VSF_HW_GPIO_PORT10_REG_BASE GPIOK

#define	VSF_HW_GPIO_PORT10_CLK_GATING RCU_GPIOK

#define	VSF_HW_GPIO_PORT10_RST RCU_GPIOKRST

#define	VSF_HW_FLASH_COUNT 2

#define	VSF_HW_FLASH_IRQN FLASH_IRQn

#define	VSF_HW_FLASH_IRQHandler FLASH_IRQHandler

#define	VSF_HW_FLASH_PROG_WORD_CNT FLASH_NB_32BITWORD_IN_FLASHWORD

#define	VSF_HW_FLASH0_ADDR 0x08000000

#define	VSF_HW_FLASH0_REG_BASE (&FLASH->KEYR1)

#define	VSF_HW_FLASH1_ADDR 0x08100000

#define	VSF_HW_FLASH1_REG_BASE (&FLASH->KEYR2)

#define	VSF_HW_USART_COUNT 8

#define	VSF_HW_USART_MASK 0x01FE

#define	VSF_HW_USART1_REG_BASE USART1

#define	VSF_HW_USART1_CLK VSF_HW_CLK_USART1

#define	VSF_HW_USART1_EN VSF_HW_EN_USART1

#define	VSF_HW_USART1_RST VSF_HW_RST_USART1

#define	VSF_HW_USART1_SYNC true

#define	VSF_HW_USART1_IRQN USART1_IRQn

#define	VSF_HW_USART1_IRQHandler USART1_IRQHandler

#define	VSF_HW_USART2_REG_BASE USART2

#define	VSF_HW_USART2_CLK VSF_HW_CLK_USART2

#define	VSF_HW_USART2_EN VSF_HW_EN_USART2

#define	VSF_HW_USART2_RST VSF_HW_RST_USART2

#define	VSF_HW_USART2_SYNC true

#define	VSF_HW_USART2_IRQN USART2_IRQn

#define	VSF_HW_USART2_IRQHandler USART2_IRQHandler

#define	VSF_HW_USART3_REG_BASE USART3

#define	VSF_HW_USART3_CLK VSF_HW_CLK_USART3

#define	VSF_HW_USART3_EN VSF_HW_EN_USART3

#define	VSF_HW_USART3_RST VSF_HW_RST_USART3

#define	VSF_HW_USART3_SYNC true

#define	VSF_HW_USART3_IRQN USART3_IRQn

#define	VSF_HW_USART3_IRQHandler USART3_IRQHandler

#define	VSF_HW_USART4_REG_BASE UART4

#define	VSF_HW_USART4_CLK VSF_HW_CLK_UART4

#define	VSF_HW_USART4_EN VSF_HW_EN_UART4

#define	VSF_HW_USART4_RST VSF_HW_RST_UART4

#define	VSF_HW_USART4_SYNC false

#define	VSF_HW_USART4_IRQN UART4_IRQn

#define	VSF_HW_USART4_IRQHandler UART4_IRQHandler

#define	VSF_HW_USART5_REG_BASE UART5

#define	VSF_HW_USART5_CLK VSF_HW_CLK_UART5

#define	VSF_HW_USART5_EN VSF_HW_EN_UART5

#define	VSF_HW_USART5_RST VSF_HW_RST_UART5

#define	VSF_HW_USART5_SYNC false

#define	VSF_HW_USART5_IRQN UART5_IRQn

#define	VSF_HW_USART5_IRQHandler UART5_IRQHandler

#define	VSF_HW_USART6_REG_BASE USART6

#define	VSF_HW_USART6_CLK VSF_HW_CLK_USART6

#define	VSF_HW_USART6_EN VSF_HW_EN_USART6

#define	VSF_HW_USART6_RST VSF_HW_RST_USART6

#define	VSF_HW_USART6_SYNC true

#define	VSF_HW_USART6_IRQN USART6_IRQn

#define	VSF_HW_USART6_IRQHandler USART6_IRQHandler

#define	VSF_HW_USART7_REG_BASE UART7

#define	VSF_HW_USART7_CLK VSF_HW_CLK_UART7

#define	VSF_HW_USART7_EN VSF_HW_EN_UART7

#define	VSF_HW_USART7_RST VSF_HW_RST_UART7

#define	VSF_HW_USART7_SYNC false

#define	VSF_HW_USART7_IRQN UART7_IRQn

#define	VSF_HW_USART7_IRQHandler UART7_IRQHandler

#define	VSF_HW_USART8_REG_BASE UART8

#define	VSF_HW_USART8_CLK VSF_HW_CLK_UART8

#define	VSF_HW_USART8_EN VSF_HW_EN_UART8

#define	VSF_HW_USART8_RST VSF_HW_RST_UART8

#define	VSF_HW_USART8_SYNC false

#define	VSF_HW_USART8_IRQN UART8_IRQn

#define	VSF_HW_USART8_IRQHandler UART8_IRQHandler

#define	VSF_HW_SDIO_COUNT 2

#define	VSF_HW_SDIO_MASK 0x06

#define	VSF_HW_SDIO1_REG_BASE SDMMC1

#define	VSF_HW_SDIO1_CLK VSF_HW_CLK_SDMMC1

#define	VSF_HW_SDIO1_EN VSF_HW_EN_SDMMC1

#define	VSF_HW_SDIO1_RST VSF_HW_RST_SDMMC1

#define	VSF_HW_SDIO1_IRQN SDMMC1_IRQn

#define	VSF_HW_SDIO1_IRQHandler SDMMC1_IRQHandler

#define	VSF_HW_SDIO2_REG_BASE SDMMC2

#define	VSF_HW_SDIO2_CLK VSF_HW_CLK_SDMMC2

#define	VSF_HW_SDIO2_EN VSF_HW_EN_SDMMC2

#define	VSF_HW_SDIO2_RST VSF_HW_RST_SDMMC2

#define	VSF_HW_SDIO2_IRQN SDMMC2_IRQn

#define	VSF_HW_SDIO2_IRQHandler SDMMC2_IRQHandler

Macro Definition Documentation

◆ __HAL_DEVICE_ST_STM32H743VI_H__

#define __HAL_DEVICE_ST_STM32H743VI_H__

◆ __VSF_DEF_SWI_LIST_DEF

#define __VSF_DEF_SWI_LIST_DEF	(	__N,
		__PARAM
	)	VSF_MCONNECT(SWI, __N, _IRQn),

◆ VSF_DEV_SWI_LIST

#define VSF_DEV_SWI_LIST VSF_MREPEAT(VSF_DEV_SWI_NUM, __VSF_DEF_SWI_LIST_DEF, NULL)

◆ SWI0_IRQn

#define SWI0_IRQn 42

◆ SWI1_IRQn

#define SWI1_IRQn 66

◆ SWI2_IRQn

#define SWI2_IRQn 67

◆ SWI3_IRQn

#define SWI3_IRQn 147

◆ SWI4_IRQn

#define SWI4_IRQn 64

◆ SWI4_IRQHandler

#define SWI4_IRQHandler ( void ) CM7_SEV_IRQHandler

◆ SWI5_IRQn

#define SWI5_IRQn 65

◆ SWI5_IRQHandler

#define SWI5_IRQHandler ( void ) CM4_SEV_IRQHandler

◆ SWI6_IRQn

#define SWI6_IRQn 79

◆ SWI6_IRQHandler

#define SWI6_IRQHandler ( void ) CRYP_IRQHandler

◆ SWI7_IRQn

#define SWI7_IRQn 123

◆ SWI7_IRQHandler

#define SWI7_IRQHandler ( void ) DSI_IRQHandler

◆ SWI8_IRQn

#define SWI8_IRQn 126

◆ SWI8_IRQHandler

#define SWI8_IRQHandler ( void ) HSEM2_IRQHandler

◆ SWI9_IRQn

#define SWI9_IRQn 143

◆ SWI9_IRQHandler

#define SWI9_IRQHandler ( void ) WWDG_RST_IRQHandler

◆ SWI10_IRQn

#define SWI10_IRQn 148

◆ SWI10_IRQHandler

#define SWI10_IRQHandler ( void ) HOLD_CORE_IRQHandler

◆ VSF_HW_GPIO_PORT_COUNT

#define VSF_HW_GPIO_PORT_COUNT 11

◆ VSF_HW_GPIO_PIN_COUNT

#define VSF_HW_GPIO_PIN_COUNT 16

◆ VSF_HW_GPIO_FUNCTION_MAX

#define VSF_HW_GPIO_FUNCTION_MAX 16

◆ VSF_HW_GPIO_PORT0_REG_BASE

#define VSF_HW_GPIO_PORT0_REG_BASE GPIOA

◆ VSF_HW_GPIO_PORT0_CLK_GATING

#define VSF_HW_GPIO_PORT0_CLK_GATING RCU_GPIOA

◆ VSF_HW_GPIO_PORT0_RST

#define VSF_HW_GPIO_PORT0_RST RCU_GPIOARST

◆ VSF_HW_GPIO_PORT1_REG_BASE

#define VSF_HW_GPIO_PORT1_REG_BASE GPIOB

◆ VSF_HW_GPIO_PORT1_CLK_GATING

#define VSF_HW_GPIO_PORT1_CLK_GATING RCU_GPIOB

◆ VSF_HW_GPIO_PORT1_RST

#define VSF_HW_GPIO_PORT1_RST RCU_GPIOBRST

◆ VSF_HW_GPIO_PORT2_REG_BASE

#define VSF_HW_GPIO_PORT2_REG_BASE GPIOC

◆ VSF_HW_GPIO_PORT2_CLK_GATING

#define VSF_HW_GPIO_PORT2_CLK_GATING RCU_GPIOC

◆ VSF_HW_GPIO_PORT2_RST

#define VSF_HW_GPIO_PORT2_RST RCU_GPIOCRST

◆ VSF_HW_GPIO_PORT3_REG_BASE

#define VSF_HW_GPIO_PORT3_REG_BASE GPIOD

◆ VSF_HW_GPIO_PORT3_CLK_GATING

#define VSF_HW_GPIO_PORT3_CLK_GATING RCU_GPIOD

◆ VSF_HW_GPIO_PORT3_RST

#define VSF_HW_GPIO_PORT3_RST RCU_GPIODRST

◆ VSF_HW_GPIO_PORT4_REG_BASE

#define VSF_HW_GPIO_PORT4_REG_BASE GPIOE

◆ VSF_HW_GPIO_PORT4_CLK_GATING

#define VSF_HW_GPIO_PORT4_CLK_GATING RCU_GPIOE

◆ VSF_HW_GPIO_PORT4_RST

#define VSF_HW_GPIO_PORT4_RST RCU_GPIOERST

◆ VSF_HW_GPIO_PORT5_REG_BASE

#define VSF_HW_GPIO_PORT5_REG_BASE GPIOF

◆ VSF_HW_GPIO_PORT5_CLK_GATING

#define VSF_HW_GPIO_PORT5_CLK_GATING RCU_GPIOF

◆ VSF_HW_GPIO_PORT5_RST

#define VSF_HW_GPIO_PORT5_RST RCU_GPIOFRST

◆ VSF_HW_GPIO_PORT6_REG_BASE

#define VSF_HW_GPIO_PORT6_REG_BASE GPIOG

◆ VSF_HW_GPIO_PORT6_CLK_GATING

#define VSF_HW_GPIO_PORT6_CLK_GATING RCU_GPIOG

◆ VSF_HW_GPIO_PORT6_RST

#define VSF_HW_GPIO_PORT6_RST RCU_GPIOGRST

◆ VSF_HW_GPIO_PORT7_REG_BASE

#define VSF_HW_GPIO_PORT7_REG_BASE GPIOH

◆ VSF_HW_GPIO_PORT7_CLK_GATING

#define VSF_HW_GPIO_PORT7_CLK_GATING RCU_GPIOH

◆ VSF_HW_GPIO_PORT7_RST

#define VSF_HW_GPIO_PORT7_RST RCU_GPIOHRST

◆ VSF_HW_GPIO_PORT8_REG_BASE

#define VSF_HW_GPIO_PORT8_REG_BASE GPIOI

◆ VSF_HW_GPIO_PORT8_CLK_GATING

#define VSF_HW_GPIO_PORT8_CLK_GATING RCU_GPIOI

◆ VSF_HW_GPIO_PORT8_RST

#define VSF_HW_GPIO_PORT8_RST RCU_GPIOIRST

◆ VSF_HW_GPIO_PORT9_REG_BASE

#define VSF_HW_GPIO_PORT9_REG_BASE GPIOJ

◆ VSF_HW_GPIO_PORT9_CLK_GATING

#define VSF_HW_GPIO_PORT9_CLK_GATING RCU_GPIOJ

◆ VSF_HW_GPIO_PORT9_RST

#define VSF_HW_GPIO_PORT9_RST RCU_GPIOJRST

◆ VSF_HW_GPIO_PORT10_REG_BASE

#define VSF_HW_GPIO_PORT10_REG_BASE GPIOK

◆ VSF_HW_GPIO_PORT10_CLK_GATING

#define VSF_HW_GPIO_PORT10_CLK_GATING RCU_GPIOK

◆ VSF_HW_GPIO_PORT10_RST

#define VSF_HW_GPIO_PORT10_RST RCU_GPIOKRST

◆ VSF_HW_FLASH_COUNT

#define VSF_HW_FLASH_COUNT 2

◆ VSF_HW_FLASH_IRQN

#define VSF_HW_FLASH_IRQN FLASH_IRQn

◆ VSF_HW_FLASH_IRQHandler

#define VSF_HW_FLASH_IRQHandler FLASH_IRQHandler

◆ VSF_HW_FLASH_PROG_WORD_CNT

#define VSF_HW_FLASH_PROG_WORD_CNT FLASH_NB_32BITWORD_IN_FLASHWORD

◆ VSF_HW_FLASH0_ADDR

#define VSF_HW_FLASH0_ADDR 0x08000000

◆ VSF_HW_FLASH0_REG_BASE

#define VSF_HW_FLASH0_REG_BASE (&FLASH->KEYR1)

◆ VSF_HW_FLASH1_ADDR

#define VSF_HW_FLASH1_ADDR 0x08100000

◆ VSF_HW_FLASH1_REG_BASE

#define VSF_HW_FLASH1_REG_BASE (&FLASH->KEYR2)

◆ VSF_HW_USART_COUNT

#define VSF_HW_USART_COUNT 8

◆ VSF_HW_USART_MASK

#define VSF_HW_USART_MASK 0x01FE

◆ VSF_HW_USART1_REG_BASE

#define VSF_HW_USART1_REG_BASE USART1

◆ VSF_HW_USART1_CLK

#define VSF_HW_USART1_CLK VSF_HW_CLK_USART1

◆ VSF_HW_USART1_EN

#define VSF_HW_USART1_EN VSF_HW_EN_USART1

◆ VSF_HW_USART1_RST

#define VSF_HW_USART1_RST VSF_HW_RST_USART1

◆ VSF_HW_USART1_SYNC

#define VSF_HW_USART1_SYNC true

◆ VSF_HW_USART1_IRQN

#define VSF_HW_USART1_IRQN USART1_IRQn

◆ VSF_HW_USART1_IRQHandler

#define VSF_HW_USART1_IRQHandler USART1_IRQHandler

◆ VSF_HW_USART2_REG_BASE

#define VSF_HW_USART2_REG_BASE USART2

◆ VSF_HW_USART2_CLK

#define VSF_HW_USART2_CLK VSF_HW_CLK_USART2

◆ VSF_HW_USART2_EN

#define VSF_HW_USART2_EN VSF_HW_EN_USART2

◆ VSF_HW_USART2_RST

#define VSF_HW_USART2_RST VSF_HW_RST_USART2

◆ VSF_HW_USART2_SYNC

#define VSF_HW_USART2_SYNC true

◆ VSF_HW_USART2_IRQN

#define VSF_HW_USART2_IRQN USART2_IRQn

◆ VSF_HW_USART2_IRQHandler

#define VSF_HW_USART2_IRQHandler USART2_IRQHandler

◆ VSF_HW_USART3_REG_BASE

#define VSF_HW_USART3_REG_BASE USART3

◆ VSF_HW_USART3_CLK

#define VSF_HW_USART3_CLK VSF_HW_CLK_USART3

◆ VSF_HW_USART3_EN

#define VSF_HW_USART3_EN VSF_HW_EN_USART3

◆ VSF_HW_USART3_RST

#define VSF_HW_USART3_RST VSF_HW_RST_USART3

◆ VSF_HW_USART3_SYNC

#define VSF_HW_USART3_SYNC true

◆ VSF_HW_USART3_IRQN

#define VSF_HW_USART3_IRQN USART3_IRQn

◆ VSF_HW_USART3_IRQHandler

#define VSF_HW_USART3_IRQHandler USART3_IRQHandler

◆ VSF_HW_USART4_REG_BASE

#define VSF_HW_USART4_REG_BASE UART4

◆ VSF_HW_USART4_CLK

#define VSF_HW_USART4_CLK VSF_HW_CLK_UART4

◆ VSF_HW_USART4_EN

#define VSF_HW_USART4_EN VSF_HW_EN_UART4

◆ VSF_HW_USART4_RST

#define VSF_HW_USART4_RST VSF_HW_RST_UART4

◆ VSF_HW_USART4_SYNC

#define VSF_HW_USART4_SYNC false

◆ VSF_HW_USART4_IRQN

#define VSF_HW_USART4_IRQN UART4_IRQn

◆ VSF_HW_USART4_IRQHandler

#define VSF_HW_USART4_IRQHandler UART4_IRQHandler

◆ VSF_HW_USART5_REG_BASE

#define VSF_HW_USART5_REG_BASE UART5

◆ VSF_HW_USART5_CLK

#define VSF_HW_USART5_CLK VSF_HW_CLK_UART5

◆ VSF_HW_USART5_EN

#define VSF_HW_USART5_EN VSF_HW_EN_UART5

◆ VSF_HW_USART5_RST

#define VSF_HW_USART5_RST VSF_HW_RST_UART5

◆ VSF_HW_USART5_SYNC

#define VSF_HW_USART5_SYNC false

◆ VSF_HW_USART5_IRQN

#define VSF_HW_USART5_IRQN UART5_IRQn

◆ VSF_HW_USART5_IRQHandler

#define VSF_HW_USART5_IRQHandler UART5_IRQHandler

◆ VSF_HW_USART6_REG_BASE

#define VSF_HW_USART6_REG_BASE USART6

◆ VSF_HW_USART6_CLK

#define VSF_HW_USART6_CLK VSF_HW_CLK_USART6

◆ VSF_HW_USART6_EN

#define VSF_HW_USART6_EN VSF_HW_EN_USART6

◆ VSF_HW_USART6_RST

#define VSF_HW_USART6_RST VSF_HW_RST_USART6

◆ VSF_HW_USART6_SYNC

#define VSF_HW_USART6_SYNC true

◆ VSF_HW_USART6_IRQN

#define VSF_HW_USART6_IRQN USART6_IRQn

◆ VSF_HW_USART6_IRQHandler

#define VSF_HW_USART6_IRQHandler USART6_IRQHandler

◆ VSF_HW_USART7_REG_BASE

#define VSF_HW_USART7_REG_BASE UART7

◆ VSF_HW_USART7_CLK

#define VSF_HW_USART7_CLK VSF_HW_CLK_UART7

◆ VSF_HW_USART7_EN

#define VSF_HW_USART7_EN VSF_HW_EN_UART7

◆ VSF_HW_USART7_RST

#define VSF_HW_USART7_RST VSF_HW_RST_UART7

◆ VSF_HW_USART7_SYNC

#define VSF_HW_USART7_SYNC false

◆ VSF_HW_USART7_IRQN

#define VSF_HW_USART7_IRQN UART7_IRQn

◆ VSF_HW_USART7_IRQHandler

#define VSF_HW_USART7_IRQHandler UART7_IRQHandler

◆ VSF_HW_USART8_REG_BASE

#define VSF_HW_USART8_REG_BASE UART8

◆ VSF_HW_USART8_CLK

#define VSF_HW_USART8_CLK VSF_HW_CLK_UART8

◆ VSF_HW_USART8_EN

#define VSF_HW_USART8_EN VSF_HW_EN_UART8

◆ VSF_HW_USART8_RST

#define VSF_HW_USART8_RST VSF_HW_RST_UART8

◆ VSF_HW_USART8_SYNC

#define VSF_HW_USART8_SYNC false

◆ VSF_HW_USART8_IRQN

#define VSF_HW_USART8_IRQN UART8_IRQn

◆ VSF_HW_USART8_IRQHandler

#define VSF_HW_USART8_IRQHandler UART8_IRQHandler

◆ VSF_HW_SDIO_COUNT

#define VSF_HW_SDIO_COUNT 2

◆ VSF_HW_SDIO_MASK

#define VSF_HW_SDIO_MASK 0x06

◆ VSF_HW_SDIO1_REG_BASE

#define VSF_HW_SDIO1_REG_BASE SDMMC1

◆ VSF_HW_SDIO1_CLK

#define VSF_HW_SDIO1_CLK VSF_HW_CLK_SDMMC1

◆ VSF_HW_SDIO1_EN

#define VSF_HW_SDIO1_EN VSF_HW_EN_SDMMC1

◆ VSF_HW_SDIO1_RST

#define VSF_HW_SDIO1_RST VSF_HW_RST_SDMMC1

◆ VSF_HW_SDIO1_IRQN

#define VSF_HW_SDIO1_IRQN SDMMC1_IRQn

◆ VSF_HW_SDIO1_IRQHandler

#define VSF_HW_SDIO1_IRQHandler SDMMC1_IRQHandler

◆ VSF_HW_SDIO2_REG_BASE

#define VSF_HW_SDIO2_REG_BASE SDMMC2

◆ VSF_HW_SDIO2_CLK

#define VSF_HW_SDIO2_CLK VSF_HW_CLK_SDMMC2

◆ VSF_HW_SDIO2_EN

#define VSF_HW_SDIO2_EN VSF_HW_EN_SDMMC2

◆ VSF_HW_SDIO2_RST

#define VSF_HW_SDIO2_RST VSF_HW_RST_SDMMC2

◆ VSF_HW_SDIO2_IRQN

#define VSF_HW_SDIO2_IRQN SDMMC2_IRQn

◆ VSF_HW_SDIO2_IRQHandler

#define VSF_HW_SDIO2_IRQHandler SDMMC2_IRQHandler

Macros