spi.h File Reference

#include "hal/vsf_hal_cfg.h"
#include "../../__device.h"
#include "hal/driver/common/template/vsf_template_hal_driver.h"
#include "hal/driver/common/spi/spi_template.h"

Go to the source code of this file.

Data Structures
struct	vsf_spi_status_t

Macros
#define	SPI_SSCTL_POS   21
#define	VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE   ENABLED
#define	VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS   ENABLED
#define	VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK   ENABLED
#define	VSF_SPI_CFG_DEC_PREFIX   vsf_hw
#define	VSF_SPI_CFG_DEC_UPCASE_PREFIX   VSF_HW

Typedefs
typedef enum vsf_spi_irq_mask_t	vsf_spi_irq_mask_t
typedef enum vsf_spi_mode_t	vsf_spi_mode_t
typedef struct vsf_spi_status_t	vsf_spi_status_t

Enumerations
enum	vsf_spi_irq_mask_t {   VSF_SPI_IRQ_MASK_TX_CPL = 1 << 0 ,   VSF_SPI_IRQ_MASK_CPL = 1 << 1 }
enum	vsf_spi_mode_t {   VSF_SPI_MASTER = 0x00 ,   VSF_SPI_SLAVE = SPI_CTL_SLAVE_Msk ,   VSF_SPI_DIR_MODE_MASK = VSF_SPI_SLAVE | VSF_SPI_MASTER ,   VSF_SPI_MODE_0 = SPI_CTL_TXNEG_Msk ,   VSF_SPI_MODE_1 = SPI_CTL_RXNEG_Msk ,   VSF_SPI_MODE_2 = SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk ,   VSF_SPI_MODE_3 = SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk ,   VSF_SPI_MODE_MASK = VSF_SPI_MODE_0 | VSF_SPI_MODE_1 | VSF_SPI_MODE_2 | VSF_SPI_MODE_3 ,   VSF_SPI_MSB_FIRST = 0 ,   VSF_SPI_LSB_FIRST = SPI_CTL_LSB_Msk ,   VSF_SPI_BIT_ORDER_MASK = VSF_SPI_MSB_FIRST | VSF_SPI_LSB_FIRST ,   VSF_SPI_DATASIZE_8 = ( 8 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_9 = ( 9 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_10 = (10 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_11 = (11 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_12 = (12 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_13 = (13 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_14 = (14 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_15 = (15 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_16 = (16 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_17 = (17 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_18 = (18 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_19 = (19 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_20 = (20 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_21 = (21 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_22 = (22 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_23 = (23 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_24 = (24 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_25 = (25 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_26 = (26 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_27 = (27 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_28 = (28 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_29 = (29 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_30 = (30 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_31 = (31 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_32 = ( 0 << SPI_CTL_DWIDTH_Pos) ,   VSF_SPI_DATASIZE_MASK = SPI_CTL_DWIDTH_Msk ,   SPI_FULL_DUPLEX = 0 ,   SPI_HALF_DUPLEX = SPI_CTL_HALFDPX_Msk ,   SPI_DUPLEX_MASK = SPI_HALF_DUPLEX ,   SPI_DATA_INPUT_DIRECTION = 0 ,   SPI_DATA_OUTPUT_DIRECTION = SPI_CTL_DATDIR_Msk ,   SPI_RECEIVE_ONLY_MODE_DISABLED = 0 ,   SPI_RECEIVE_ONLY_MODE_ENABLED = SPI_CTL_RXONLY_Msk ,   SPI_AUTO_SLAVE_SELECTION = SPI_SSCTL_AUTOSS_Pos + SPI_SSCTL_POS ,   SPI_AUTO_SLAVE_SELECTION_MSK = 1 << (SPI_SSCTL_AUTOSS_Pos + SPI_SSCTL_POS) ,   SPI_AUTO_SLAVE_SELECTION_DISABLE = 0 ,   SPI_AUTO_SLAVE_SELECTION_ENABLE = SPI_AUTO_SLAVE_SELECTION_MSK ,   VSF_SPI_SLAVE_SELECTION_ACTIVE_LOW = 0 ,   VSF_SPI_SLAVE_SELECTION_ACTIVE_HIGH = 1 << (SPI_SSCTL_SSACTPOL_Pos + SPI_SSCTL_POS) }

Macro Definition Documentation

SPI_SSCTL_POS

#define SPI_SSCTL_POS   21

VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE

#define VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE   ENABLED

VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS

#define VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS   ENABLED

VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK

#define VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK   ENABLED

VSF_SPI_CFG_DEC_PREFIX

#define VSF_SPI_CFG_DEC_PREFIX   vsf_hw

VSF_SPI_CFG_DEC_UPCASE_PREFIX

#define VSF_SPI_CFG_DEC_UPCASE_PREFIX   VSF_HW

Typedef Documentation

vsf_spi_irq_mask_t

typedef enum vsf_spi_irq_mask_t vsf_spi_irq_mask_t

vsf_spi_mode_t

typedef enum vsf_spi_mode_t vsf_spi_mode_t

vsf_spi_status_t

typedef struct vsf_spi_status_t vsf_spi_status_t

Enumeration Type Documentation

vsf_spi_irq_mask_t

enum vsf_spi_irq_mask_t

Enumerator
VSF_SPI_IRQ_MASK_TX_CPL
VSF_SPI_IRQ_MASK_CPL

vsf_spi_mode_t

enum vsf_spi_mode_t

Enumerator
VSF_SPI_MASTER
VSF_SPI_SLAVE
VSF_SPI_DIR_MODE_MASK
VSF_SPI_MODE_0
VSF_SPI_MODE_1
VSF_SPI_MODE_2
VSF_SPI_MODE_3
VSF_SPI_MODE_MASK
VSF_SPI_MSB_FIRST
VSF_SPI_LSB_FIRST
VSF_SPI_BIT_ORDER_MASK
VSF_SPI_DATASIZE_8
VSF_SPI_DATASIZE_9
VSF_SPI_DATASIZE_10
VSF_SPI_DATASIZE_11
VSF_SPI_DATASIZE_12
VSF_SPI_DATASIZE_13
VSF_SPI_DATASIZE_14
VSF_SPI_DATASIZE_15
VSF_SPI_DATASIZE_16
VSF_SPI_DATASIZE_17
VSF_SPI_DATASIZE_18
VSF_SPI_DATASIZE_19
VSF_SPI_DATASIZE_20
VSF_SPI_DATASIZE_21
VSF_SPI_DATASIZE_22
VSF_SPI_DATASIZE_23
VSF_SPI_DATASIZE_24
VSF_SPI_DATASIZE_25
VSF_SPI_DATASIZE_26
VSF_SPI_DATASIZE_27
VSF_SPI_DATASIZE_28
VSF_SPI_DATASIZE_29
VSF_SPI_DATASIZE_30
VSF_SPI_DATASIZE_31
VSF_SPI_DATASIZE_32
VSF_SPI_DATASIZE_MASK
SPI_FULL_DUPLEX
SPI_HALF_DUPLEX
SPI_DUPLEX_MASK
SPI_DATA_INPUT_DIRECTION
SPI_DATA_OUTPUT_DIRECTION
SPI_RECEIVE_ONLY_MODE_DISABLED
SPI_RECEIVE_ONLY_MODE_ENABLED
SPI_AUTO_SLAVE_SELECTION
SPI_AUTO_SLAVE_SELECTION_MSK
SPI_AUTO_SLAVE_SELECTION_DISABLE
SPI_AUTO_SLAVE_SELECTION_ENABLE
VSF_SPI_SLAVE_SELECTION_ACTIVE_LOW
VSF_SPI_SLAVE_SELECTION_ACTIVE_HIGH