VSF Documented
Macros
device.h File Reference
#include "./common.h"
#include "./device_irq.h"
#include "./device_af.h"

Go to the source code of this file.

Macros

#define VSF_DEV_COMMON_SWI_LIST
 
#define VSF_HW_RAM_COUNT   1
 
#define VSF_HW_FLASH_COUNT   1
 
#define VSF_HW_GPIO_PORT_MASK   0x2F
 
#define VSF_HW_GPIO_PIN_COUNT   16
 
#define VSF_HW_GPIO_FUNCTION_MAX   16
 
#define VSF_HW_DMA_COUNT   2
 
#define VSF_HW_DMA_MASK   0x6
 
#define VSF_HW_DMA_CHANNEL_NUM   7
 
#define VSF_HW_DMA1_REG   DMA1
 
#define VSF_HW_DMA1_EN   VSF_HW_EN_DMA1
 
#define VSF_HW_DMA1_RST   VSF_HW_RST_DMA1
 
#define VSF_HW_DMA1_CHANNEL0_IRQN   11
 
#define VSF_HW_DMA1_CHANNEL1_IRQN   12
 
#define VSF_HW_DMA1_CHANNEL2_IRQN   13
 
#define VSF_HW_DMA1_CHANNEL3_IRQN   14
 
#define VSF_HW_DMA1_CHANNEL4_IRQN   15
 
#define VSF_HW_DMA1_CHANNEL5_IRQN   16
 
#define VSF_HW_DMA1_CHANNEL6_IRQN   17
 
#define VSF_HW_DMA2_REG   DMA2
 
#define VSF_HW_DMA2_EN   VSF_HW_EN_DMA2
 
#define VSF_HW_DMA2_RST   VSF_HW_RST_DMA2
 
#define VSF_HW_DMA2_CHANNEL0_IRQN   56
 
#define VSF_HW_DMA2_CHANNEL1_IRQN   57
 
#define VSF_HW_DMA2_CHANNEL2_IRQN   58
 
#define VSF_HW_DMA2_CHANNEL3_IRQN   59
 
#define VSF_HW_DMA2_CHANNEL4_IRQN   60
 
#define VSF_HW_DMA2_CHANNEL5_IRQN   68
 
#define VSF_HW_DMA2_CHANNEL6_IRQN   69
 
#define VSF_HW_EXTI_COUNT   1
 
#define VSF_HW_EXTI_MASK   1
 
#define VSF_HW_EXTI_CHANNEL_COUNT   22
 
#define VSF_HW_EXTI_CHANNEL_MASK   0x77FFFF
 
#define VSF_HW_EXTI_IRQ_NUM   11
 
#define VSF_HW_USART_MASK   0x01FE
 
#define VSF_HW_SPI_MASK   0x0E
 
#define VSF_HW_I2C_MASK   0x0E
 
#define VSF_HW_USB_OTG_MASK   0x03
 
#define USB_DWCOTG_MAX_EP_NUM   16
 
#define VSF_HW_INTERRUPT103   ACC_IRQHandler
 

Macro Definition Documentation

◆ VSF_DEV_COMMON_SWI_LIST

#define VSF_DEV_COMMON_SWI_LIST
Value:
43, 46, 47, 48, 49, 50, 61, 62, \
63, 64, 65, 66, 70, 78, 79, 80, \
84, 86, 87, 88, 89, 90, 91, 93, \
95, 96, 97, 98, 99, 100, 101, 102

◆ VSF_HW_RAM_COUNT

#define VSF_HW_RAM_COUNT   1

◆ VSF_HW_FLASH_COUNT

#define VSF_HW_FLASH_COUNT   1

◆ VSF_HW_GPIO_PORT_MASK

#define VSF_HW_GPIO_PORT_MASK   0x2F

◆ VSF_HW_GPIO_PIN_COUNT

#define VSF_HW_GPIO_PIN_COUNT   16

◆ VSF_HW_GPIO_FUNCTION_MAX

#define VSF_HW_GPIO_FUNCTION_MAX   16

◆ VSF_HW_DMA_COUNT

#define VSF_HW_DMA_COUNT   2

◆ VSF_HW_DMA_MASK

#define VSF_HW_DMA_MASK   0x6

◆ VSF_HW_DMA_CHANNEL_NUM

#define VSF_HW_DMA_CHANNEL_NUM   7

◆ VSF_HW_DMA1_REG

#define VSF_HW_DMA1_REG   DMA1

◆ VSF_HW_DMA1_EN

#define VSF_HW_DMA1_EN   VSF_HW_EN_DMA1

◆ VSF_HW_DMA1_RST

#define VSF_HW_DMA1_RST   VSF_HW_RST_DMA1

◆ VSF_HW_DMA1_CHANNEL0_IRQN

#define VSF_HW_DMA1_CHANNEL0_IRQN   11

◆ VSF_HW_DMA1_CHANNEL1_IRQN

#define VSF_HW_DMA1_CHANNEL1_IRQN   12

◆ VSF_HW_DMA1_CHANNEL2_IRQN

#define VSF_HW_DMA1_CHANNEL2_IRQN   13

◆ VSF_HW_DMA1_CHANNEL3_IRQN

#define VSF_HW_DMA1_CHANNEL3_IRQN   14

◆ VSF_HW_DMA1_CHANNEL4_IRQN

#define VSF_HW_DMA1_CHANNEL4_IRQN   15

◆ VSF_HW_DMA1_CHANNEL5_IRQN

#define VSF_HW_DMA1_CHANNEL5_IRQN   16

◆ VSF_HW_DMA1_CHANNEL6_IRQN

#define VSF_HW_DMA1_CHANNEL6_IRQN   17

◆ VSF_HW_DMA2_REG

#define VSF_HW_DMA2_REG   DMA2

◆ VSF_HW_DMA2_EN

#define VSF_HW_DMA2_EN   VSF_HW_EN_DMA2

◆ VSF_HW_DMA2_RST

#define VSF_HW_DMA2_RST   VSF_HW_RST_DMA2

◆ VSF_HW_DMA2_CHANNEL0_IRQN

#define VSF_HW_DMA2_CHANNEL0_IRQN   56

◆ VSF_HW_DMA2_CHANNEL1_IRQN

#define VSF_HW_DMA2_CHANNEL1_IRQN   57

◆ VSF_HW_DMA2_CHANNEL2_IRQN

#define VSF_HW_DMA2_CHANNEL2_IRQN   58

◆ VSF_HW_DMA2_CHANNEL3_IRQN

#define VSF_HW_DMA2_CHANNEL3_IRQN   59

◆ VSF_HW_DMA2_CHANNEL4_IRQN

#define VSF_HW_DMA2_CHANNEL4_IRQN   60

◆ VSF_HW_DMA2_CHANNEL5_IRQN

#define VSF_HW_DMA2_CHANNEL5_IRQN   68

◆ VSF_HW_DMA2_CHANNEL6_IRQN

#define VSF_HW_DMA2_CHANNEL6_IRQN   69

◆ VSF_HW_EXTI_COUNT

#define VSF_HW_EXTI_COUNT   1

◆ VSF_HW_EXTI_MASK

#define VSF_HW_EXTI_MASK   1

◆ VSF_HW_EXTI_CHANNEL_COUNT

#define VSF_HW_EXTI_CHANNEL_COUNT   22

◆ VSF_HW_EXTI_CHANNEL_MASK

#define VSF_HW_EXTI_CHANNEL_MASK   0x77FFFF

◆ VSF_HW_EXTI_IRQ_NUM

#define VSF_HW_EXTI_IRQ_NUM   11

◆ VSF_HW_USART_MASK

#define VSF_HW_USART_MASK   0x01FE

◆ VSF_HW_SPI_MASK

#define VSF_HW_SPI_MASK   0x0E

◆ VSF_HW_I2C_MASK

#define VSF_HW_I2C_MASK   0x0E

◆ VSF_HW_USB_OTG_MASK

#define VSF_HW_USB_OTG_MASK   0x03

◆ USB_DWCOTG_MAX_EP_NUM

#define USB_DWCOTG_MAX_EP_NUM   16

◆ VSF_HW_INTERRUPT103

#define VSF_HW_INTERRUPT103   ACC_IRQHandler
Generated from commit: vsfteam/vsf@8634e61