VSF Documented
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Go to the source code of this file.
Data Structures | |
struct | io_wakeup_cfg_t |
struct | vsf_pm_mclk_cfg_t |
main clock config struct More... | |
Macros | |
#define | __SYSTEM_FREQ VSF_SYSTIMER_FREQ |
#define | __PLL_FREQ_HZ __SYSTEM_FREQ |
#define | GPIO_COUNT 7 |
#define | PIO0 |
#define | PIO0_PIN_NUM 8 |
#define | PIO1 |
#define | PIO1_PIN_NUM 8 |
#define | PIO2 |
#define | PIO2_PIN_NUM 8 |
#define | PIO3 |
#define | PIO3_PIN_NUM 8 |
#define | PIO4 |
#define | PIO4_PIN_NUM 8 |
#define | PIO5 |
#define | PIO5_PIN_NUM 8 |
#define | PIO6 |
#define | PIO6_PIN_NUM 8 |
#define | DMA_COUNT 1 |
#define | DMA_CHANNEL_COUNT 4 |
#define | DMA_CHANNEL_MAX_TRANS_SIZES 1023, 511, 255, 255 |
#define | USART_MAX_PORT 1 |
#define | USART0_TX_DMA 0 |
#define | USART0_RX_DMA 1 |
#define | USART1_TX_DMA 2 |
#define | USART1_RX_DMA 3 |
#define | USB_OTG_COUNT 1 |
#define | USB_OTG0_IRQHandler USB_IRQHandler |
#define | USB_OTG0_EP_NUMBER 8 |
#define | USB_OTG0_CONFIG |
#define | __def_idx(__name, __no) VSF_MCONNECT2(__name, _IDX) = (__no) |
#define | __def_msk(__name) VSF_MCONNECT2(__name, _MSK) = BIT(VSF_MCONNECT2(__name, _IDX) & 0x1F) |
#define | __def_clk_idx(__name, __clksel, __clkdiv, __clkref) |
Typedefs | |
typedef struct io_wakeup_cfg_t | io_wakeup_cfg_t |
typedef enum vsf_io_port_no_t | vsf_io_port_no_t |
typedef enum vsf_pm_clk_src_sel_t | vsf_pm_clk_src_sel_t |
Enumerations | |
enum | vsf_pm_pll_sel_t { PLL_IDX , PLL_USB_IDX } |
power set index | |
enum | vsf_pm_power_cfg_no_t { __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) } |
power set mask | |
enum | vsf_pm_power_cfg_msk_t { __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) } |
the lowpower mode | |
enum | vsf_pm_sleep_mode_t { VSF_PM_SLEEP = 1 << 8 , VSF_PM_DPD = 1 << 1 , VSF_PM_WAIT = VSF_PM_SLEEP , VSF_PM_DEEP_SLEEP = VSF_PM_DPD , VSF_PM_POWER_OFF = VSF_PM_DPD } |
peripheral async clock index | |
enum | vsf_pm_pclk_no_t { __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) , __def_clk_idx =( PCLK_USB, 0x18, 0, 0x0F) } |
Peripheral Sync Clock Macros | |
enum | vsf_pm_sclk_no_t { __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) , __def_idx =(POWER_12MIRC, 0) } |
enum | vsf_pm_sclk_msk_t { __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) , __def_msk =(POWER_12MIRC) } |
enum | vsf_pm_clk_src_sel_t { CLKSRC_12MIRC = 0 , CLKSRC_PLL = 1 , CLKSRC_12MOSC = 2 , CLKSRC_10KIRC = 3 , CLKREF_12MIRC = 0 , CLKREF_12MOSC = 1 , MAINCLK_CLKSRC_12MIRC = CLKSRC_12MIRC , MAINCLK_CLKSRC_PLL = CLKSRC_PLL , MAINCLK_CLKSRC_12MOSC = CLKSRC_12MOSC , MAINCLK_CLKSRC_10KIRC = CLKSRC_10KIRC , USART_CLKSRC_12MIRC = CLKSRC_12MIRC , USART_CLKSRC_PLL = CLKSRC_PLL , USART_CLKSRC_12MOSC = CLKSRC_12MOSC , USART_CLKSRC_10KIRC = CLKSRC_10KIRC , USB_CLKSRC_12MIRC = CLKREF_12MIRC , USB_CLKSRC_12MOSC = CLKREF_12MOSC , OUTCLK_CLKSRC_12MIRC = 0 , OUTCLK_CLKSRC_PLL = 1 , OUTCLK_CLKSRC_10KIRC = 2 , OUTCLK_CLKSRC_12MOSC = 3 , OUTCLK_CLKSRC_32KOSC = 4 , OUTCLK_CLKSRC_USB_PLL = 8 } |
Functions | |
def_interface (i_pm_wakeup_t) struct | |
end_def_interface (i_pm_wakeup_t) struct vsf_pm_pclk_cfg_t | |
Variables | |
UseIO | |
#define __SYSTEM_FREQ VSF_SYSTIMER_FREQ |
#define __PLL_FREQ_HZ __SYSTEM_FREQ |
#define GPIO_COUNT 7 |
#define PIO0 |
#define PIO0_PIN_NUM 8 |
#define PIO1 |
#define PIO1_PIN_NUM 8 |
#define PIO2 |
#define PIO2_PIN_NUM 8 |
#define PIO3 |
#define PIO3_PIN_NUM 8 |
#define PIO4 |
#define PIO4_PIN_NUM 8 |
#define PIO5 |
#define PIO5_PIN_NUM 8 |
#define PIO6 |
#define PIO6_PIN_NUM 8 |
#define DMA_COUNT 1 |
#define DMA_CHANNEL_COUNT 4 |
#define DMA_CHANNEL_MAX_TRANS_SIZES 1023, 511, 255, 255 |
#define USART_MAX_PORT 1 |
#define USART0_TX_DMA 0 |
#define USART0_RX_DMA 1 |
#define USART1_TX_DMA 2 |
#define USART1_RX_DMA 3 |
#define USB_OTG_COUNT 1 |
#define USB_OTG0_IRQHandler USB_IRQHandler |
#define USB_OTG0_EP_NUMBER 8 |
#define USB_OTG0_CONFIG |
#define __def_idx | ( | __name, | |
__no | |||
) | VSF_MCONNECT2(__name, _IDX) = (__no) |
#define __def_msk | ( | __name | ) | VSF_MCONNECT2(__name, _MSK) = BIT(VSF_MCONNECT2(__name, _IDX) & 0x1F) |
#define __def_clk_idx | ( | __name, | |
__clksel, | |||
__clkdiv, | |||
__clkref | |||
) |
typedef struct io_wakeup_cfg_t io_wakeup_cfg_t |
typedef enum vsf_io_port_no_t vsf_io_port_no_t |
typedef enum vsf_pm_clk_src_sel_t vsf_pm_clk_src_sel_t |
enum vsf_pm_sleep_mode_t |
enum vsf_pm_pclk_no_t |
enum vsf_pm_sclk_no_t |
enum vsf_pm_sclk_msk_t |
enum vsf_pm_clk_src_sel_t |
enum vsf_pm_pll_sel_t |
def_interface | ( | i_pm_wakeup_t | ) |
end_def_interface | ( | i_pm_wakeup_t | ) |
UseIO |