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VSF Documented
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#include <f1c100s_reg.h>
Data Fields | ||
| reg32_t | CTRL | |
| reg32_t | INT_REG0 | |
| reg32_t | INT_REG1 | |
| reg32_t | FRM_CTRL | |
| union { | ||
| struct { | ||
| reg32_t FRM_SEED0_R | ||
| reg32_t FRM_SEED0_G | ||
| reg32_t FRM_SEED0_B | ||
| reg32_t FRM_SEED1_R | ||
| reg32_t FRM_SEED1_G | ||
| reg32_t FRM_SEED1_B | ||
| } | ||
| reg32_t FRM_SEED [6] | ||
| }; | ||
| union { | ||
| struct { | ||
| reg32_t FRM_TBL0 | ||
| reg32_t FRM_TBL1 | ||
| reg32_t FRM_TBL2 | ||
| reg32_t FRM_TBL3 | ||
| } | ||
| reg32_t FRM_TBL [4] | ||
| }; | ||
| struct { | ||
| reg32_t CTRL | ||
| reg32_t CLK_CTRL | ||
| reg32_t BASIC_TIMING0 | ||
| reg32_t BASIC_TIMING1 | ||
| reg32_t BASIC_TIMING2 | ||
| reg32_t BASIC_TIMING3 | ||
| reg32_t HV_TIMING | ||
| reg32_t CPU_IF | ||
| reg32_t CPU_WR | ||
| reg32_t CPU_RD | ||
| reg32_t CPU_RD_NX | ||
| reg32_t IO_CTRL0 | ||
| reg32_t IO_CTRL1 | ||
| } | TCON0 | |
| struct { | ||
| reg32_t CTRL | ||
| reg32_t BASIC0 | ||
| reg32_t BASIC1 | ||
| reg32_t BASIC2 | ||
| reg32_t BASIC3 | ||
| reg32_t BASIC4 | ||
| reg32_t BASIC5 | ||
| reg32_t IO_CTRL0 | ||
| reg32_t IO_CTRL1 | ||
| } | TCON1 | |
| reg32_t | DEBUG_INFO | |
| reg32_t tcon_reg_t::CTRL |
| reg32_t tcon_reg_t::INT_REG0 |
| reg32_t tcon_reg_t::INT_REG1 |
| reg32_t tcon_reg_t::FRM_CTRL |
| reg32_t tcon_reg_t::FRM_SEED0_R |
| reg32_t tcon_reg_t::FRM_SEED0_G |
| reg32_t tcon_reg_t::FRM_SEED0_B |
| reg32_t tcon_reg_t::FRM_SEED1_R |
| reg32_t tcon_reg_t::FRM_SEED1_G |
| reg32_t tcon_reg_t::FRM_SEED1_B |
| reg32_t tcon_reg_t::FRM_SEED[6] |
| union { ... } tcon_reg_t |
| reg32_t tcon_reg_t::FRM_TBL0 |
| reg32_t tcon_reg_t::FRM_TBL1 |
| reg32_t tcon_reg_t::FRM_TBL2 |
| reg32_t tcon_reg_t::FRM_TBL3 |
| reg32_t tcon_reg_t::FRM_TBL[4] |
| union { ... } tcon_reg_t |
| reg32_t tcon_reg_t::CLK_CTRL |
| reg32_t tcon_reg_t::BASIC_TIMING0 |
| reg32_t tcon_reg_t::BASIC_TIMING1 |
| reg32_t tcon_reg_t::BASIC_TIMING2 |
| reg32_t tcon_reg_t::BASIC_TIMING3 |
| reg32_t tcon_reg_t::HV_TIMING |
| reg32_t tcon_reg_t::CPU_IF |
| reg32_t tcon_reg_t::CPU_WR |
| reg32_t tcon_reg_t::CPU_RD |
| reg32_t tcon_reg_t::CPU_RD_NX |
| reg32_t tcon_reg_t::IO_CTRL0 |
| reg32_t tcon_reg_t::IO_CTRL1 |
| struct { ... } tcon_reg_t::TCON0 |
| reg32_t tcon_reg_t::BASIC0 |
| reg32_t tcon_reg_t::BASIC1 |
| reg32_t tcon_reg_t::BASIC2 |
| reg32_t tcon_reg_t::BASIC3 |
| reg32_t tcon_reg_t::BASIC4 |
| reg32_t tcon_reg_t::BASIC5 |
| struct { ... } tcon_reg_t::TCON1 |
| reg32_t tcon_reg_t::DEBUG_INFO |
1.9.8