uart_reg_t Struct Reference

#include <i_reg_uart.h>

Public Member Functions
	DEF_UART_REG (DFMTCFG, 32, __IOM reg32_t DLS :2;__IOM reg32_t STOP :1;__IOM reg32_t PEN :1;__IOM reg32_t EPS :1;reg32_t :1;__IOM reg32_t BRK :1;__IOM reg32_t DIVAE :1;__IOM reg32_t DIVMS :1;reg32_t :23;)
	DEF_UART_REG (MDMCFG, 32, __IOM reg32_t DTR :1;__IOM reg32_t RTS :1;__IOM reg32_t OUT1 :1;__IOM reg32_t OUT2 :1;__IOM reg32_t LOOPBACK :1;__IOM reg32_t AFCE :1;__IOM reg32_t SIRE :1;__IOM reg32_t AUTO_DET :1;__IOM reg32_t CLK_P :1;reg32_t :23;)
	DEF_UART_REG (IRQSTS, 32, __IM reg32_t DR :1;__IM reg32_t OE :1;reg32_t :1;reg32_t :1;reg32_t :1;__IM reg32_t THRE :1;__IM reg32_t TEMT :1;__IM reg32_t RFE :1;__IM reg32_t RTDR :1;reg32_t :23;)
	DEF_UART_REG (MDMSTS, 32, __IM reg32_t MDMSTS :32;)
REG_RSVD_U32	DEF_UART_REG (DBUFSTS, 32, __IM reg32_t TX_COUNT :8;reg32_t :1;__IM reg32_t RX_COUNT :8;reg32_t :1;__IM reg32_t TX_DBUF_EMPTY :1;__IM reg32_t TX_DBUF_FULL :1;__IM reg32_t RX_DBUF_EMPTY :1;__IM reg32_t RX_DBUF_FULL :1;reg32_t :10;)
	DEF_UART_REG (DBUFTH, 32, __IOM reg32_t RXTRIGTH :8;reg32_t :1;__IOM reg32_t TXTRIGTH :8;reg32_t :15;)
	DEF_UART_REG (DIV2, 32, __IOM reg32_t DIV2 :8;reg32_t :24;)

Data Fields
union {
__IM reg32_t   BASE_ADDR
};
union {
};
union {
};
union {
reg32_t   RBR
reg32_t   THR
reg32_t   DLL
};
union {
reg32_t   DLH
reg32_t   IER
};
union {
reg32_t   IIR
reg32_t   FCR
};
reg32_t	LCR
reg32_t	MCR
reg32_t	LSR
reg32_t	MSR
reg32_t	SCH
reg32_t	USR
reg32_t	TFL
reg32_t	RFL
reg32_t	HALT

Member Function Documentation

DEF_UART_REG() [1/7]

uart_reg_t::DEF_UART_REG	(	DFMTCFG	,
		32	,
		__IOM reg32_t DLS :2;__IOM reg32_t STOP :1;__IOM reg32_t PEN :1;__IOM reg32_t EPS :1;reg32_t :1;__IOM reg32_t BRK :1;__IOM reg32_t DIVAE :1;__IOM reg32_t DIVMS :1;reg32_t :23;
	)

DEF_UART_REG() [2/7]

uart_reg_t::DEF_UART_REG	(	MDMCFG	,
		32	,
		__IOM reg32_t DTR :1;__IOM reg32_t RTS :1;__IOM reg32_t OUT1 :1;__IOM reg32_t OUT2 :1;__IOM reg32_t LOOPBACK :1;__IOM reg32_t AFCE :1;__IOM reg32_t SIRE :1;__IOM reg32_t AUTO_DET :1;__IOM reg32_t CLK_P :1;reg32_t :23;
	)

DEF_UART_REG() [3/7]

uart_reg_t::DEF_UART_REG	(	IRQSTS	,
		32	,
		__IM reg32_t DR :1;__IM reg32_t OE :1;reg32_t :1;reg32_t :1;reg32_t :1;__IM reg32_t THRE :1;__IM reg32_t TEMT :1;__IM reg32_t RFE :1;__IM reg32_t RTDR :1;reg32_t :23;
	)

DEF_UART_REG() [4/7]

uart_reg_t::DEF_UART_REG	(	MDMSTS	,
		32	,
		__IM reg32_t MDMSTS :32;
	)

DEF_UART_REG() [5/7]

REG_RSVD_U32 uart_reg_t::DEF_UART_REG	(	DBUFSTS	,
		32	,
		__IM reg32_t TX_COUNT :8;reg32_t :1;__IM reg32_t RX_COUNT :8;reg32_t :1;__IM reg32_t TX_DBUF_EMPTY :1;__IM reg32_t TX_DBUF_FULL :1;__IM reg32_t RX_DBUF_EMPTY :1;__IM reg32_t RX_DBUF_FULL :1;reg32_t :10;
	)

DEF_UART_REG() [6/7]

uart_reg_t::DEF_UART_REG	(	DBUFTH	,
		32	,
		__IOM reg32_t RXTRIGTH :8;reg32_t :1;__IOM reg32_t TXTRIGTH :8;reg32_t :15;
	)

DEF_UART_REG() [7/7]

uart_reg_t::DEF_UART_REG	(	DIV2	,
		32	,
		__IOM reg32_t DIV2 :8;reg32_t :24;
	)

Field Documentation

BASE_ADDR

__IM reg32_t uart_reg_t::BASE_ADDR

[union]

union { ... } uart_reg_t

[union]

union { ... } uart_reg_t

[union]

union { ... } uart_reg_t

RBR

reg32_t uart_reg_t::RBR

THR

reg32_t uart_reg_t::THR

DLL

reg32_t uart_reg_t::DLL

[union]

union { ... } uart_reg_t

DLH

reg32_t uart_reg_t::DLH

IER

reg32_t uart_reg_t::IER

[union]

union { ... } uart_reg_t

IIR

reg32_t uart_reg_t::IIR

FCR

reg32_t uart_reg_t::FCR

[union]

union { ... } uart_reg_t

LCR

reg32_t uart_reg_t::LCR

MCR

reg32_t uart_reg_t::MCR

LSR

reg32_t uart_reg_t::LSR

MSR

reg32_t uart_reg_t::MSR

SCH

reg32_t uart_reg_t::SCH

USR

reg32_t uart_reg_t::USR

TFL

reg32_t uart_reg_t::TFL

RFL

reg32_t uart_reg_t::RFL

HALT

reg32_t uart_reg_t::HALT