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VSF Documented
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#include "./utilities/compiler/__common/__type.h"Go to the source code of this file.
Data Structures | |
| struct | uart_reg_t |
Macros | |
| #define | __AIC8800_UART_USE_BIT_FIELD ENABLED |
| #define | __IM const |
| #define | __OM |
| #define | __IOM |
| #define | TXRXD_REG TXRXD.VALUE |
| #define | DIV0_REG DIV0.VALUE |
| #define | IRQCTL_REG IRQCTL.VALUE |
| #define | DIV1_REG DIV1.VALUE |
| #define | IRQTYP_REG IRQTYP.VALUE |
| #define | DBUFCFG_REG DBUFCFG.VALUE |
| #define | DFMTCFG_REG DFMTCFG.VALUE |
| #define | MDMCFG_REG MDMCFG.VALUE |
| #define | IRQSTS_REG IRQSTS.VALUE |
| #define | MDMSTS_REG MDMSTS.VALUE |
| #define | DBUFSTS_REG DBUFSTS.VALUE |
| #define | DBUFTH_REG DBUFTH.VALUE |
| #define | DIV2_REG DIV2.VALUE |
| #define | UART_RXDATA 0 /* 0x000000FF */ |
| #define | UART_RXDATA_MSK ((reg32_t)(0xff << UART_RXDATA)) |
| #define | UART_TXDATA 0 /* 0x000000FF */ |
| #define | UART_TXDATA_MSK ((reg32_t)(0xff << UART_TXDATA)) |
| #define | UART_DIV0 0 /* 0x000000FF */ |
| #define | UART_DIV0_MSK ((reg32_t)(0xff << UART_DIV0)) |
| #define | UART_PTIRQEN 7 /* 0x00000080 */ |
| #define | UART_PTIRQEN_MSK ((reg32_t)(0x1 << UART_PTIRQEN)) |
| #define | UART_MSIRQEN 3 /* 0x00000008 */ |
| #define | UART_MSIRQEN_MSK ((reg32_t)(0x1 << UART_MSIRQEN)) |
| #define | UART_LSIRQEN 2 /* 0x00000004 */ |
| #define | UART_LSIRQEN_MSK ((reg32_t)(0x1 << UART_LSIRQEN)) |
| #define | UART_TXIRQEN 1 /* 0x00000002 */ |
| #define | UART_TXIRQEN_MSK ((reg32_t)(0x1 << UART_TXIRQEN)) |
| #define | UART_RXIRQEN 0 /* 0x00000001 */ |
| #define | UART_RXIRQEN_MSK ((reg32_t)(0x1 << UART_RXIRQEN)) |
| #define | UART_DIV1 0 /* 0x000000FF */ |
| #define | UART_DIV1_MSK ((reg32_t)(0xff << UART_DIV1)) |
| #define | UART_IRQTYP 0 /* 0x0000000F */ |
| #define | UART_IRQTYP_MSK ((reg32_t)(0xf << UART_IRQTYP)) |
| #define | UART_IRQTYP_MODEM_INT 0x00 |
| #define | UART_IRQTYP_NO_INT 0x01 |
| #define | UART_IRQTYP_TX_INT 0x02 |
| #define | UART_IRQTYP_RX_INT 0x04 |
| #define | UART_IRQTYP_RX_ERROR_INT 0x06 |
| #define | UART_IRQTYP_TIMEOUT_INT 0x0c |
| #define | UART_TXDRST 2 /* 0x00000004 */ |
| #define | UART_TXDRST_MSK ((reg32_t)(0x1 << UART_TXDRST)) |
| #define | UART_RXDRST 1 /* 0x00000002 */ |
| #define | UART_RXDRST_MSK ((reg32_t)(0x1 << UART_RXDRST)) |
| #define | UART_DBUFEN 0 /* 0x00000001 */ |
| #define | UART_DBUFEN_MSK ((reg32_t)(0x1 << UART_DBUFEN)) |
| #define | UART_DIVMS 8 /* 0x00000100 */ |
| #define | UART1_DIVMS_MSK ((reg32_t)(0x1 << UART_DIVMS)) |
| #define | UART_DIVAE 7 /* 0x00000080 */ |
| #define | UART_DIVAE_MSK ((reg32_t)(0x1 << UART_DIVAE)) |
| #define | UART_BRK 6 /* 0x00000040 */ |
| #define | UART_BRK_MSK ((reg32_t)(0x1 << UART_BRK)) |
| #define | UART_EPS 4 /* 0x00000010 */ |
| #define | UART_EPS_MSK ((reg32_t)(0x1 << UART_EPS)) |
| #define | UART_PEN 3 /* 0x00000008 */ |
| #define | UART_PEN_MSK ((reg32_t)(0x1 << UART_PEN)) |
| #define | UART_STOP 2 /* 0x00000004 */ |
| #define | UART_STOP_MSK ((reg32_t)(0x1 << UART_STOP)) |
| #define | UART_DLS 0 /* 0x00000003 */ |
| #define | UART_DLS_MSK ((reg32_t)(0x3 << UART_DLS)) |
| #define | UART_CLK_P 8 /* 0x00000100 */ |
| #define | UART_CLK_P_MSK ((reg32_t)(0x1 << UART_CLK_P)) |
| #define | UART_AUTO_DET 7 /* 0x00000080 */ |
| #define | UART_AUTO_DET_MSK ((reg32_t)(0x1 << UART_AUTO_DET)) |
| #define | UART_SIRE 6 /* 0x00000040 */ |
| #define | UART_SIRE_MSK ((reg32_t)(0x1 << UART_SIRE)) |
| #define | UART_AFCE 5 /* 0x00000020 */ |
| #define | UART_AFCE_MSK ((reg32_t)(0x1 << UART_AFCE)) |
| #define | UART_LOOPBACK 4 /* 0x00000010 */ |
| #define | UART_LOOPBACK_MSK ((reg32_t)(0x1 << UART_LOOPBACK)) |
| #define | UART_OUT2 3 /* 0x00000008 */ |
| #define | UART_OUT2_MSK ((reg32_t)(0x1 << UART_OUT2)) |
| #define | UART_OUT1 2 /* 0x00000004 */ |
| #define | UART_OUT1_MSK ((reg32_t)(0x1 << UART_OUT1)) |
| #define | UART_RTS 1 /* 0x00000002 */ |
| #define | UART_RTS_MSK ((reg32_t)(0x1 << UART_RTS)) |
| #define | UART_DTR 0 /* 0x00000001 */ |
| #define | UART_DTR_MSK ((reg32_t)(0x1 << UART_DTR)) |
| #define | UART_RTDR 8 /* 0x00000100 */ |
| #define | UART_RTDR_MSK ((reg32_t)(0x1 << UART_RTDR)) |
| #define | UART_RFE 7 /* 0x00000080 */ |
| #define | UART_RFE_MSK ((reg32_t)(0x1 << UART_RFE)) |
| #define | UART_TEMT 6 /* 0x00000040 */ |
| #define | UART_TEMT_MSK ((reg32_t)(0x1 << UART_TEMT)) |
| #define | UART_THRE 5 /* 0x00000020 */ |
| #define | UART_THRE_MSK ((reg32_t)(0x1 << UART_THRE)) |
| #define | UART_OE 1 /* 0x00000002 */ |
| #define | UART_OE_MSK ((reg32_t)(0x1 << UART_OE)) |
| #define | UART_DR 0 /* 0x00000001 */ |
| #define | UART_DR_MSK ((reg32_t)(0x1 << UART_DR)) |
| #define | UART_RX_DBUF_FULL 21 /* 0x00200000 */ |
| #define | UART_RX_DBUF_FULL_MSK ((reg32_t)(0x1 << UART_RX_DBUF_FULL)) |
| #define | UART_RX_DBUF_EMPTY 20 /* 0x00100000 */ |
| #define | UART_RX_DBUF_EMPTY_MSK ((reg32_t)(0x1 << UART_RX_DBUF_EMPTY)) |
| #define | UART_TX_DBUF_FULL 19 /* 0x00080000 */ |
| #define | UART_TX_DBUF_FULL_MSK ((reg32_t)(0x1 << UART_TX_DBUF_FULL)) |
| #define | UART_TX_DBUF_EMPTY 18 /* 0x00040000 */ |
| #define | UART_TX_DBUF_EMPTY_MSK ((reg32_t)(0x1 << UART_TX_DBUF_EMPTY)) |
| #define | UART_RX_COUNT 9 /* 0x0001FE00 */ |
| #define | UART_RX_COUNT_MSK ((reg32_t)(0xFF << UART_RX_COUNT)) |
| #define | UART_TX_COUNT 0 /* 0x000000FF */ |
| #define | UART_TX_COUNT_MSK ((reg32_t)(0xff << UART_TX_COUNT)) |
| #define | UART_TXTRIGTH 8 /* 0x0001FE00 */ |
| #define | UART_TXTRIGTH_MSK ((reg32_t)(0x1fe << UART_TXTRIGTH)) |
| #define | UART_RXTRIGTH 0 /* 0x000000FF */ |
| #define | UART_RXTRIGTH_MSK ((reg32_t)(0xff << UART_RXTRIGTH)) |
| #define | UART_DIV2 0 /* 0x000000FF */ |
| #define | UART_DIV2_MSK ((reg32_t)(0xff << UART_DIV2)) |
| #define | DEF_UART_REG(__NAME, __TOTAL_SIZE, ...) |
Typedefs | |
| typedef struct uart_reg_t | uart_reg_t |
| #define __AIC8800_UART_USE_BIT_FIELD ENABLED |
| #define __IM const |
| #define __OM |
| #define __IOM |
| #define TXRXD_REG TXRXD.VALUE |
| #define DIV0_REG DIV0.VALUE |
| #define IRQCTL_REG IRQCTL.VALUE |
| #define DIV1_REG DIV1.VALUE |
| #define IRQTYP_REG IRQTYP.VALUE |
| #define DBUFCFG_REG DBUFCFG.VALUE |
| #define DFMTCFG_REG DFMTCFG.VALUE |
| #define MDMCFG_REG MDMCFG.VALUE |
| #define IRQSTS_REG IRQSTS.VALUE |
| #define MDMSTS_REG MDMSTS.VALUE |
| #define DBUFSTS_REG DBUFSTS.VALUE |
| #define DBUFTH_REG DBUFTH.VALUE |
| #define DIV2_REG DIV2.VALUE |
| #define UART_RXDATA 0 /* 0x000000FF */ |
| #define UART_RXDATA_MSK ((reg32_t)(0xff << UART_RXDATA)) |
| #define UART_TXDATA 0 /* 0x000000FF */ |
| #define UART_TXDATA_MSK ((reg32_t)(0xff << UART_TXDATA)) |
| #define UART_DIV0 0 /* 0x000000FF */ |
| #define UART_PTIRQEN 7 /* 0x00000080 */ |
| #define UART_PTIRQEN_MSK ((reg32_t)(0x1 << UART_PTIRQEN)) |
| #define UART_MSIRQEN 3 /* 0x00000008 */ |
| #define UART_MSIRQEN_MSK ((reg32_t)(0x1 << UART_MSIRQEN)) |
| #define UART_LSIRQEN 2 /* 0x00000004 */ |
| #define UART_LSIRQEN_MSK ((reg32_t)(0x1 << UART_LSIRQEN)) |
| #define UART_TXIRQEN 1 /* 0x00000002 */ |
| #define UART_TXIRQEN_MSK ((reg32_t)(0x1 << UART_TXIRQEN)) |
| #define UART_RXIRQEN 0 /* 0x00000001 */ |
| #define UART_RXIRQEN_MSK ((reg32_t)(0x1 << UART_RXIRQEN)) |
| #define UART_DIV1 0 /* 0x000000FF */ |
| #define UART_IRQTYP 0 /* 0x0000000F */ |
| #define UART_IRQTYP_MSK ((reg32_t)(0xf << UART_IRQTYP)) |
| #define UART_IRQTYP_MODEM_INT 0x00 |
| #define UART_IRQTYP_NO_INT 0x01 |
| #define UART_IRQTYP_TX_INT 0x02 |
| #define UART_IRQTYP_RX_INT 0x04 |
| #define UART_IRQTYP_RX_ERROR_INT 0x06 |
| #define UART_IRQTYP_TIMEOUT_INT 0x0c |
| #define UART_TXDRST 2 /* 0x00000004 */ |
| #define UART_TXDRST_MSK ((reg32_t)(0x1 << UART_TXDRST)) |
| #define UART_RXDRST 1 /* 0x00000002 */ |
| #define UART_RXDRST_MSK ((reg32_t)(0x1 << UART_RXDRST)) |
| #define UART_DBUFEN 0 /* 0x00000001 */ |
| #define UART_DBUFEN_MSK ((reg32_t)(0x1 << UART_DBUFEN)) |
| #define UART_DIVMS 8 /* 0x00000100 */ |
| #define UART1_DIVMS_MSK ((reg32_t)(0x1 << UART_DIVMS)) |
| #define UART_DIVAE 7 /* 0x00000080 */ |
| #define UART_DIVAE_MSK ((reg32_t)(0x1 << UART_DIVAE)) |
| #define UART_BRK 6 /* 0x00000040 */ |
| #define UART_EPS 4 /* 0x00000010 */ |
| #define UART_PEN 3 /* 0x00000008 */ |
| #define UART_STOP 2 /* 0x00000004 */ |
| #define UART_DLS 0 /* 0x00000003 */ |
| #define UART_CLK_P 8 /* 0x00000100 */ |
| #define UART_CLK_P_MSK ((reg32_t)(0x1 << UART_CLK_P)) |
| #define UART_AUTO_DET 7 /* 0x00000080 */ |
| #define UART_AUTO_DET_MSK ((reg32_t)(0x1 << UART_AUTO_DET)) |
| #define UART_SIRE 6 /* 0x00000040 */ |
| #define UART_AFCE 5 /* 0x00000020 */ |
| #define UART_LOOPBACK 4 /* 0x00000010 */ |
| #define UART_LOOPBACK_MSK ((reg32_t)(0x1 << UART_LOOPBACK)) |
| #define UART_OUT2 3 /* 0x00000008 */ |
| #define UART_OUT1 2 /* 0x00000004 */ |
| #define UART_RTS 1 /* 0x00000002 */ |
| #define UART_DTR 0 /* 0x00000001 */ |
| #define UART_RTDR 8 /* 0x00000100 */ |
| #define UART_RFE 7 /* 0x00000080 */ |
| #define UART_TEMT 6 /* 0x00000040 */ |
| #define UART_THRE 5 /* 0x00000020 */ |
| #define UART_OE 1 /* 0x00000002 */ |
| #define UART_DR 0 /* 0x00000001 */ |
| #define UART_RX_DBUF_FULL 21 /* 0x00200000 */ |
| #define UART_RX_DBUF_FULL_MSK ((reg32_t)(0x1 << UART_RX_DBUF_FULL)) |
| #define UART_RX_DBUF_EMPTY 20 /* 0x00100000 */ |
| #define UART_RX_DBUF_EMPTY_MSK ((reg32_t)(0x1 << UART_RX_DBUF_EMPTY)) |
| #define UART_TX_DBUF_FULL 19 /* 0x00080000 */ |
| #define UART_TX_DBUF_FULL_MSK ((reg32_t)(0x1 << UART_TX_DBUF_FULL)) |
| #define UART_TX_DBUF_EMPTY 18 /* 0x00040000 */ |
| #define UART_TX_DBUF_EMPTY_MSK ((reg32_t)(0x1 << UART_TX_DBUF_EMPTY)) |
| #define UART_RX_COUNT 9 /* 0x0001FE00 */ |
| #define UART_RX_COUNT_MSK ((reg32_t)(0xFF << UART_RX_COUNT)) |
| #define UART_TX_COUNT 0 /* 0x000000FF */ |
| #define UART_TX_COUNT_MSK ((reg32_t)(0xff << UART_TX_COUNT)) |
| #define UART_TXTRIGTH 8 /* 0x0001FE00 */ |
| #define UART_TXTRIGTH_MSK ((reg32_t)(0x1fe << UART_TXTRIGTH)) |
| #define UART_RXTRIGTH 0 /* 0x000000FF */ |
| #define UART_RXTRIGTH_MSK ((reg32_t)(0xff << UART_RXTRIGTH)) |
| #define UART_DIV2 0 /* 0x000000FF */ |
| #define DEF_UART_REG | ( | __NAME, | |
| __TOTAL_SIZE, | |||
| ... | |||
| ) |
| typedef struct uart_reg_t uart_reg_t |