18#ifndef __HAL_DRIVER_${SERIES/SPI_IP}_SPI_H__
19#define __HAL_DRIVER_${SERIES/SPI_IP}_SPI_H__
25#if VSF_HAL_USE_SPI == ENABLED
44#if defined(__VSF_HAL_${SPI_IP}_SPI_CLASS_IMPLEMENT)
45# define __VSF_CLASS_IMPLEMENT__
46#elif defined(__VSF_HAL_${SPI_IP}_SPI_CLASS_INHERIT__)
47# define __VSF_CLASS_INHERIT__
64#ifndef VSF_${SPI_IP}_SPI_CFG_MULTI_CLASS
65# define VSF_${SPI_IP}_SPI_CFG_MULTI_CLASS VSF_SPI_CFG_MULTI_CLASS
82#define VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE ENABLED
83#define VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK ENABLED
84#define VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS ENABLED
85#define VSF_SPI_CFG_REIMPLEMENT_TYPE_CTRL ENABLED
86#define VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG ENABLED
87#define VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY ENABLED
89#define VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS ENABLED
90#define VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE ENABLED
91#define VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES ENABLED
99#if VSF_${SPI_IP}_CFG_MULTI_CLASS == ENABLED
118#if VSF_SPI_CFG_REIMPLEMENT_TYPE_MODE == ENABLED
147#if VSF_SPI_CFG_REIMPLEMENT_TYPE_IRQ_MASK == ENABLED
159#if VSF_SPI_CFG_REIMPLEMENT_TYPE_STATUS == ENABLED
171#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CAPABILITY == ENABLED
184#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CFG == ENABLED
207#if VSF_SPI_CFG_REIMPLEMENT_TYPE_CTRL == ENABLED
216#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_DATA_BITS == ENABLED
220#ifndef VSF_SPI_DATASIZE_MASK
221# define VSF_SPI_DATASIZE_MASK (VSF_SPI_DATASIZE_8 | VSF_SPI_DATASIZE_16 | VSF_SPI_DATASIZE_32)
223#ifndef VSF_SPI_DATASIZE_BIT_OFFSET
224# define VSF_SPI_DATASIZE_BIT_OFFSET 8
226#ifndef VSF_SPI_DATASIZE_VALUE_OFFSET
227# define VSF_SPI_DATASIZE_VALUE_OFFSET 1
247#if VSF_SPI_CFG_REIMPLEMENT_DATA_BITS_TO_MODE == ENABLED
249#ifndef VSF_SPI_DATASIZE_BIT_OFFSET
250# define VSF_SPI_DATASIZE_BIT_OFFSET 8
252#ifndef VSF_SPI_DATASIZE_VALUE_OFFSET
253# define VSF_SPI_DATASIZE_VALUE_OFFSET 1
272#if VSF_SPI_CFG_REIMPLEMENT_MODE_TO_BYTES == ENABLED
285 uint8_t bits = vsf_spi_mode_to_data_bits(mode);
288 }
else if (bits <= 8) {
290 }
else if (bits <= 16) {
312#undef __VSF_HAL_${SPI_IP}_SPI_CLASS_IMPLEMENT
313#undef __VSF_HAL_${SPI_IP}_SPI_CLASS_INHERIT__
vsf_spi_mode_t
Definition spi.h:33
@ VSF_SPI_SLAVE
Definition spi.h:34
@ VSF_SPI_DATASIZE_16
Definition spi.h:57
@ VSF_SPI_MODE_1
Definition spi.h:41
@ VSF_SPI_DATASIZE_8
datasize is 8 bits
Definition spi.h:49
@ VSF_SPI_MASTER
Definition spi.h:35
@ VSF_SPI_DATASIZE_BIT_OFFSET
Definition spi.h:47
@ VSF_SPI_DATASIZE_32
Definition spi.h:73
@ VSF_SPI_MODE_0
Definition spi.h:39
@ VSF_SPI_MODE_3
Definition spi.h:45
@ VSF_SPI_MODE_2
Definition spi.h:43
vsf_spi_irq_mask_t
Definition spi.h:159
@ VSF_SPI_LSB_FIRST
Definition spi.h:78
@ VSF_SPI_MSB_FIRST
Definition spi.h:77
@ VSF_SPI_CS_SOFTWARE_MODE
Definition spi.h:87
@ VSF_SPI_CS_HARDWARE_MODE
Definition spi.h:89
struct vsf_spi_isr_t vsf_spi_isr_t
void vsf_spi_isr_handler_t(void *target_ptr, vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Definition spi.h:153
struct vsf_spi_cfg_t vsf_spi_cfg_t
struct vsf_spi_capability_t vsf_spi_capability_t
@ VSF_SPI_IRQ_MASK_RX_OVERFLOW_ERR
Definition spi.h:117
@ VSF_SPI_IRQ_MASK_RX
Definition spi.h:114
@ VSF_SPI_IRQ_MASK_TX
Definition spi.h:113
struct vsf_spi_status_t vsf_spi_status_t
vsf_spi_mode_t
Definition spi.h:79
vsf_spi_ctrl_t
Definition spi.h:172
@ __VSF_SPI_CTRL_DUMMY
Definition spi.h:173
vsf_spi_irq_mask_t
Definition spi.h:41
@ VSF_SPI_IRQ_MASK_RX_CPL
Definition spi.h:43
@ VSF_SPI_IRQ_MASK_TX_CPL
Definition spi.h:42
@ VSF_SPI_DATASIZE_MASK
Definition spi.h:87
vsf_arch_prio_t
Definition cortex_a_generic.h:88
#define vsf_class(__name)
Definition ooc_class.h:52
const i_spi_t vsf_spi_irq_mask_t irq_mask
Definition spi_interface.h:38
unsigned uint32_t
Definition stdint.h:9
unsigned char uint8_t
Definition stdint.h:5
Predefined VSF SPI capability that can be reimplemented in specific HAL drivers. Even if the hardware...
Definition vsf_template_spi.h:739
uint8_t support_software_cs
Hardware chip select support (1: supported, 0: not supported)
Definition vsf_template_spi.h:746
uint32_t max_clock_hz
Number of available chip select lines (0-63)
Definition vsf_template_spi.h:749
uint8_t cs_count
Software chip select support (1: supported, 0: not supported)
Definition vsf_template_spi.h:747
vsf_spi_irq_mask_t irq_mask
Definition spi.h:137
uint8_t support_hardware_cs
Supported interrupt masks for SPI operations.
Definition vsf_template_spi.h:745
uint32_t min_clock_hz
Maximum supported SPI clock frequency in Hz.
Definition vsf_template_spi.h:750
Configuration structure for SPI.
Definition vsf_template_spi.h:797
uint32_t clock_hz
SPI operating mode (master/slave, CPOL/CPHA, bit order, data size)
Definition vsf_template_spi.h:799
vsf_spi_isr_t isr
SPI clock frequency in Hz (must be between min_clock_hz and max_clock_hz)
Definition vsf_template_spi.h:800
vsf_spi_mode_t mode
Definition vsf_template_spi.h:798
uint8_t auto_cs_index
Interrupt configuration (handler, target pointer, priority)
Definition vsf_template_spi.h:803
SPI interrupt service routine configuration structure.
Definition vsf_template_spi.h:785
vsf_spi_isr_handler_t * handler_fn
Definition vsf_template_spi.h:786
void * target_ptr
Interrupt handler function (NULL to disable interrupts)
Definition vsf_template_spi.h:787
vsf_arch_prio_t prio
User context pointer passed to handler.
Definition vsf_template_spi.h:788
Predefined VSF SPI status that can be reimplemented in specific HAL drivers. Even if the hardware doe...
Definition vsf_template_spi.h:719
uint32_t is_busy
Definition spi.h:127
SPI instance structure, used for SPI Multi Class support, not needed in non Multi Class mode.
Definition vsf_template_spi.h:1131
void vsf_spi_isr_handler_t(void *target_ptr, vsf_spi_t *spi_ptr, vsf_spi_irq_mask_t irq_mask)
Definition spi.h:189
#define VSF_SPI_DATASIZE_VALUE_OFFSET
Definition spi.h:227
vsf_spi_isr_t isr
Definition spi.h:113
vsf_spi_t vsf_spi[SPI_COUNT]
Definition vsf_spi.c:3
vsf_spi_ctrl_t
Predefined VSF SPI control commands that can be reimplemented in specific HAL drivers.
Definition vsf_template_spi.h:842